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diff --git a/arch/arm/mach-iop32x/iq80321-pci.c b/arch/arm/mach-iop32x/iq80321-pci.c
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1/*
2 * arch/arm/mach-iop32x/iq80321-pci.c
3 *
4 * PCI support for the Intel IQ80321 reference board
5 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 * Copyright (C) 2004 Intel Corp.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/init.h>
17#include <linux/string.h>
18#include <linux/slab.h>
19
20#include <asm/hardware.h>
21#include <asm/irq.h>
22#include <asm/mach/pci.h>
23#include <asm/mach-types.h>
24
25/*
26 * The following macro is used to lookup irqs in a standard table
27 * format for those systems that do not already have PCI
28 * interrupts properly routed. We assume 1 <= pin <= 4
29 */
30#define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
31({ int _ctl_ = -1; \
32 unsigned int _idsel = idsel - minid; \
33 if (_idsel <= maxid) \
34 _ctl_ = pci_irq_table[_idsel][pin-1]; \
35 _ctl_; })
36
37#define INTA IRQ_IQ80321_INTA
38#define INTB IRQ_IQ80321_INTB
39#define INTC IRQ_IQ80321_INTC
40#define INTD IRQ_IQ80321_INTD
41
42#define INTE IRQ_IQ80321_I82544
43
44static inline int __init
45iq80321_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
46{
47 static int pci_irq_table[][4] = {
48 /*
49 * PCI IDSEL/INTPIN->INTLINE
50 * A B C D
51 */
52 {INTE, INTE, INTE, INTE}, /* Gig-E */
53 {-1, -1, -1, -1}, /* Unused */
54 {INTC, INTD, INTA, INTB}, /* PCI-X Slot */
55 {-1, -1, -1, -1},
56 };
57
58 BUG_ON(pin < 1 || pin > 4);
59
60// return PCI_IRQ_TABLE_LOOKUP(4, 7);
61 return pci_irq_table[idsel%4][pin-1];
62}
63
64static int iq80321_setup(int nr, struct pci_sys_data *sys)
65{
66 struct resource *res;
67
68 if(nr != 0)
69 return 0;
70
71 res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
72 if (!res)
73 panic("PCI: unable to alloc resources");
74
75 res[0].start = IOP321_PCI_LOWER_IO_VA;
76 res[0].end = IOP321_PCI_UPPER_IO_VA;
77 res[0].name = "IQ80321 PCI I/O Space";
78 res[0].flags = IORESOURCE_IO;
79
80 res[1].start = IOP321_PCI_LOWER_MEM_PA;
81 res[1].end = IOP321_PCI_UPPER_MEM_PA;
82 res[1].name = "IQ80321 PCI Memory Space";
83 res[1].flags = IORESOURCE_MEM;
84
85 request_resource(&ioport_resource, &res[0]);
86 request_resource(&iomem_resource, &res[1]);
87
88 sys->mem_offset = IOP321_PCI_MEM_OFFSET;
89 sys->io_offset = IOP321_PCI_IO_OFFSET;
90
91 sys->resource[0] = &res[0];
92 sys->resource[1] = &res[1];
93 sys->resource[2] = NULL;
94
95 return 1;
96}
97
98static void iq80321_preinit(void)
99{
100 iop321_init();
101}
102
103static struct hw_pci iq80321_pci __initdata = {
104 .swizzle = pci_std_swizzle,
105 .nr_controllers = 1,
106 .setup = iq80321_setup,
107 .scan = iop321_scan_bus,
108 .preinit = iq80321_preinit,
109 .map_irq = iq80321_map_irq
110};
111
112static int __init iq80321_pci_init(void)
113{
114 if (machine_is_iq80321())
115 pci_common_init(&iq80321_pci);
116 return 0;
117}
118
119subsys_initcall(iq80321_pci_init);
120
121
122
123