diff options
Diffstat (limited to 'arch/arm/mach-iop13xx/irq.c')
-rw-r--r-- | arch/arm/mach-iop13xx/irq.c | 54 |
1 files changed, 9 insertions, 45 deletions
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index 5791addd436b..69f07b25b3c9 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c | |||
@@ -30,77 +30,65 @@ | |||
30 | 30 | ||
31 | /* INTCTL0 CP6 R0 Page 4 | 31 | /* INTCTL0 CP6 R0 Page 4 |
32 | */ | 32 | */ |
33 | static inline u32 read_intctl_0(void) | 33 | static u32 read_intctl_0(void) |
34 | { | 34 | { |
35 | u32 val; | 35 | u32 val; |
36 | asm volatile("mrc p6, 0, %0, c0, c4, 0":"=r" (val)); | 36 | asm volatile("mrc p6, 0, %0, c0, c4, 0":"=r" (val)); |
37 | return val; | 37 | return val; |
38 | } | 38 | } |
39 | static inline void write_intctl_0(u32 val) | 39 | static void write_intctl_0(u32 val) |
40 | { | 40 | { |
41 | asm volatile("mcr p6, 0, %0, c0, c4, 0"::"r" (val)); | 41 | asm volatile("mcr p6, 0, %0, c0, c4, 0"::"r" (val)); |
42 | } | 42 | } |
43 | 43 | ||
44 | /* INTCTL1 CP6 R1 Page 4 | 44 | /* INTCTL1 CP6 R1 Page 4 |
45 | */ | 45 | */ |
46 | static inline u32 read_intctl_1(void) | 46 | static u32 read_intctl_1(void) |
47 | { | 47 | { |
48 | u32 val; | 48 | u32 val; |
49 | asm volatile("mrc p6, 0, %0, c1, c4, 0":"=r" (val)); | 49 | asm volatile("mrc p6, 0, %0, c1, c4, 0":"=r" (val)); |
50 | return val; | 50 | return val; |
51 | } | 51 | } |
52 | static inline void write_intctl_1(u32 val) | 52 | static void write_intctl_1(u32 val) |
53 | { | 53 | { |
54 | asm volatile("mcr p6, 0, %0, c1, c4, 0"::"r" (val)); | 54 | asm volatile("mcr p6, 0, %0, c1, c4, 0"::"r" (val)); |
55 | } | 55 | } |
56 | 56 | ||
57 | /* INTCTL2 CP6 R2 Page 4 | 57 | /* INTCTL2 CP6 R2 Page 4 |
58 | */ | 58 | */ |
59 | static inline u32 read_intctl_2(void) | 59 | static u32 read_intctl_2(void) |
60 | { | 60 | { |
61 | u32 val; | 61 | u32 val; |
62 | asm volatile("mrc p6, 0, %0, c2, c4, 0":"=r" (val)); | 62 | asm volatile("mrc p6, 0, %0, c2, c4, 0":"=r" (val)); |
63 | return val; | 63 | return val; |
64 | } | 64 | } |
65 | static inline void write_intctl_2(u32 val) | 65 | static void write_intctl_2(u32 val) |
66 | { | 66 | { |
67 | asm volatile("mcr p6, 0, %0, c2, c4, 0"::"r" (val)); | 67 | asm volatile("mcr p6, 0, %0, c2, c4, 0"::"r" (val)); |
68 | } | 68 | } |
69 | 69 | ||
70 | /* INTCTL3 CP6 R3 Page 4 | 70 | /* INTCTL3 CP6 R3 Page 4 |
71 | */ | 71 | */ |
72 | static inline u32 read_intctl_3(void) | 72 | static u32 read_intctl_3(void) |
73 | { | 73 | { |
74 | u32 val; | 74 | u32 val; |
75 | asm volatile("mrc p6, 0, %0, c3, c4, 0":"=r" (val)); | 75 | asm volatile("mrc p6, 0, %0, c3, c4, 0":"=r" (val)); |
76 | return val; | 76 | return val; |
77 | } | 77 | } |
78 | static inline void write_intctl_3(u32 val) | 78 | static void write_intctl_3(u32 val) |
79 | { | 79 | { |
80 | asm volatile("mcr p6, 0, %0, c3, c4, 0"::"r" (val)); | 80 | asm volatile("mcr p6, 0, %0, c3, c4, 0"::"r" (val)); |
81 | } | 81 | } |
82 | 82 | ||
83 | /* INTSTR0 CP6 R0 Page 5 | 83 | /* INTSTR0 CP6 R0 Page 5 |
84 | */ | 84 | */ |
85 | static inline u32 read_intstr_0(void) | 85 | static void write_intstr_0(u32 val) |
86 | { | ||
87 | u32 val; | ||
88 | asm volatile("mrc p6, 0, %0, c0, c5, 0":"=r" (val)); | ||
89 | return val; | ||
90 | } | ||
91 | static inline void write_intstr_0(u32 val) | ||
92 | { | 86 | { |
93 | asm volatile("mcr p6, 0, %0, c0, c5, 0"::"r" (val)); | 87 | asm volatile("mcr p6, 0, %0, c0, c5, 0"::"r" (val)); |
94 | } | 88 | } |
95 | 89 | ||
96 | /* INTSTR1 CP6 R1 Page 5 | 90 | /* INTSTR1 CP6 R1 Page 5 |
97 | */ | 91 | */ |
98 | static inline u32 read_intstr_1(void) | ||
99 | { | ||
100 | u32 val; | ||
101 | asm volatile("mrc p6, 0, %0, c1, c5, 0":"=r" (val)); | ||
102 | return val; | ||
103 | } | ||
104 | static void write_intstr_1(u32 val) | 92 | static void write_intstr_1(u32 val) |
105 | { | 93 | { |
106 | asm volatile("mcr p6, 0, %0, c1, c5, 0"::"r" (val)); | 94 | asm volatile("mcr p6, 0, %0, c1, c5, 0"::"r" (val)); |
@@ -108,12 +96,6 @@ static void write_intstr_1(u32 val) | |||
108 | 96 | ||
109 | /* INTSTR2 CP6 R2 Page 5 | 97 | /* INTSTR2 CP6 R2 Page 5 |
110 | */ | 98 | */ |
111 | static inline u32 read_intstr_2(void) | ||
112 | { | ||
113 | u32 val; | ||
114 | asm volatile("mrc p6, 0, %0, c2, c5, 0":"=r" (val)); | ||
115 | return val; | ||
116 | } | ||
117 | static void write_intstr_2(u32 val) | 99 | static void write_intstr_2(u32 val) |
118 | { | 100 | { |
119 | asm volatile("mcr p6, 0, %0, c2, c5, 0"::"r" (val)); | 101 | asm volatile("mcr p6, 0, %0, c2, c5, 0"::"r" (val)); |
@@ -121,12 +103,6 @@ static void write_intstr_2(u32 val) | |||
121 | 103 | ||
122 | /* INTSTR3 CP6 R3 Page 5 | 104 | /* INTSTR3 CP6 R3 Page 5 |
123 | */ | 105 | */ |
124 | static inline u32 read_intstr_3(void) | ||
125 | { | ||
126 | u32 val; | ||
127 | asm volatile("mrc p6, 0, %0, c3, c5, 0":"=r" (val)); | ||
128 | return val; | ||
129 | } | ||
130 | static void write_intstr_3(u32 val) | 106 | static void write_intstr_3(u32 val) |
131 | { | 107 | { |
132 | asm volatile("mcr p6, 0, %0, c3, c5, 0"::"r" (val)); | 108 | asm volatile("mcr p6, 0, %0, c3, c5, 0"::"r" (val)); |
@@ -134,12 +110,6 @@ static void write_intstr_3(u32 val) | |||
134 | 110 | ||
135 | /* INTBASE CP6 R0 Page 2 | 111 | /* INTBASE CP6 R0 Page 2 |
136 | */ | 112 | */ |
137 | static inline u32 read_intbase(void) | ||
138 | { | ||
139 | u32 val; | ||
140 | asm volatile("mrc p6, 0, %0, c0, c2, 0":"=r" (val)); | ||
141 | return val; | ||
142 | } | ||
143 | static void write_intbase(u32 val) | 113 | static void write_intbase(u32 val) |
144 | { | 114 | { |
145 | asm volatile("mcr p6, 0, %0, c0, c2, 0"::"r" (val)); | 115 | asm volatile("mcr p6, 0, %0, c0, c2, 0"::"r" (val)); |
@@ -147,12 +117,6 @@ static void write_intbase(u32 val) | |||
147 | 117 | ||
148 | /* INTSIZE CP6 R2 Page 2 | 118 | /* INTSIZE CP6 R2 Page 2 |
149 | */ | 119 | */ |
150 | static inline u32 read_intsize(void) | ||
151 | { | ||
152 | u32 val; | ||
153 | asm volatile("mrc p6, 0, %0, c2, c2, 0":"=r" (val)); | ||
154 | return val; | ||
155 | } | ||
156 | static void write_intsize(u32 val) | 120 | static void write_intsize(u32 val) |
157 | { | 121 | { |
158 | asm volatile("mcr p6, 0, %0, c2, c2, 0"::"r" (val)); | 122 | asm volatile("mcr p6, 0, %0, c2, c2, 0"::"r" (val)); |