aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-imx
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c93
-rw-r--r--arch/arm/mach-imx/mm-imx21.c3
-rw-r--r--arch/arm/mach-imx/mm-imx25.c25
-rw-r--r--arch/arm/mach-imx/mm-imx27.c3
-rw-r--r--arch/arm/mach-imx/mm-imx31.c27
-rw-r--r--arch/arm/mach-imx/mm-imx35.c47
7 files changed, 198 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index e8dd22fa7d61..0519dd7f034b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -278,6 +278,7 @@ config MACH_MX27_3DS
278 select SOC_IMX27 278 select SOC_IMX27
279 select IMX_HAVE_PLATFORM_FSL_USB2_UDC 279 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
280 select IMX_HAVE_PLATFORM_IMX2_WDT 280 select IMX_HAVE_PLATFORM_IMX2_WDT
281 select IMX_HAVE_PLATFORM_IMX_FB
281 select IMX_HAVE_PLATFORM_IMX_I2C 282 select IMX_HAVE_PLATFORM_IMX_I2C
282 select IMX_HAVE_PLATFORM_IMX_KEYPAD 283 select IMX_HAVE_PLATFORM_IMX_KEYPAD
283 select IMX_HAVE_PLATFORM_IMX_UART 284 select IMX_HAVE_PLATFORM_IMX_UART
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index b31d4129e10e..6fa6934ab150 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -29,6 +29,7 @@
29#include <linux/mfd/mc13783.h> 29#include <linux/mfd/mc13783.h>
30#include <linux/spi/spi.h> 30#include <linux/spi/spi.h>
31#include <linux/regulator/machine.h> 31#include <linux/regulator/machine.h>
32#include <linux/spi/l4f00242t03.h>
32 33
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
@@ -47,7 +48,10 @@
47#define SPI2_SS0 IMX_GPIO_NR(4, 21) 48#define SPI2_SS0 IMX_GPIO_NR(4, 21)
48#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) 49#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28))
49#define PMIC_INT IMX_GPIO_NR(3, 14) 50#define PMIC_INT IMX_GPIO_NR(3, 14)
51#define SPI1_SS0 IMX_GPIO_NR(4, 28)
50#define SD1_CD IMX_GPIO_NR(2, 26) 52#define SD1_CD IMX_GPIO_NR(2, 26)
53#define LCD_RESET IMX_GPIO_NR(1, 3)
54#define LCD_ENABLE IMX_GPIO_NR(1, 31)
51 55
52static const int mx27pdk_pins[] __initconst = { 56static const int mx27pdk_pins[] __initconst = {
53 /* UART1 */ 57 /* UART1 */
@@ -96,6 +100,12 @@ static const int mx27pdk_pins[] __initconst = {
96 PE2_PF_USBOTG_DIR, 100 PE2_PF_USBOTG_DIR,
97 PE24_PF_USBOTG_CLK, 101 PE24_PF_USBOTG_CLK,
98 PE25_PF_USBOTG_DATA7, 102 PE25_PF_USBOTG_DATA7,
103 /* CSPI1 */
104 PD31_PF_CSPI1_MOSI,
105 PD30_PF_CSPI1_MISO,
106 PD29_PF_CSPI1_SCLK,
107 PD25_PF_CSPI1_RDY,
108 SPI1_SS0 | GPIO_GPIO | GPIO_OUT,
99 /* CSPI2 */ 109 /* CSPI2 */
100 PD22_PF_CSPI2_SCLK, 110 PD22_PF_CSPI2_SCLK,
101 PD23_PF_CSPI2_MISO, 111 PD23_PF_CSPI2_MISO,
@@ -106,6 +116,31 @@ static const int mx27pdk_pins[] __initconst = {
106 PD18_PF_I2C_CLK, 116 PD18_PF_I2C_CLK,
107 /* PMIC INT */ 117 /* PMIC INT */
108 PMIC_INT | GPIO_GPIO | GPIO_IN, 118 PMIC_INT | GPIO_GPIO | GPIO_IN,
119 /* LCD */
120 PA5_PF_LSCLK,
121 PA6_PF_LD0,
122 PA7_PF_LD1,
123 PA8_PF_LD2,
124 PA9_PF_LD3,
125 PA10_PF_LD4,
126 PA11_PF_LD5,
127 PA12_PF_LD6,
128 PA13_PF_LD7,
129 PA14_PF_LD8,
130 PA15_PF_LD9,
131 PA16_PF_LD10,
132 PA17_PF_LD11,
133 PA18_PF_LD12,
134 PA19_PF_LD13,
135 PA20_PF_LD14,
136 PA21_PF_LD15,
137 PA22_PF_LD16,
138 PA23_PF_LD17,
139 PA28_PF_HSYNC,
140 PA29_PF_VSYNC,
141 PA30_PF_CONTRAST,
142 LCD_ENABLE | GPIO_GPIO | GPIO_OUT,
143 LCD_RESET | GPIO_GPIO | GPIO_OUT,
109}; 144};
110 145
111static const struct imxuart_platform_data uart_pdata __initconst = { 146static const struct imxuart_platform_data uart_pdata __initconst = {
@@ -258,10 +293,18 @@ static struct mc13xxx_platform_data mc13783_pdata = {
258 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), 293 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
259 294
260 }, 295 },
261 .flags = MC13783_USE_REGULATOR, 296 .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN |
297 MC13783_USE_RTC,
262}; 298};
263 299
264/* SPI */ 300/* SPI */
301static int spi1_chipselect[] = {SPI1_SS0};
302
303static const struct spi_imx_master spi1_pdata __initconst = {
304 .chipselect = spi1_chipselect,
305 .num_chipselect = ARRAY_SIZE(spi1_chipselect),
306};
307
265static int spi2_chipselect[] = {SPI2_SS0}; 308static int spi2_chipselect[] = {SPI2_SS0};
266 309
267static const struct spi_imx_master spi2_pdata __initconst = { 310static const struct spi_imx_master spi2_pdata __initconst = {
@@ -269,6 +312,46 @@ static const struct spi_imx_master spi2_pdata __initconst = {
269 .num_chipselect = ARRAY_SIZE(spi2_chipselect), 312 .num_chipselect = ARRAY_SIZE(spi2_chipselect),
270}; 313};
271 314
315static struct imx_fb_videomode mx27_3ds_modes[] = {
316 { /* 480x640 @ 60 Hz */
317 .mode = {
318 .name = "Epson-VGA",
319 .refresh = 60,
320 .xres = 480,
321 .yres = 640,
322 .pixclock = 41701,
323 .left_margin = 20,
324 .right_margin = 41,
325 .upper_margin = 10,
326 .lower_margin = 5,
327 .hsync_len = 20,
328 .vsync_len = 10,
329 .sync = FB_SYNC_OE_ACT_HIGH |
330 FB_SYNC_CLK_INVERT,
331 .vmode = FB_VMODE_NONINTERLACED,
332 .flag = 0,
333 },
334 .bpp = 16,
335 .pcr = 0xFAC08B82,
336 },
337};
338
339static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = {
340 .mode = mx27_3ds_modes,
341 .num_modes = ARRAY_SIZE(mx27_3ds_modes),
342 .pwmr = 0x00A903FF,
343 .lscr1 = 0x00120300,
344 .dmacr = 0x00020010,
345};
346
347/* LCD */
348static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = {
349 .reset_gpio = LCD_RESET,
350 .data_enable_gpio = LCD_ENABLE,
351 .core_supply = "lcd_2v8",
352 .io_supply = "vdd_lcdio",
353};
354
272static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { 355static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
273 { 356 {
274 .modalias = "mc13783", 357 .modalias = "mc13783",
@@ -278,6 +361,12 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
278 .platform_data = &mc13783_pdata, 361 .platform_data = &mc13783_pdata,
279 .irq = gpio_to_irq(PMIC_INT), 362 .irq = gpio_to_irq(PMIC_INT),
280 .mode = SPI_CS_HIGH, 363 .mode = SPI_CS_HIGH,
364 }, {
365 .modalias = "l4f00242t03",
366 .max_speed_hz = 5000000,
367 .bus_num = 0,
368 .chip_select = 0, /* SS0 */
369 .platform_data = &mx27_3ds_lcd_pdata,
281 }, 370 },
282}; 371};
283 372
@@ -311,12 +400,14 @@ static void __init mx27pdk_init(void)
311 imx27_add_fsl_usb2_udc(&otg_device_pdata); 400 imx27_add_fsl_usb2_udc(&otg_device_pdata);
312 401
313 imx27_add_spi_imx1(&spi2_pdata); 402 imx27_add_spi_imx1(&spi2_pdata);
403 imx27_add_spi_imx0(&spi1_pdata);
314 spi_register_board_info(mx27_3ds_spi_devs, 404 spi_register_board_info(mx27_3ds_spi_devs,
315 ARRAY_SIZE(mx27_3ds_spi_devs)); 405 ARRAY_SIZE(mx27_3ds_spi_devs));
316 406
317 if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) 407 if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT))
318 pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); 408 pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
319 imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); 409 imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
410 imx27_add_imx_fb(&mx27_3ds_fb_data);
320} 411}
321 412
322static void __init mx27pdk_timer_init(void) 413static void __init mx27pdk_timer_init(void)
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index 6d7d518686a5..3f05dfebacc9 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -22,6 +22,7 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/common.h> 24#include <mach/common.h>
25#include <mach/devices-common.h>
25#include <asm/pgtable.h> 26#include <asm/pgtable.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <mach/irqs.h> 28#include <mach/irqs.h>
@@ -82,4 +83,6 @@ void __init imx21_soc_init(void)
82 mxc_register_gpio("imx21-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); 83 mxc_register_gpio("imx21-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
83 mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); 84 mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
84 mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); 85 mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
86
87 imx_add_imx_dma();
85} 88}
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index 9a1591c2508d..8bf029164652 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -24,6 +24,7 @@
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
25 25
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/devices-common.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <mach/mx25.h> 29#include <mach/mx25.h>
29#include <mach/iomux-v3.h> 30#include <mach/iomux-v3.h>
@@ -61,6 +62,28 @@ void __init mx25_init_irq(void)
61 mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); 62 mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR));
62} 63}
63 64
65static struct sdma_script_start_addrs imx25_sdma_script __initdata = {
66 .ap_2_ap_addr = 729,
67 .uart_2_mcu_addr = 904,
68 .per_2_app_addr = 1255,
69 .mcu_2_app_addr = 834,
70 .uartsh_2_mcu_addr = 1120,
71 .per_2_shp_addr = 1329,
72 .mcu_2_shp_addr = 1048,
73 .ata_2_mcu_addr = 1560,
74 .mcu_2_ata_addr = 1479,
75 .app_2_per_addr = 1189,
76 .app_2_mcu_addr = 770,
77 .shp_2_per_addr = 1407,
78 .shp_2_mcu_addr = 979,
79};
80
81static struct sdma_platform_data imx25_sdma_pdata __initdata = {
82 .sdma_version = 2,
83 .fw_name = "sdma-imx25.bin",
84 .script_addrs = &imx25_sdma_script,
85};
86
64void __init imx25_soc_init(void) 87void __init imx25_soc_init(void)
65{ 88{
66 /* i.mx25 has the i.mx31 type gpio */ 89 /* i.mx25 has the i.mx31 type gpio */
@@ -68,4 +91,6 @@ void __init imx25_soc_init(void)
68 mxc_register_gpio("imx31-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); 91 mxc_register_gpio("imx31-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
69 mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); 92 mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
70 mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); 93 mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
94
95 imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
71} 96}
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index 133b30003ddb..96dd1f5ea7bd 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -22,6 +22,7 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/common.h> 24#include <mach/common.h>
25#include <mach/devices-common.h>
25#include <asm/pgtable.h> 26#include <asm/pgtable.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <mach/irqs.h> 28#include <mach/irqs.h>
@@ -83,4 +84,6 @@ void __init imx27_soc_init(void)
83 mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); 84 mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
84 mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); 85 mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
85 mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); 86 mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
87
88 imx_add_imx_dma();
86} 89}
diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c
index 6d103c01b8b9..61bff38cb955 100644
--- a/arch/arm/mach-imx/mm-imx31.c
+++ b/arch/arm/mach-imx/mm-imx31.c
@@ -24,6 +24,7 @@
24#include <asm/mach/map.h> 24#include <asm/mach/map.h>
25 25
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/devices-common.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
28#include <mach/iomux-v3.h> 29#include <mach/iomux-v3.h>
29#include <mach/irqs.h> 30#include <mach/irqs.h>
@@ -57,9 +58,35 @@ void __init mx31_init_irq(void)
57 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); 58 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
58} 59}
59 60
61static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
62 .per_2_per_addr = 1677,
63};
64
65static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = {
66 .ap_2_ap_addr = 423,
67 .ap_2_bp_addr = 829,
68 .bp_2_ap_addr = 1029,
69};
70
71static struct sdma_platform_data imx31_sdma_pdata __initdata = {
72 .sdma_version = 1,
73 .fw_name = "sdma-imx31-to2.bin",
74 .script_addrs = &imx31_to2_sdma_script,
75};
76
60void __init imx31_soc_init(void) 77void __init imx31_soc_init(void)
61{ 78{
79 int to_version = mx31_revision() >> 4;
80
62 mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); 81 mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
63 mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); 82 mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
64 mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); 83 mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
84
85 if (to_version == 1) {
86 strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin",
87 strlen(imx31_sdma_pdata.fw_name));
88 imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script;
89 }
90
91 imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
65} 92}
diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c
index bb068bc8dab7..98769ae34377 100644
--- a/arch/arm/mach-imx/mm-imx35.c
+++ b/arch/arm/mach-imx/mm-imx35.c
@@ -25,6 +25,7 @@
25#include <asm/hardware/cache-l2x0.h> 25#include <asm/hardware/cache-l2x0.h>
26 26
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/devices-common.h>
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/iomux-v3.h> 30#include <mach/iomux-v3.h>
30#include <mach/irqs.h> 31#include <mach/irqs.h>
@@ -54,10 +55,56 @@ void __init mx35_init_irq(void)
54 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); 55 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
55} 56}
56 57
58static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
59 .ap_2_ap_addr = 642,
60 .uart_2_mcu_addr = 817,
61 .mcu_2_app_addr = 747,
62 .uartsh_2_mcu_addr = 1183,
63 .per_2_shp_addr = 1033,
64 .mcu_2_shp_addr = 961,
65 .ata_2_mcu_addr = 1333,
66 .mcu_2_ata_addr = 1252,
67 .app_2_mcu_addr = 683,
68 .shp_2_per_addr = 1111,
69 .shp_2_mcu_addr = 892,
70};
71
72static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = {
73 .ap_2_ap_addr = 729,
74 .uart_2_mcu_addr = 904,
75 .per_2_app_addr = 1597,
76 .mcu_2_app_addr = 834,
77 .uartsh_2_mcu_addr = 1270,
78 .per_2_shp_addr = 1120,
79 .mcu_2_shp_addr = 1048,
80 .ata_2_mcu_addr = 1429,
81 .mcu_2_ata_addr = 1339,
82 .app_2_per_addr = 1531,
83 .app_2_mcu_addr = 770,
84 .shp_2_per_addr = 1198,
85 .shp_2_mcu_addr = 979,
86};
87
88static struct sdma_platform_data imx35_sdma_pdata __initdata = {
89 .sdma_version = 2,
90 .fw_name = "sdma-imx35-to2.bin",
91 .script_addrs = &imx35_to2_sdma_script,
92};
93
57void __init imx35_soc_init(void) 94void __init imx35_soc_init(void)
58{ 95{
96 int to_version = mx35_revision() >> 4;
97
59 /* i.mx35 has the i.mx31 type gpio */ 98 /* i.mx35 has the i.mx31 type gpio */
60 mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); 99 mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
61 mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); 100 mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
62 mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); 101 mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
102
103 if (to_version == 1) {
104 strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin",
105 strlen(imx35_sdma_pdata.fw_name));
106 imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script;
107 }
108
109 imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
63} 110}