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-rw-r--r--arch/arm/mach-imx/Kconfig138
-rw-r--r--arch/arm/mach-imx/Makefile8
-rw-r--r--arch/arm/mach-imx/Makefile.boot4
-rw-r--r--arch/arm/mach-imx/clock-imx1.c3
-rw-r--r--arch/arm/mach-imx/clock-imx21.c4
-rw-r--r--arch/arm/mach-imx/clock-imx25.c331
-rw-r--r--arch/arm/mach-imx/clock-imx27.c26
-rw-r--r--arch/arm/mach-imx/cpu-imx27.c14
-rw-r--r--arch/arm/mach-imx/devices-imx21.h24
-rw-r--r--arch/arm/mach-imx/devices-imx25.h87
-rw-r--r--arch/arm/mach-imx/devices-imx27.h35
-rw-r--r--arch/arm/mach-imx/devices.c553
-rw-r--r--arch/arm/mach-imx/devices.h29
-rw-r--r--arch/arm/mach-imx/dma-v1.c4
-rw-r--r--arch/arm/mach-imx/eukrea_mbimx27-baseboard.c17
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c296
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c21
-rw-r--r--arch/arm/mach-imx/mach-eukrea_cpuimx25.c161
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c12
-rw-r--r--arch/arm/mach-imx/mach-imx27lite.c1
-rw-r--r--arch/arm/mach-imx/mach-mx1ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c20
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c235
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c160
-rw-r--r--arch/arm/mach-imx/mach-mx27ads.c17
-rw-r--r--arch/arm/mach-imx/mach-mxt_td60.c11
-rw-r--r--arch/arm/mach-imx/mach-pca100.c33
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c12
-rw-r--r--arch/arm/mach-imx/mach-scb9328.c1
-rw-r--r--arch/arm/mach-imx/mm-imx1.c7
-rw-r--r--arch/arm/mach-imx/mm-imx21.c21
-rw-r--r--arch/arm/mach-imx/mm-imx25.c62
-rw-r--r--arch/arm/mach-imx/mm-imx27.c21
-rw-r--r--arch/arm/mach-imx/pcm970-baseboard.c12
-rw-r--r--arch/arm/mach-imx/pm-imx27.c3
35 files changed, 1613 insertions, 771 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 197f9e241cff..17d2e608a214 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,13 +1,37 @@
1config IMX_HAVE_DMA_V1 1config IMX_HAVE_DMA_V1
2 bool 2 bool
3 3
4if ARCH_MX1
5
6config SOC_IMX1 4config SOC_IMX1
5 bool
7 select CPU_ARM920T 6 select CPU_ARM920T
8 select IMX_HAVE_DMA_V1 7 select IMX_HAVE_DMA_V1
9 select IMX_HAVE_IOMUX_V1 8 select IMX_HAVE_IOMUX_V1
9 select MXC_AVIC
10
11config SOC_IMX21
12 bool
13 select CPU_ARM926T
14 select ARCH_MXC_AUDMUX_V1
15 select IMX_HAVE_DMA_V1
16 select IMX_HAVE_IOMUX_V1
17 select MXC_AVIC
18
19config SOC_IMX25
10 bool 20 bool
21 select CPU_ARM926T
22 select ARCH_MXC_AUDMUX_V2
23 select ARCH_MXC_IOMUX_V3
24 select MXC_AVIC
25
26config SOC_IMX27
27 bool
28 select CPU_ARM926T
29 select ARCH_MXC_AUDMUX_V1
30 select IMX_HAVE_DMA_V1
31 select IMX_HAVE_IOMUX_V1
32 select MXC_AVIC
33
34if ARCH_MX1
11 35
12comment "MX1 platforms:" 36comment "MX1 platforms:"
13config MACH_MXLADS 37config MACH_MXLADS
@@ -31,33 +55,17 @@ endif
31 55
32if ARCH_MX2 56if ARCH_MX2
33 57
34config SOC_IMX21
35 select CPU_ARM926T
36 select ARCH_MXC_AUDMUX_V1
37 select IMX_HAVE_DMA_V1
38 select IMX_HAVE_IOMUX_V1
39 bool
40
41config SOC_IMX27
42 select CPU_ARM926T
43 select ARCH_MXC_AUDMUX_V1
44 select IMX_HAVE_DMA_V1
45 select IMX_HAVE_IOMUX_V1
46 bool
47
48choice 58choice
49 prompt "CPUs:" 59 prompt "CPUs:"
50 default MACH_MX21 60 default MACH_MX21
51 61
52config MACH_MX21 62config MACH_MX21
53 bool "i.MX21 support" 63 bool "i.MX21 support"
54 select SOC_IMX21
55 help 64 help
56 This enables support for Freescale's MX2 based i.MX21 processor. 65 This enables support for Freescale's MX2 based i.MX21 processor.
57 66
58config MACH_MX27 67config MACH_MX27
59 bool "i.MX27 support" 68 bool "i.MX27 support"
60 select SOC_IMX27
61 help 69 help
62 This enables support for Freescale's MX2 based i.MX27 processor. 70 This enables support for Freescale's MX2 based i.MX27 processor.
63 71
@@ -71,7 +79,10 @@ comment "MX21 platforms:"
71 79
72config MACH_MX21ADS 80config MACH_MX21ADS
73 bool "MX21ADS platform" 81 bool "MX21ADS platform"
82 select SOC_IMX21
83 select IMX_HAVE_PLATFORM_IMX_FB
74 select IMX_HAVE_PLATFORM_IMX_UART 84 select IMX_HAVE_PLATFORM_IMX_UART
85 select IMX_HAVE_PLATFORM_MXC_MMC
75 select IMX_HAVE_PLATFORM_MXC_NAND 86 select IMX_HAVE_PLATFORM_MXC_NAND
76 help 87 help
77 Include support for MX21ADS platform. This includes specific 88 Include support for MX21ADS platform. This includes specific
@@ -79,24 +90,79 @@ config MACH_MX21ADS
79 90
80endif 91endif
81 92
93if ARCH_MX25
94
95comment "MX25 platforms:"
96
97config MACH_MX25_3DS
98 bool "Support MX25PDK (3DS) Platform"
99 select SOC_IMX25
100 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
101 select IMX_HAVE_PLATFORM_IMX2_WDT
102 select IMX_HAVE_PLATFORM_IMXDI_RTC
103 select IMX_HAVE_PLATFORM_IMX_FB
104 select IMX_HAVE_PLATFORM_IMX_KEYPAD
105 select IMX_HAVE_PLATFORM_IMX_UART
106 select IMX_HAVE_PLATFORM_MXC_EHCI
107 select IMX_HAVE_PLATFORM_MXC_NAND
108 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
109
110config MACH_EUKREA_CPUIMX25
111 bool "Support Eukrea CPUIMX25 Platform"
112 select SOC_IMX25
113 select IMX_HAVE_PLATFORM_FLEXCAN
114 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
115 select IMX_HAVE_PLATFORM_IMXDI_RTC
116 select IMX_HAVE_PLATFORM_IMX_FB
117 select IMX_HAVE_PLATFORM_IMX_I2C
118 select IMX_HAVE_PLATFORM_IMX_UART
119 select IMX_HAVE_PLATFORM_MXC_EHCI
120 select IMX_HAVE_PLATFORM_MXC_NAND
121 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
122 select MXC_ULPI if USB_ULPI
123
124choice
125 prompt "Baseboard"
126 depends on MACH_EUKREA_CPUIMX25
127 default MACH_EUKREA_MBIMXSD25_BASEBOARD
128
129config MACH_EUKREA_MBIMXSD25_BASEBOARD
130 bool "Eukrea MBIMXSD development board"
131 select IMX_HAVE_PLATFORM_IMX_SSI
132 help
133 This adds board specific devices that can be found on Eukrea's
134 MBIMXSD evaluation board.
135
136endchoice
137
138endif
139
82if MACH_MX27 140if MACH_MX27
83 141
84comment "MX27 platforms:" 142comment "MX27 platforms:"
85 143
86config MACH_MX27ADS 144config MACH_MX27ADS
87 bool "MX27ADS platform" 145 bool "MX27ADS platform"
146 select SOC_IMX27
147 select IMX_HAVE_PLATFORM_IMX_FB
88 select IMX_HAVE_PLATFORM_IMX_I2C 148 select IMX_HAVE_PLATFORM_IMX_I2C
89 select IMX_HAVE_PLATFORM_IMX_UART 149 select IMX_HAVE_PLATFORM_IMX_UART
150 select IMX_HAVE_PLATFORM_MXC_MMC
90 select IMX_HAVE_PLATFORM_MXC_NAND 151 select IMX_HAVE_PLATFORM_MXC_NAND
152 select IMX_HAVE_PLATFORM_MXC_W1
91 help 153 help
92 Include support for MX27ADS platform. This includes specific 154 Include support for MX27ADS platform. This includes specific
93 configurations for the board and its peripherals. 155 configurations for the board and its peripherals.
94 156
95config MACH_PCM038 157config MACH_PCM038
96 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)" 158 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
159 select SOC_IMX27
160 select IMX_HAVE_PLATFORM_IMX2_WDT
97 select IMX_HAVE_PLATFORM_IMX_I2C 161 select IMX_HAVE_PLATFORM_IMX_I2C
98 select IMX_HAVE_PLATFORM_IMX_UART 162 select IMX_HAVE_PLATFORM_IMX_UART
163 select IMX_HAVE_PLATFORM_MXC_EHCI
99 select IMX_HAVE_PLATFORM_MXC_NAND 164 select IMX_HAVE_PLATFORM_MXC_NAND
165 select IMX_HAVE_PLATFORM_MXC_W1
100 select IMX_HAVE_PLATFORM_SPI_IMX 166 select IMX_HAVE_PLATFORM_SPI_IMX
101 select MXC_ULPI if USB_ULPI 167 select MXC_ULPI if USB_ULPI
102 help 168 help
@@ -109,8 +175,9 @@ choice
109 default MACH_PCM970_BASEBOARD 175 default MACH_PCM970_BASEBOARD
110 176
111config MACH_PCM970_BASEBOARD 177config MACH_PCM970_BASEBOARD
112 prompt "PHYTEC PCM970 development board" 178 bool "PHYTEC PCM970 development board"
113 bool 179 select IMX_HAVE_PLATFORM_IMX_FB
180 select IMX_HAVE_PLATFORM_MXC_MMC
114 help 181 help
115 This adds board specific devices that can be found on Phytec's 182 This adds board specific devices that can be found on Phytec's
116 PCM970 evaluation board. 183 PCM970 evaluation board.
@@ -119,9 +186,14 @@ endchoice
119 186
120config MACH_CPUIMX27 187config MACH_CPUIMX27
121 bool "Eukrea CPUIMX27 module" 188 bool "Eukrea CPUIMX27 module"
189 select SOC_IMX27
190 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
191 select IMX_HAVE_PLATFORM_IMX2_WDT
122 select IMX_HAVE_PLATFORM_IMX_I2C 192 select IMX_HAVE_PLATFORM_IMX_I2C
123 select IMX_HAVE_PLATFORM_IMX_UART 193 select IMX_HAVE_PLATFORM_IMX_UART
194 select IMX_HAVE_PLATFORM_MXC_EHCI
124 select IMX_HAVE_PLATFORM_MXC_NAND 195 select IMX_HAVE_PLATFORM_MXC_NAND
196 select IMX_HAVE_PLATFORM_MXC_W1
125 select MXC_ULPI if USB_ULPI 197 select MXC_ULPI if USB_ULPI
126 help 198 help
127 Include support for Eukrea CPUIMX27 platform. This includes 199 Include support for Eukrea CPUIMX27 platform. This includes
@@ -130,6 +202,7 @@ config MACH_CPUIMX27
130config MACH_EUKREA_CPUIMX27_USESDHC2 202config MACH_EUKREA_CPUIMX27_USESDHC2
131 bool "CPUIMX27 integrates SDHC2 module" 203 bool "CPUIMX27 integrates SDHC2 module"
132 depends on MACH_CPUIMX27 204 depends on MACH_CPUIMX27
205 select IMX_HAVE_PLATFORM_MXC_MMC
133 help 206 help
134 This adds support for the internal SDHC2 used on CPUIMX27 207 This adds support for the internal SDHC2 used on CPUIMX27
135 for wifi or eMMC. 208 for wifi or eMMC.
@@ -148,8 +221,11 @@ choice
148 221
149config MACH_EUKREA_MBIMX27_BASEBOARD 222config MACH_EUKREA_MBIMX27_BASEBOARD
150 bool "Eukrea MBIMX27 development board" 223 bool "Eukrea MBIMX27 development board"
224 select IMX_HAVE_PLATFORM_IMX_FB
225 select IMX_HAVE_PLATFORM_IMX_KEYPAD
151 select IMX_HAVE_PLATFORM_IMX_SSI 226 select IMX_HAVE_PLATFORM_IMX_SSI
152 select IMX_HAVE_PLATFORM_IMX_UART 227 select IMX_HAVE_PLATFORM_IMX_UART
228 select IMX_HAVE_PLATFORM_MXC_MMC
153 select IMX_HAVE_PLATFORM_SPI_IMX 229 select IMX_HAVE_PLATFORM_SPI_IMX
154 help 230 help
155 This adds board specific devices that can be found on Eukrea's 231 This adds board specific devices that can be found on Eukrea's
@@ -159,15 +235,26 @@ endchoice
159 235
160config MACH_MX27_3DS 236config MACH_MX27_3DS
161 bool "MX27PDK platform" 237 bool "MX27PDK platform"
238 select SOC_IMX27
239 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
240 select IMX_HAVE_PLATFORM_IMX2_WDT
241 select IMX_HAVE_PLATFORM_IMX_KEYPAD
162 select IMX_HAVE_PLATFORM_IMX_UART 242 select IMX_HAVE_PLATFORM_IMX_UART
243 select IMX_HAVE_PLATFORM_MXC_EHCI
244 select IMX_HAVE_PLATFORM_MXC_MMC
245 select IMX_HAVE_PLATFORM_SPI_IMX
246 select MXC_ULPI if USB_ULPI
163 help 247 help
164 Include support for MX27PDK platform. This includes specific 248 Include support for MX27PDK platform. This includes specific
165 configurations for the board and its peripherals. 249 configurations for the board and its peripherals.
166 250
167config MACH_IMX27_VISSTRIM_M10 251config MACH_IMX27_VISSTRIM_M10
168 bool "Vista Silicon i.MX27 Visstrim_m10" 252 bool "Vista Silicon i.MX27 Visstrim_m10"
253 select SOC_IMX27
169 select IMX_HAVE_PLATFORM_IMX_I2C 254 select IMX_HAVE_PLATFORM_IMX_I2C
170 select IMX_HAVE_PLATFORM_IMX_UART 255 select IMX_HAVE_PLATFORM_IMX_UART
256 select IMX_HAVE_PLATFORM_MXC_MMC
257 select IMX_HAVE_PLATFORM_MXC_EHCI
171 help 258 help
172 Include support for Visstrim_m10 platform and its different variants. 259 Include support for Visstrim_m10 platform and its different variants.
173 This includes specific configurations for the board and its 260 This includes specific configurations for the board and its
@@ -175,6 +262,7 @@ config MACH_IMX27_VISSTRIM_M10
175 262
176config MACH_IMX27LITE 263config MACH_IMX27LITE
177 bool "LogicPD MX27 LITEKIT platform" 264 bool "LogicPD MX27 LITEKIT platform"
265 select SOC_IMX27
178 select IMX_HAVE_PLATFORM_IMX_UART 266 select IMX_HAVE_PLATFORM_IMX_UART
179 help 267 help
180 Include support for MX27 LITEKIT platform. This includes specific 268 Include support for MX27 LITEKIT platform. This includes specific
@@ -182,10 +270,17 @@ config MACH_IMX27LITE
182 270
183config MACH_PCA100 271config MACH_PCA100
184 bool "Phytec phyCARD-s (pca100)" 272 bool "Phytec phyCARD-s (pca100)"
273 select SOC_IMX27
274 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
275 select IMX_HAVE_PLATFORM_IMX2_WDT
276 select IMX_HAVE_PLATFORM_IMX_FB
185 select IMX_HAVE_PLATFORM_IMX_I2C 277 select IMX_HAVE_PLATFORM_IMX_I2C
186 select IMX_HAVE_PLATFORM_IMX_SSI 278 select IMX_HAVE_PLATFORM_IMX_SSI
187 select IMX_HAVE_PLATFORM_IMX_UART 279 select IMX_HAVE_PLATFORM_IMX_UART
280 select IMX_HAVE_PLATFORM_MXC_EHCI
281 select IMX_HAVE_PLATFORM_MXC_MMC
188 select IMX_HAVE_PLATFORM_MXC_NAND 282 select IMX_HAVE_PLATFORM_MXC_NAND
283 select IMX_HAVE_PLATFORM_MXC_W1
189 select IMX_HAVE_PLATFORM_SPI_IMX 284 select IMX_HAVE_PLATFORM_SPI_IMX
190 select MXC_ULPI if USB_ULPI 285 select MXC_ULPI if USB_ULPI
191 help 286 help
@@ -194,8 +289,11 @@ config MACH_PCA100
194 289
195config MACH_MXT_TD60 290config MACH_MXT_TD60
196 bool "Maxtrack i-MXT TD60" 291 bool "Maxtrack i-MXT TD60"
292 select SOC_IMX27
293 select IMX_HAVE_PLATFORM_IMX_FB
197 select IMX_HAVE_PLATFORM_IMX_I2C 294 select IMX_HAVE_PLATFORM_IMX_I2C
198 select IMX_HAVE_PLATFORM_IMX_UART 295 select IMX_HAVE_PLATFORM_IMX_UART
296 select IMX_HAVE_PLATFORM_MXC_MMC
199 select IMX_HAVE_PLATFORM_MXC_NAND 297 select IMX_HAVE_PLATFORM_MXC_NAND
200 help 298 help
201 Include support for i-MXT (aka td60) platform. This 299 Include support for i-MXT (aka td60) platform. This
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 5582692bb176..77100bf26153 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -4,13 +4,13 @@
4 4
5# Object file lists. 5# Object file lists.
6 6
7obj-y := devices.o
8
9obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o 7obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
10 8
11obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o 9obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o
12obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o 10obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o
13 11
12obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o
13
14obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o 14obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
15obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o 15obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o
16 16
@@ -22,6 +22,10 @@ obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
22 22
23obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o 23obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
24 24
25obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
26obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o
27obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
28
25obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o 29obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
26obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o 30obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
27obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o 31obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 7988a85cf07d..3953d60bff0b 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -6,6 +6,10 @@ zreladdr-$(CONFIG_MACH_MX21) := 0xC0008000
6params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 6params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
7initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 7initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
8 8
9zreladdr-$(CONFIG_ARCH_MX25) := 0x80008000
10params_phys-$(CONFIG_ARCH_MX25) := 0x80000100
11initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000
12
9zreladdr-$(CONFIG_MACH_MX27) := 0xA0008000 13zreladdr-$(CONFIG_MACH_MX27) := 0xA0008000
10params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 14params_phys-$(CONFIG_MACH_MX27) := 0xA0000100
11initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 15initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000
diff --git a/arch/arm/mach-imx/clock-imx1.c b/arch/arm/mach-imx/clock-imx1.c
index daca30b2d5b1..3938a563b280 100644
--- a/arch/arm/mach-imx/clock-imx1.c
+++ b/arch/arm/mach-imx/clock-imx1.c
@@ -22,8 +22,7 @@
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/io.h> 24#include <linux/io.h>
25 25#include <linux/clkdev.h>
26#include <asm/clkdev.h>
27 26
28#include <mach/clock.h> 27#include <mach/clock.h>
29#include <mach/hardware.h> 28#include <mach/hardware.h>
diff --git a/arch/arm/mach-imx/clock-imx21.c b/arch/arm/mach-imx/clock-imx21.c
index cf15ea516a72..bf30a8c7ce6f 100644
--- a/arch/arm/mach-imx/clock-imx21.c
+++ b/arch/arm/mach-imx/clock-imx21.c
@@ -21,11 +21,11 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/clkdev.h>
24 25
25#include <mach/clock.h> 26#include <mach/clock.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <mach/common.h> 28#include <mach/common.h>
28#include <asm/clkdev.h>
29#include <asm/div64.h> 29#include <asm/div64.h>
30 30
31#define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) 31#define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
@@ -1185,7 +1185,7 @@ static struct clk_lookup lookups[] = {
1185 _REGISTER_CLOCK(NULL, "brom", brom_clk) 1185 _REGISTER_CLOCK(NULL, "brom", brom_clk)
1186 _REGISTER_CLOCK(NULL, "emma", emma_clk[0]) 1186 _REGISTER_CLOCK(NULL, "emma", emma_clk[0])
1187 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0]) 1187 _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0])
1188 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk) 1188 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
1189 _REGISTER_CLOCK(NULL, "gpio", gpio_clk) 1189 _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
1190 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) 1190 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
1191 _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk) 1191 _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c
new file mode 100644
index 000000000000..daa0165b6772
--- /dev/null
+++ b/arch/arm/mach-imx/clock-imx25.c
@@ -0,0 +1,331 @@
1/*
2 * Copyright (C) 2009 by Sascha Hauer, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
16 * MA 02110-1301, USA.
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/list.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24#include <linux/clkdev.h>
25
26#include <mach/clock.h>
27#include <mach/hardware.h>
28#include <mach/common.h>
29#include <mach/mx25.h>
30
31#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
32
33#define CCM_MPCTL 0x00
34#define CCM_UPCTL 0x04
35#define CCM_CCTL 0x08
36#define CCM_CGCR0 0x0C
37#define CCM_CGCR1 0x10
38#define CCM_CGCR2 0x14
39#define CCM_PCDR0 0x18
40#define CCM_PCDR1 0x1C
41#define CCM_PCDR2 0x20
42#define CCM_PCDR3 0x24
43#define CCM_RCSR 0x28
44#define CCM_CRDR 0x2C
45#define CCM_DCVR0 0x30
46#define CCM_DCVR1 0x34
47#define CCM_DCVR2 0x38
48#define CCM_DCVR3 0x3c
49#define CCM_LTR0 0x40
50#define CCM_LTR1 0x44
51#define CCM_LTR2 0x48
52#define CCM_LTR3 0x4c
53
54static unsigned long get_rate_mpll(void)
55{
56 ulong mpctl = __raw_readl(CRM_BASE + CCM_MPCTL);
57
58 return mxc_decode_pll(mpctl, 24000000);
59}
60
61static unsigned long get_rate_upll(void)
62{
63 ulong mpctl = __raw_readl(CRM_BASE + CCM_UPCTL);
64
65 return mxc_decode_pll(mpctl, 24000000);
66}
67
68unsigned long get_rate_arm(struct clk *clk)
69{
70 unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
71 unsigned long rate = get_rate_mpll();
72
73 if (cctl & (1 << 14))
74 rate = (rate * 3) >> 2;
75
76 return rate / ((cctl >> 30) + 1);
77}
78
79static unsigned long get_rate_ahb(struct clk *clk)
80{
81 unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
82
83 return get_rate_arm(NULL) / (((cctl >> 28) & 0x3) + 1);
84}
85
86static unsigned long get_rate_ipg(struct clk *clk)
87{
88 return get_rate_ahb(NULL) >> 1;
89}
90
91static unsigned long get_rate_per(int per)
92{
93 unsigned long ofs = (per & 0x3) * 8;
94 unsigned long reg = per & ~0x3;
95 unsigned long val = (readl(CRM_BASE + CCM_PCDR0 + reg) >> ofs) & 0x3f;
96 unsigned long fref;
97
98 if (readl(CRM_BASE + 0x64) & (1 << per))
99 fref = get_rate_upll();
100 else
101 fref = get_rate_ahb(NULL);
102
103 return fref / (val + 1);
104}
105
106static unsigned long get_rate_uart(struct clk *clk)
107{
108 return get_rate_per(15);
109}
110
111static unsigned long get_rate_ssi2(struct clk *clk)
112{
113 return get_rate_per(14);
114}
115
116static unsigned long get_rate_ssi1(struct clk *clk)
117{
118 return get_rate_per(13);
119}
120
121static unsigned long get_rate_i2c(struct clk *clk)
122{
123 return get_rate_per(6);
124}
125
126static unsigned long get_rate_nfc(struct clk *clk)
127{
128 return get_rate_per(8);
129}
130
131static unsigned long get_rate_gpt(struct clk *clk)
132{
133 return get_rate_per(5);
134}
135
136static unsigned long get_rate_lcdc(struct clk *clk)
137{
138 return get_rate_per(7);
139}
140
141static unsigned long get_rate_esdhc1(struct clk *clk)
142{
143 return get_rate_per(3);
144}
145
146static unsigned long get_rate_esdhc2(struct clk *clk)
147{
148 return get_rate_per(4);
149}
150
151static unsigned long get_rate_csi(struct clk *clk)
152{
153 return get_rate_per(0);
154}
155
156static unsigned long get_rate_otg(struct clk *clk)
157{
158 unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
159 unsigned long rate = get_rate_upll();
160
161 return (cctl & (1 << 23)) ? 0 : rate / ((0x3F & (cctl >> 16)) + 1);
162}
163
164static int clk_cgcr_enable(struct clk *clk)
165{
166 u32 reg;
167
168 reg = __raw_readl(clk->enable_reg);
169 reg |= 1 << clk->enable_shift;
170 __raw_writel(reg, clk->enable_reg);
171
172 return 0;
173}
174
175static void clk_cgcr_disable(struct clk *clk)
176{
177 u32 reg;
178
179 reg = __raw_readl(clk->enable_reg);
180 reg &= ~(1 << clk->enable_shift);
181 __raw_writel(reg, clk->enable_reg);
182}
183
184#define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \
185 static struct clk name = { \
186 .id = i, \
187 .enable_reg = CRM_BASE + er, \
188 .enable_shift = es, \
189 .get_rate = gr, \
190 .set_rate = sr, \
191 .enable = clk_cgcr_enable, \
192 .disable = clk_cgcr_disable, \
193 .secondary = s, \
194 }
195
196/*
197 * Note: the following IPG clock gating bits are wrongly marked "Reserved" in
198 * the i.MX25 Reference Manual Rev 1, table 15-13. The information below is
199 * taken from the Freescale released BSP.
200 *
201 * bit reg offset clock
202 *
203 * 0 CGCR1 0 AUDMUX
204 * 12 CGCR1 12 ESAI
205 * 16 CGCR1 16 GPIO1
206 * 17 CGCR1 17 GPIO2
207 * 18 CGCR1 18 GPIO3
208 * 23 CGCR1 23 I2C1
209 * 24 CGCR1 24 I2C2
210 * 25 CGCR1 25 I2C3
211 * 27 CGCR1 27 IOMUXC
212 * 28 CGCR1 28 KPP
213 * 30 CGCR1 30 OWIRE
214 * 36 CGCR2 4 RTIC
215 * 51 CGCR2 19 WDOG
216 */
217
218DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL);
219DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);
220DEFINE_CLOCK(ssi1_per_clk, 0, CCM_CGCR0, 13, get_rate_ipg, NULL, NULL);
221DEFINE_CLOCK(ssi2_per_clk, 0, CCM_CGCR0, 14, get_rate_ipg, NULL, NULL);
222DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL);
223DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL);
224DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL);
225DEFINE_CLOCK(esdhc1_ahb_clk, 0, CCM_CGCR0, 21, get_rate_esdhc1, NULL, NULL);
226DEFINE_CLOCK(esdhc1_per_clk, 0, CCM_CGCR0, 3, get_rate_esdhc1, NULL,
227 &esdhc1_ahb_clk);
228DEFINE_CLOCK(esdhc2_ahb_clk, 0, CCM_CGCR0, 22, get_rate_esdhc2, NULL, NULL);
229DEFINE_CLOCK(esdhc2_per_clk, 0, CCM_CGCR0, 4, get_rate_esdhc2, NULL,
230 &esdhc2_ahb_clk);
231DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL);
232DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL, NULL, NULL);
233DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0, 7, NULL, NULL, &lcdc_ahb_clk);
234DEFINE_CLOCK(csi_ahb_clk, 0, CCM_CGCR0, 18, get_rate_csi, NULL, NULL);
235DEFINE_CLOCK(csi_per_clk, 0, CCM_CGCR0, 0, get_rate_csi, NULL, &csi_ahb_clk);
236DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
237DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
238DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
239DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk);
240DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk);
241DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL);
242DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL);
243DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL);
244DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL);
245DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL);
246DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL);
247DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
248DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
249DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL);
250DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
251DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1, 8, get_rate_ipg, NULL, NULL);
252DEFINE_CLOCK(lcdc_clk, 0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk);
253DEFINE_CLOCK(wdt_clk, 0, CCM_CGCR2, 19, get_rate_ipg, NULL, NULL);
254DEFINE_CLOCK(ssi1_clk, 0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk);
255DEFINE_CLOCK(ssi2_clk, 1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk);
256DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGCR1, 13, get_rate_esdhc1, NULL,
257 &esdhc1_per_clk);
258DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGCR1, 14, get_rate_esdhc2, NULL,
259 &esdhc2_per_clk);
260DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL);
261DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk);
262DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL);
263DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL);
264
265#define _REGISTER_CLOCK(d, n, c) \
266 { \
267 .dev_id = d, \
268 .con_id = n, \
269 .clk = &c, \
270 },
271
272static struct clk_lookup lookups[] = {
273 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
274 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
275 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
276 _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk)
277 _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk)
278 _REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)
279 _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
280 _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
281 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
282 _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
283 _REGISTER_CLOCK("imx25-cspi.0", NULL, cspi1_clk)
284 _REGISTER_CLOCK("imx25-cspi.1", NULL, cspi2_clk)
285 _REGISTER_CLOCK("imx25-cspi.2", NULL, cspi3_clk)
286 _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk)
287 _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)
288 _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)
289 _REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)
290 _REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)
291 _REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)
292 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
293 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
294 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
295 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
296 _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
297 _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
298 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdt_clk)
299 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
300 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
301 _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk)
302 _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk)
303 _REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)
304 _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
305 _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
306 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
307};
308
309int __init mx25_clocks_init(void)
310{
311 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
312
313 /* Turn off all clocks except the ones we need to survive, namely:
314 * EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM,
315 * SCC
316 */
317 __raw_writel((1 << 19), CRM_BASE + CCM_CGCR0);
318 __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
319 __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
320#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
321 clk_enable(&uart1_clk);
322#endif
323
324 /* Clock source for lcdc and csi is upll */
325 __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0),
326 CRM_BASE + 0x64);
327
328 mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
329
330 return 0;
331}
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 98a25bada783..583f2515c1d5 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -21,8 +21,8 @@
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/clkdev.h>
24 25
25#include <asm/clkdev.h>
26#include <asm/div64.h> 26#include <asm/div64.h>
27 27
28#include <mach/clock.h> 28#include <mach/clock.h>
@@ -125,7 +125,7 @@ static int clk_cpu_set_parent(struct clk *clk, struct clk *parent)
125 if (clk->parent == parent) 125 if (clk->parent == parent)
126 return 0; 126 return 0;
127 127
128 if (mx27_revision() >= CHIP_REV_2_0) { 128 if (mx27_revision() >= IMX_CHIP_REVISION_2_0) {
129 if (parent == &mpll_main1_clk) { 129 if (parent == &mpll_main1_clk) {
130 cscr |= CCM_CSCR_ARM_SRC; 130 cscr |= CCM_CSCR_ARM_SRC;
131 } else { 131 } else {
@@ -174,7 +174,7 @@ static int set_rate_cpu(struct clk *clk, unsigned long rate)
174 div--; 174 div--;
175 175
176 reg = __raw_readl(CCM_CSCR); 176 reg = __raw_readl(CCM_CSCR);
177 if (mx27_revision() >= CHIP_REV_2_0) { 177 if (mx27_revision() >= IMX_CHIP_REVISION_2_0) {
178 reg &= ~(3 << 12); 178 reg &= ~(3 << 12);
179 reg |= div << 12; 179 reg |= div << 12;
180 reg &= ~(CCM_CSCR_FPM | CCM_CSCR_SPEN); 180 reg &= ~(CCM_CSCR_FPM | CCM_CSCR_SPEN);
@@ -244,7 +244,7 @@ static unsigned long get_rate_ssix(struct clk *clk, unsigned long pdf)
244 244
245 parent_rate = clk_get_rate(clk->parent); 245 parent_rate = clk_get_rate(clk->parent);
246 246
247 if (mx27_revision() >= CHIP_REV_2_0) 247 if (mx27_revision() >= IMX_CHIP_REVISION_2_0)
248 pdf += 4; /* MX27 TO2+ */ 248 pdf += 4; /* MX27 TO2+ */
249 else 249 else
250 pdf = (pdf < 2) ? 124UL : pdf; /* MX21 & MX27 TO1 */ 250 pdf = (pdf < 2) ? 124UL : pdf; /* MX21 & MX27 TO1 */
@@ -269,7 +269,7 @@ static unsigned long get_rate_nfc(struct clk *clk)
269 269
270 parent_rate = clk_get_rate(clk->parent); 270 parent_rate = clk_get_rate(clk->parent);
271 271
272 if (mx27_revision() >= CHIP_REV_2_0) 272 if (mx27_revision() >= IMX_CHIP_REVISION_2_0)
273 nfc_pdf = (__raw_readl(CCM_PCDR0) >> 6) & 0xf; 273 nfc_pdf = (__raw_readl(CCM_PCDR0) >> 6) & 0xf;
274 else 274 else
275 nfc_pdf = (__raw_readl(CCM_PCDR0) >> 12) & 0xf; 275 nfc_pdf = (__raw_readl(CCM_PCDR0) >> 12) & 0xf;
@@ -284,7 +284,7 @@ static unsigned long get_rate_vpu(struct clk *clk)
284 284
285 parent_rate = clk_get_rate(clk->parent); 285 parent_rate = clk_get_rate(clk->parent);
286 286
287 if (mx27_revision() >= CHIP_REV_2_0) { 287 if (mx27_revision() >= IMX_CHIP_REVISION_2_0) {
288 vpu_pdf = (__raw_readl(CCM_PCDR0) >> 10) & 0x3f; 288 vpu_pdf = (__raw_readl(CCM_PCDR0) >> 10) & 0x3f;
289 vpu_pdf += 4; 289 vpu_pdf += 4;
290 } else { 290 } else {
@@ -347,7 +347,7 @@ static unsigned long get_rate_mpll_main(struct clk *clk)
347 * clk->id == 0: arm clock source path 1 which is from 2 * MPLL / 2 347 * clk->id == 0: arm clock source path 1 which is from 2 * MPLL / 2
348 * clk->id == 1: arm clock source path 2 which is from 2 * MPLL / 3 348 * clk->id == 1: arm clock source path 2 which is from 2 * MPLL / 3
349 */ 349 */
350 if (mx27_revision() >= CHIP_REV_2_0 && clk->id == 1) 350 if (mx27_revision() >= IMX_CHIP_REVISION_2_0 && clk->id == 1)
351 return 2UL * parent_rate / 3UL; 351 return 2UL * parent_rate / 3UL;
352 352
353 return parent_rate; 353 return parent_rate;
@@ -365,7 +365,7 @@ static unsigned long get_rate_spll(struct clk *clk)
365 /* On TO2 we have to write the value back. Otherwise we 365 /* On TO2 we have to write the value back. Otherwise we
366 * read 0 from this register the next time. 366 * read 0 from this register the next time.
367 */ 367 */
368 if (mx27_revision() >= CHIP_REV_2_0) 368 if (mx27_revision() >= IMX_CHIP_REVISION_2_0)
369 __raw_writel(reg, CCM_SPCTL0); 369 __raw_writel(reg, CCM_SPCTL0);
370 370
371 return mxc_decode_pll(reg, rate); 371 return mxc_decode_pll(reg, rate);
@@ -376,7 +376,7 @@ static unsigned long get_rate_cpu(struct clk *clk)
376 u32 div; 376 u32 div;
377 unsigned long rate; 377 unsigned long rate;
378 378
379 if (mx27_revision() >= CHIP_REV_2_0) 379 if (mx27_revision() >= IMX_CHIP_REVISION_2_0)
380 div = (__raw_readl(CCM_CSCR) >> 12) & 0x3; 380 div = (__raw_readl(CCM_CSCR) >> 12) & 0x3;
381 else 381 else
382 div = (__raw_readl(CCM_CSCR) >> 13) & 0x7; 382 div = (__raw_readl(CCM_CSCR) >> 13) & 0x7;
@@ -389,7 +389,7 @@ static unsigned long get_rate_ahb(struct clk *clk)
389{ 389{
390 unsigned long rate, bclk_pdf; 390 unsigned long rate, bclk_pdf;
391 391
392 if (mx27_revision() >= CHIP_REV_2_0) 392 if (mx27_revision() >= IMX_CHIP_REVISION_2_0)
393 bclk_pdf = (__raw_readl(CCM_CSCR) >> 8) & 0x3; 393 bclk_pdf = (__raw_readl(CCM_CSCR) >> 8) & 0x3;
394 else 394 else
395 bclk_pdf = (__raw_readl(CCM_CSCR) >> 9) & 0xf; 395 bclk_pdf = (__raw_readl(CCM_CSCR) >> 9) & 0xf;
@@ -402,7 +402,7 @@ static unsigned long get_rate_ipg(struct clk *clk)
402{ 402{
403 unsigned long rate, ipg_pdf; 403 unsigned long rate, ipg_pdf;
404 404
405 if (mx27_revision() >= CHIP_REV_2_0) 405 if (mx27_revision() >= IMX_CHIP_REVISION_2_0)
406 return clk_get_rate(clk->parent); 406 return clk_get_rate(clk->parent);
407 else 407 else
408 ipg_pdf = (__raw_readl(CCM_CSCR) >> 8) & 1; 408 ipg_pdf = (__raw_readl(CCM_CSCR) >> 8) & 1;
@@ -667,7 +667,7 @@ static struct clk_lookup lookups[] = {
667 _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk) 667 _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk)
668 _REGISTER_CLOCK(NULL, "ata", ata_clk) 668 _REGISTER_CLOCK(NULL, "ata", ata_clk)
669 _REGISTER_CLOCK(NULL, "mstick", mstick_clk) 669 _REGISTER_CLOCK(NULL, "mstick", mstick_clk)
670 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk) 670 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
671 _REGISTER_CLOCK(NULL, "gpio", gpio_clk) 671 _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
672 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) 672 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
673 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) 673 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
@@ -683,7 +683,7 @@ static void __init to2_adjust_clocks(void)
683{ 683{
684 unsigned long cscr = __raw_readl(CCM_CSCR); 684 unsigned long cscr = __raw_readl(CCM_CSCR);
685 685
686 if (mx27_revision() >= CHIP_REV_2_0) { 686 if (mx27_revision() >= IMX_CHIP_REVISION_2_0) {
687 if (cscr & CCM_CSCR_ARM_SRC) 687 if (cscr & CCM_CSCR_ARM_SRC)
688 cpu_clk.parent = &mpll_main1_clk; 688 cpu_clk.parent = &mpll_main1_clk;
689 689
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c
index d8d3b2d84dc5..3b117be37bd2 100644
--- a/arch/arm/mach-imx/cpu-imx27.c
+++ b/arch/arm/mach-imx/cpu-imx27.c
@@ -42,7 +42,19 @@ static void query_silicon_parameter(void)
42 val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR 42 val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
43 + SYS_CHIP_ID)); 43 + SYS_CHIP_ID));
44 44
45 cpu_silicon_rev = (int)(val >> 28); 45 switch (val >> 28) {
46 case 0:
47 cpu_silicon_rev = IMX_CHIP_REVISION_1_0;
48 break;
49 case 1:
50 cpu_silicon_rev = IMX_CHIP_REVISION_2_0;
51 break;
52 case 2:
53 cpu_silicon_rev = IMX_CHIP_REVISION_2_1;
54 break;
55 default:
56 cpu_silicon_rev = IMX_CHIP_REVISION_UNKNOWN;
57 }
46 cpu_partnumber = (int)((val >> 12) & 0xFFFF); 58 cpu_partnumber = (int)((val >> 12) & 0xFFFF);
47} 59}
48 60
diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h
index d189039749b0..16744d2d9b81 100644
--- a/arch/arm/mach-imx/devices-imx21.h
+++ b/arch/arm/mach-imx/devices-imx21.h
@@ -9,10 +9,26 @@
9#include <mach/mx21.h> 9#include <mach/mx21.h>
10#include <mach/devices-common.h> 10#include <mach/devices-common.h>
11 11
12extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data __initconst;
13#define imx21_add_imx21_hcd(pdata) \
14 imx_add_imx21_hcd(&imx21_imx21_hcd_data, pdata)
15
16extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst;
17#define imx21_add_imx2_wdt(pdata) \
18 imx_add_imx2_wdt(&imx21_imx2_wdt_data)
19
20extern const struct imx_imx_fb_data imx21_imx_fb_data __initconst;
21#define imx21_add_imx_fb(pdata) \
22 imx_add_imx_fb(&imx21_imx_fb_data, pdata)
23
12extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst; 24extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst;
13#define imx21_add_imx_i2c(pdata) \ 25#define imx21_add_imx_i2c(pdata) \
14 imx_add_imx_i2c(&imx21_imx_i2c_data, pdata) 26 imx_add_imx_i2c(&imx21_imx_i2c_data, pdata)
15 27
28extern const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst;
29#define imx21_add_imx_keypad(pdata) \
30 imx_add_imx_keypad(&imx21_imx_keypad_data, pdata)
31
16extern const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst; 32extern const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst;
17#define imx21_add_imx_ssi(id, pdata) \ 33#define imx21_add_imx_ssi(id, pdata) \
18 imx_add_imx_ssi(&imx21_imx_ssi_data[id], pdata) 34 imx_add_imx_ssi(&imx21_imx_ssi_data[id], pdata)
@@ -25,10 +41,18 @@ extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst;
25#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata) 41#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata)
26#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata) 42#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata)
27 43
44extern const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst;
45#define imx21_add_mxc_mmc(id, pdata) \
46 imx_add_mxc_mmc(&imx21_mxc_mmc_data[id], pdata)
47
28extern const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst; 48extern const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst;
29#define imx21_add_mxc_nand(pdata) \ 49#define imx21_add_mxc_nand(pdata) \
30 imx_add_mxc_nand(&imx21_mxc_nand_data, pdata) 50 imx_add_mxc_nand(&imx21_mxc_nand_data, pdata)
31 51
52extern const struct imx_mxc_w1_data imx21_mxc_w1_data __initconst;
53#define imx21_add_mxc_w1(pdata) \
54 imx_add_mxc_w1(&imx21_mxc_w1_data)
55
32extern const struct imx_spi_imx_data imx21_cspi_data[] __initconst; 56extern const struct imx_spi_imx_data imx21_cspi_data[] __initconst;
33#define imx21_add_cspi(id, pdata) \ 57#define imx21_add_cspi(id, pdata) \
34 imx_add_spi_imx(&imx21_cspi_data[id], pdata) 58 imx_add_spi_imx(&imx21_cspi_data[id], pdata)
diff --git a/arch/arm/mach-imx/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h
new file mode 100644
index 000000000000..bde33caf1b90
--- /dev/null
+++ b/arch/arm/mach-imx/devices-imx25.h
@@ -0,0 +1,87 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <mach/mx25.h>
10#include <mach/devices-common.h>
11
12extern const struct imx_fec_data imx25_fec_data __initconst;
13#define imx25_add_fec(pdata) \
14 imx_add_fec(&imx25_fec_data, pdata)
15
16extern const struct imx_flexcan_data imx25_flexcan_data[] __initconst;
17#define imx25_add_flexcan(id, pdata) \
18 imx_add_flexcan(&imx25_flexcan_data[id], pdata)
19#define imx25_add_flexcan0(pdata) imx25_add_flexcan(0, pdata)
20#define imx25_add_flexcan1(pdata) imx25_add_flexcan(1, pdata)
21
22extern const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst;
23#define imx25_add_fsl_usb2_udc(pdata) \
24 imx_add_fsl_usb2_udc(&imx25_fsl_usb2_udc_data, pdata)
25
26extern struct imx_imxdi_rtc_data imx25_imxdi_rtc_data __initconst;
27#define imx25_add_imxdi_rtc(pdata) \
28 imx_add_imxdi_rtc(&imx25_imxdi_rtc_data)
29
30extern const struct imx_imx2_wdt_data imx25_imx2_wdt_data __initconst;
31#define imx25_add_imx2_wdt(pdata) \
32 imx_add_imx2_wdt(&imx25_imx2_wdt_data)
33
34extern const struct imx_imx_fb_data imx25_imx_fb_data __initconst;
35#define imx25_add_imx_fb(pdata) \
36 imx_add_imx_fb(&imx25_imx_fb_data, pdata)
37
38extern const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst;
39#define imx25_add_imx_i2c(id, pdata) \
40 imx_add_imx_i2c(&imx25_imx_i2c_data[id], pdata)
41#define imx25_add_imx_i2c0(pdata) imx25_add_imx_i2c(0, pdata)
42#define imx25_add_imx_i2c1(pdata) imx25_add_imx_i2c(1, pdata)
43#define imx25_add_imx_i2c2(pdata) imx25_add_imx_i2c(2, pdata)
44
45extern const struct imx_imx_keypad_data imx25_imx_keypad_data __initconst;
46#define imx25_add_imx_keypad(pdata) \
47 imx_add_imx_keypad(&imx25_imx_keypad_data, pdata)
48
49extern const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst;
50#define imx25_add_imx_ssi(id, pdata) \
51 imx_add_imx_ssi(&imx25_imx_ssi_data[id], pdata)
52
53extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst;
54#define imx25_add_imx_uart(id, pdata) \
55 imx_add_imx_uart_1irq(&imx25_imx_uart_data[id], pdata)
56#define imx25_add_imx_uart0(pdata) imx25_add_imx_uart(0, pdata)
57#define imx25_add_imx_uart1(pdata) imx25_add_imx_uart(1, pdata)
58#define imx25_add_imx_uart2(pdata) imx25_add_imx_uart(2, pdata)
59#define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata)
60#define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata)
61
62extern const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst;
63#define imx25_add_mx2_camera(pdata) \
64 imx_add_mx2_camera(&imx25_mx2_camera_data, pdata)
65
66extern const struct imx_mxc_ehci_data imx25_mxc_ehci_otg_data __initconst;
67#define imx25_add_mxc_ehci_otg(pdata) \
68 imx_add_mxc_ehci(&imx25_mxc_ehci_otg_data, pdata)
69extern const struct imx_mxc_ehci_data imx25_mxc_ehci_hs_data __initconst;
70#define imx25_add_mxc_ehci_hs(pdata) \
71 imx_add_mxc_ehci(&imx25_mxc_ehci_hs_data, pdata)
72
73extern const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst;
74#define imx25_add_mxc_nand(pdata) \
75 imx_add_mxc_nand(&imx25_mxc_nand_data, pdata)
76
77extern const struct imx_sdhci_esdhc_imx_data
78imx25_sdhci_esdhc_imx_data[] __initconst;
79#define imx25_add_sdhci_esdhc_imx(id, pdata) \
80 imx_add_sdhci_esdhc_imx(&imx25_sdhci_esdhc_imx_data[id], pdata)
81
82extern const struct imx_spi_imx_data imx25_cspi_data[] __initconst;
83#define imx25_add_spi_imx(id, pdata) \
84 imx_add_spi_imx(&imx25_spi_imx_data[id], pdata)
85#define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata)
86#define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata)
87#define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata)
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h
index 7011690364f2..f1272d4b5a33 100644
--- a/arch/arm/mach-imx/devices-imx27.h
+++ b/arch/arm/mach-imx/devices-imx27.h
@@ -13,10 +13,26 @@ extern const struct imx_fec_data imx27_fec_data __initconst;
13#define imx27_add_fec(pdata) \ 13#define imx27_add_fec(pdata) \
14 imx_add_fec(&imx27_fec_data, pdata) 14 imx_add_fec(&imx27_fec_data, pdata)
15 15
16extern const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst;
17#define imx27_add_fsl_usb2_udc(pdata) \
18 imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata)
19
20extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst;
21#define imx27_add_imx2_wdt(pdata) \
22 imx_add_imx2_wdt(&imx27_imx2_wdt_data)
23
24extern const struct imx_imx_fb_data imx27_imx_fb_data __initconst;
25#define imx27_add_imx_fb(pdata) \
26 imx_add_imx_fb(&imx27_imx_fb_data, pdata)
27
16extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst; 28extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst;
17#define imx27_add_imx_i2c(id, pdata) \ 29#define imx27_add_imx_i2c(id, pdata) \
18 imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata) 30 imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata)
19 31
32extern const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst;
33#define imx27_add_imx_keypad(pdata) \
34 imx_add_imx_keypad(&imx27_imx_keypad_data, pdata)
35
20extern const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst; 36extern const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst;
21#define imx27_add_imx_ssi(id, pdata) \ 37#define imx27_add_imx_ssi(id, pdata) \
22 imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata) 38 imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata)
@@ -31,10 +47,29 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst;
31#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata) 47#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata)
32#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata) 48#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata)
33 49
50extern const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst;
51#define imx27_add_mx2_camera(pdata) \
52 imx_add_mx2_camera(&imx27_mx2_camera_data, pdata)
53
54extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst;
55#define imx27_add_mxc_ehci_otg(pdata) \
56 imx_add_mxc_ehci(&imx27_mxc_ehci_otg_data, pdata)
57extern const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst;
58#define imx27_add_mxc_ehci_hs(id, pdata) \
59 imx_add_mxc_ehci(&imx27_mxc_ehci_hs_data[id - 1], pdata)
60
61extern const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst;
62#define imx27_add_mxc_mmc(id, pdata) \
63 imx_add_mxc_mmc(&imx27_mxc_mmc_data[id], pdata)
64
34extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst; 65extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst;
35#define imx27_add_mxc_nand(pdata) \ 66#define imx27_add_mxc_nand(pdata) \
36 imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) 67 imx_add_mxc_nand(&imx27_mxc_nand_data, pdata)
37 68
69extern const struct imx_mxc_w1_data imx27_mxc_w1_data __initconst;
70#define imx27_add_mxc_w1(pdata) \
71 imx_add_mxc_w1(&imx27_mxc_w1_data)
72
38extern const struct imx_spi_imx_data imx27_cspi_data[] __initconst; 73extern const struct imx_spi_imx_data imx27_cspi_data[] __initconst;
39#define imx27_add_cspi(id, pdata) \ 74#define imx27_add_cspi(id, pdata) \
40 imx_add_spi_imx(&imx27_cspi_data[id], pdata) 75 imx_add_spi_imx(&imx27_cspi_data[id], pdata)
diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c
deleted file mode 100644
index fba5047de8b1..000000000000
--- a/arch/arm/mach-imx/devices.c
+++ /dev/null
@@ -1,553 +0,0 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * <source@mvista.com>
4 *
5 * Based on the OMAP devices.c
6 *
7 * 2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
13 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
14 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
15 * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
16 * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version 2
21 * of the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
30 * MA 02110-1301, USA.
31 */
32#include <linux/module.h>
33#include <linux/kernel.h>
34#include <linux/init.h>
35#include <linux/platform_device.h>
36#include <linux/gpio.h>
37#include <linux/dma-mapping.h>
38#include <linux/serial.h>
39
40#include <mach/irqs.h>
41#include <mach/hardware.h>
42#include <mach/common.h>
43#include <mach/mmc.h>
44
45#include "devices.h"
46
47#if defined(CONFIG_ARCH_MX1)
48static struct resource imx1_camera_resources[] = {
49 {
50 .start = 0x00224000,
51 .end = 0x00224010,
52 .flags = IORESOURCE_MEM,
53 }, {
54 .start = MX1_CSI_INT,
55 .end = MX1_CSI_INT,
56 .flags = IORESOURCE_IRQ,
57 },
58};
59
60static u64 imx1_camera_dmamask = DMA_BIT_MASK(32);
61
62struct platform_device imx1_camera_device = {
63 .name = "mx1-camera",
64 .id = 0, /* This is used to put cameras on this interface */
65 .dev = {
66 .dma_mask = &imx1_camera_dmamask,
67 .coherent_dma_mask = DMA_BIT_MASK(32),
68 },
69 .resource = imx1_camera_resources,
70 .num_resources = ARRAY_SIZE(imx1_camera_resources),
71};
72
73static struct resource imx_rtc_resources[] = {
74 {
75 .start = 0x00204000,
76 .end = 0x00204024,
77 .flags = IORESOURCE_MEM,
78 }, {
79 .start = MX1_RTC_INT,
80 .end = MX1_RTC_INT,
81 .flags = IORESOURCE_IRQ,
82 }, {
83 .start = MX1_RTC_SAMINT,
84 .end = MX1_RTC_SAMINT,
85 .flags = IORESOURCE_IRQ,
86 },
87};
88
89struct platform_device imx_rtc_device = {
90 .name = "rtc-imx",
91 .id = 0,
92 .resource = imx_rtc_resources,
93 .num_resources = ARRAY_SIZE(imx_rtc_resources),
94};
95
96static struct resource imx_wdt_resources[] = {
97 {
98 .start = 0x00201000,
99 .end = 0x00201008,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = MX1_WDT_INT,
103 .end = MX1_WDT_INT,
104 .flags = IORESOURCE_IRQ,
105 },
106};
107
108struct platform_device imx_wdt_device = {
109 .name = "imx-wdt",
110 .id = 0,
111 .resource = imx_wdt_resources,
112 .num_resources = ARRAY_SIZE(imx_wdt_resources),
113};
114
115static struct resource imx_usb_resources[] = {
116 {
117 .start = 0x00212000,
118 .end = 0x00212148,
119 .flags = IORESOURCE_MEM,
120 }, {
121 .start = MX1_USBD_INT0,
122 .end = MX1_USBD_INT0,
123 .flags = IORESOURCE_IRQ,
124 }, {
125 .start = MX1_USBD_INT1,
126 .end = MX1_USBD_INT1,
127 .flags = IORESOURCE_IRQ,
128 }, {
129 .start = MX1_USBD_INT2,
130 .end = MX1_USBD_INT2,
131 .flags = IORESOURCE_IRQ,
132 }, {
133 .start = MX1_USBD_INT3,
134 .end = MX1_USBD_INT3,
135 .flags = IORESOURCE_IRQ,
136 }, {
137 .start = MX1_USBD_INT4,
138 .end = MX1_USBD_INT4,
139 .flags = IORESOURCE_IRQ,
140 }, {
141 .start = MX1_USBD_INT5,
142 .end = MX1_USBD_INT5,
143 .flags = IORESOURCE_IRQ,
144 }, {
145 .start = MX1_USBD_INT6,
146 .end = MX1_USBD_INT6,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151struct platform_device imx_usb_device = {
152 .name = "imx_udc",
153 .id = 0,
154 .num_resources = ARRAY_SIZE(imx_usb_resources),
155 .resource = imx_usb_resources,
156};
157
158/* GPIO port description */
159static struct mxc_gpio_port imx_gpio_ports[] = {
160 {
161 .chip.label = "gpio-0",
162 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
163 .irq = MX1_GPIO_INT_PORTA,
164 .virtual_irq_start = MXC_GPIO_IRQ_START,
165 }, {
166 .chip.label = "gpio-1",
167 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
168 .irq = MX1_GPIO_INT_PORTB,
169 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
170 }, {
171 .chip.label = "gpio-2",
172 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
173 .irq = MX1_GPIO_INT_PORTC,
174 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
175 }, {
176 .chip.label = "gpio-3",
177 .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
178 .irq = MX1_GPIO_INT_PORTD,
179 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
180 }
181};
182
183int __init imx1_register_gpios(void)
184{
185 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
186}
187#endif
188
189#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
190
191#ifdef CONFIG_MACH_MX27
192static struct resource mx27_camera_resources[] = {
193 {
194 .start = MX27_CSI_BASE_ADDR,
195 .end = MX27_CSI_BASE_ADDR + 0x1f,
196 .flags = IORESOURCE_MEM,
197 }, {
198 .start = MX27_EMMA_PRP_BASE_ADDR,
199 .end = MX27_EMMA_PRP_BASE_ADDR + 0x1f,
200 .flags = IORESOURCE_MEM,
201 }, {
202 .start = MX27_INT_CSI,
203 .end = MX27_INT_CSI,
204 .flags = IORESOURCE_IRQ,
205 },{
206 .start = MX27_INT_EMMAPRP,
207 .end = MX27_INT_EMMAPRP,
208 .flags = IORESOURCE_IRQ,
209 },
210};
211struct platform_device mx27_camera_device = {
212 .name = "mx2-camera",
213 .id = 0,
214 .num_resources = ARRAY_SIZE(mx27_camera_resources),
215 .resource = mx27_camera_resources,
216 .dev = {
217 .coherent_dma_mask = 0xffffffff,
218 },
219};
220#endif
221
222/*
223 * General Purpose Timer
224 * - i.MX21: 3 timers
225 * - i.MX27: 6 timers
226 */
227#define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq) \
228 static struct resource timer ## n ##_resources[] = { \
229 { \
230 .start = baseaddr, \
231 .end = baseaddr + SZ_4K - 1, \
232 .flags = IORESOURCE_MEM, \
233 }, { \
234 .start = irq, \
235 .end = irq, \
236 .flags = IORESOURCE_IRQ, \
237 } \
238 }; \
239 \
240 struct platform_device mxc_gpt ## n = { \
241 .name = "imx_gpt", \
242 .id = n, \
243 .num_resources = ARRAY_SIZE(timer ## n ## _resources), \
244 .resource = timer ## n ## _resources, \
245 }
246
247/* We use gpt1 as system timer, so do not add a device for this one */
248DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2);
249DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3);
250
251#ifdef CONFIG_MACH_MX27
252DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4);
253DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5);
254DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6);
255#endif
256
257/* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */
258static struct resource mxc_wdt_resources[] = {
259 {
260 .start = MX2x_WDOG_BASE_ADDR,
261 .end = MX2x_WDOG_BASE_ADDR + SZ_4K - 1,
262 .flags = IORESOURCE_MEM,
263 },
264};
265
266struct platform_device mxc_wdt = {
267 .name = "imx2-wdt",
268 .id = 0,
269 .num_resources = ARRAY_SIZE(mxc_wdt_resources),
270 .resource = mxc_wdt_resources,
271};
272
273static struct resource mxc_w1_master_resources[] = {
274 {
275 .start = MX2x_OWIRE_BASE_ADDR,
276 .end = MX2x_OWIRE_BASE_ADDR + SZ_4K - 1,
277 .flags = IORESOURCE_MEM,
278 },
279};
280
281struct platform_device mxc_w1_master_device = {
282 .name = "mxc_w1",
283 .id = 0,
284 .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
285 .resource = mxc_w1_master_resources,
286};
287
288/*
289 * lcdc:
290 * - i.MX1: the basic controller
291 * - i.MX21: to be checked
292 * - i.MX27: like i.MX1, with slightly variations
293 */
294static struct resource mxc_fb[] = {
295 {
296 .start = MX2x_LCDC_BASE_ADDR,
297 .end = MX2x_LCDC_BASE_ADDR + SZ_4K - 1,
298 .flags = IORESOURCE_MEM,
299 }, {
300 .start = MX2x_INT_LCDC,
301 .end = MX2x_INT_LCDC,
302 .flags = IORESOURCE_IRQ,
303 }
304};
305
306/* mxc lcd driver */
307struct platform_device mxc_fb_device = {
308 .name = "imx-fb",
309 .id = 0,
310 .num_resources = ARRAY_SIZE(mxc_fb),
311 .resource = mxc_fb,
312 .dev = {
313 .coherent_dma_mask = DMA_BIT_MASK(32),
314 },
315};
316
317static struct resource mxc_pwm_resources[] = {
318 {
319 .start = MX2x_PWM_BASE_ADDR,
320 .end = MX2x_PWM_BASE_ADDR + SZ_4K - 1,
321 .flags = IORESOURCE_MEM,
322 }, {
323 .start = MX2x_INT_PWM,
324 .end = MX2x_INT_PWM,
325 .flags = IORESOURCE_IRQ,
326 }
327};
328
329struct platform_device mxc_pwm_device = {
330 .name = "mxc_pwm",
331 .id = 0,
332 .num_resources = ARRAY_SIZE(mxc_pwm_resources),
333 .resource = mxc_pwm_resources,
334};
335
336#define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq) \
337 static struct resource mxc_sdhc_resources ## n[] = { \
338 { \
339 .start = baseaddr, \
340 .end = baseaddr + SZ_4K - 1, \
341 .flags = IORESOURCE_MEM, \
342 }, { \
343 .start = irq, \
344 .end = irq, \
345 .flags = IORESOURCE_IRQ, \
346 }, { \
347 .start = dmareq, \
348 .end = dmareq, \
349 .flags = IORESOURCE_DMA, \
350 }, \
351 }; \
352 \
353 static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32); \
354 \
355 struct platform_device mxc_sdhc_device ## n = { \
356 .name = "mxc-mmc", \
357 .id = n, \
358 .dev = { \
359 .dma_mask = &mxc_sdhc ## n ## _dmamask, \
360 .coherent_dma_mask = DMA_BIT_MASK(32), \
361 }, \
362 .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n), \
363 .resource = mxc_sdhc_resources ## n, \
364 }
365
366DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1);
367DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2);
368
369#ifdef CONFIG_MACH_MX27
370static struct resource otg_resources[] = {
371 {
372 .start = MX27_USBOTG_BASE_ADDR,
373 .end = MX27_USBOTG_BASE_ADDR + 0x1ff,
374 .flags = IORESOURCE_MEM,
375 }, {
376 .start = MX27_INT_USB3,
377 .end = MX27_INT_USB3,
378 .flags = IORESOURCE_IRQ,
379 },
380};
381
382static u64 otg_dmamask = DMA_BIT_MASK(32);
383
384/* OTG gadget device */
385struct platform_device mxc_otg_udc_device = {
386 .name = "fsl-usb2-udc",
387 .id = -1,
388 .dev = {
389 .dma_mask = &otg_dmamask,
390 .coherent_dma_mask = DMA_BIT_MASK(32),
391 },
392 .resource = otg_resources,
393 .num_resources = ARRAY_SIZE(otg_resources),
394};
395
396/* OTG host */
397struct platform_device mxc_otg_host = {
398 .name = "mxc-ehci",
399 .id = 0,
400 .dev = {
401 .coherent_dma_mask = DMA_BIT_MASK(32),
402 .dma_mask = &otg_dmamask,
403 },
404 .resource = otg_resources,
405 .num_resources = ARRAY_SIZE(otg_resources),
406};
407
408/* USB host 1 */
409
410static u64 usbh1_dmamask = DMA_BIT_MASK(32);
411
412static struct resource mxc_usbh1_resources[] = {
413 {
414 .start = MX27_USBOTG_BASE_ADDR + 0x200,
415 .end = MX27_USBOTG_BASE_ADDR + 0x3ff,
416 .flags = IORESOURCE_MEM,
417 }, {
418 .start = MX27_INT_USB1,
419 .end = MX27_INT_USB1,
420 .flags = IORESOURCE_IRQ,
421 },
422};
423
424struct platform_device mxc_usbh1 = {
425 .name = "mxc-ehci",
426 .id = 1,
427 .dev = {
428 .coherent_dma_mask = DMA_BIT_MASK(32),
429 .dma_mask = &usbh1_dmamask,
430 },
431 .resource = mxc_usbh1_resources,
432 .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
433};
434
435/* USB host 2 */
436static u64 usbh2_dmamask = DMA_BIT_MASK(32);
437
438static struct resource mxc_usbh2_resources[] = {
439 {
440 .start = MX27_USBOTG_BASE_ADDR + 0x400,
441 .end = MX27_USBOTG_BASE_ADDR + 0x5ff,
442 .flags = IORESOURCE_MEM,
443 }, {
444 .start = MX27_INT_USB2,
445 .end = MX27_INT_USB2,
446 .flags = IORESOURCE_IRQ,
447 },
448};
449
450struct platform_device mxc_usbh2 = {
451 .name = "mxc-ehci",
452 .id = 2,
453 .dev = {
454 .coherent_dma_mask = DMA_BIT_MASK(32),
455 .dma_mask = &usbh2_dmamask,
456 },
457 .resource = mxc_usbh2_resources,
458 .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
459};
460#endif
461
462/* GPIO port description */
463#define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq) \
464 { \
465 .chip.label = "gpio-" #n, \
466 .irq = _irq, \
467 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
468 n * 0x100), \
469 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
470 }
471
472#define DEFINE_MXC_GPIO_PORT(SOC, n) \
473 { \
474 .chip.label = "gpio-" #n, \
475 .base = SOC ## _IO_ADDRESS(MX2x_GPIO_BASE_ADDR + \
476 n * 0x100), \
477 .virtual_irq_start = MXC_GPIO_IRQ_START + n * 32, \
478 }
479
480#define DEFINE_MXC_GPIO_PORTS(SOC, pfx) \
481 static struct mxc_gpio_port pfx ## _gpio_ports[] = { \
482 DEFINE_MXC_GPIO_PORT_IRQ(SOC, 0, SOC ## _INT_GPIO), \
483 DEFINE_MXC_GPIO_PORT(SOC, 1), \
484 DEFINE_MXC_GPIO_PORT(SOC, 2), \
485 DEFINE_MXC_GPIO_PORT(SOC, 3), \
486 DEFINE_MXC_GPIO_PORT(SOC, 4), \
487 DEFINE_MXC_GPIO_PORT(SOC, 5), \
488 }
489
490#ifdef CONFIG_MACH_MX21
491DEFINE_MXC_GPIO_PORTS(MX21, imx21);
492
493int __init imx21_register_gpios(void)
494{
495 return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
496}
497#endif
498
499#ifdef CONFIG_MACH_MX27
500DEFINE_MXC_GPIO_PORTS(MX27, imx27);
501
502int __init imx27_register_gpios(void)
503{
504 return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
505}
506#endif
507
508#ifdef CONFIG_MACH_MX21
509static struct resource mx21_usbhc_resources[] = {
510 {
511 .start = MX21_USBOTG_BASE_ADDR,
512 .end = MX21_USBOTG_BASE_ADDR + SZ_8K - 1,
513 .flags = IORESOURCE_MEM,
514 },
515 {
516 .start = MX21_INT_USBHOST,
517 .end = MX21_INT_USBHOST,
518 .flags = IORESOURCE_IRQ,
519 },
520};
521
522struct platform_device mx21_usbhc_device = {
523 .name = "imx21-hcd",
524 .id = 0,
525 .dev = {
526 .dma_mask = &mx21_usbhc_device.dev.coherent_dma_mask,
527 .coherent_dma_mask = DMA_BIT_MASK(32),
528 },
529 .num_resources = ARRAY_SIZE(mx21_usbhc_resources),
530 .resource = mx21_usbhc_resources,
531};
532#endif
533
534static struct resource imx_kpp_resources[] = {
535 {
536 .start = MX2x_KPP_BASE_ADDR,
537 .end = MX2x_KPP_BASE_ADDR + 0xf,
538 .flags = IORESOURCE_MEM
539 }, {
540 .start = MX2x_INT_KPP,
541 .end = MX2x_INT_KPP,
542 .flags = IORESOURCE_IRQ,
543 },
544};
545
546struct platform_device imx_kpp_device = {
547 .name = "imx-keypad",
548 .id = -1,
549 .num_resources = ARRAY_SIZE(imx_kpp_resources),
550 .resource = imx_kpp_resources,
551};
552
553#endif
diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h
deleted file mode 100644
index 807f02a031c9..000000000000
--- a/arch/arm/mach-imx/devices.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifdef CONFIG_ARCH_MX1
2extern struct platform_device imx1_camera_device;
3extern struct platform_device imx_rtc_device;
4extern struct platform_device imx_wdt_device;
5extern struct platform_device imx_usb_device;
6#endif
7
8#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
9extern struct platform_device mxc_gpt1;
10extern struct platform_device mxc_gpt2;
11#ifdef CONFIG_MACH_MX27
12extern struct platform_device mxc_gpt3;
13extern struct platform_device mxc_gpt4;
14extern struct platform_device mxc_gpt5;
15#endif
16extern struct platform_device mxc_wdt;
17extern struct platform_device mxc_w1_master_device;
18extern struct platform_device mxc_fb_device;
19extern struct platform_device mxc_pwm_device;
20extern struct platform_device mxc_sdhc_device0;
21extern struct platform_device mxc_sdhc_device1;
22extern struct platform_device mxc_otg_udc_device;
23extern struct platform_device mx27_camera_device;
24extern struct platform_device mxc_otg_host;
25extern struct platform_device mxc_usbh1;
26extern struct platform_device mxc_usbh2;
27extern struct platform_device mx21_usbhc_device;
28extern struct platform_device imx_kpp_device;
29#endif
diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c
index 3e8c47c63bac..e9f1769b49f5 100644
--- a/arch/arm/mach-imx/dma-v1.c
+++ b/arch/arm/mach-imx/dma-v1.c
@@ -818,9 +818,11 @@ static int __init imx_dma_init(void)
818 imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR); 818 imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
819 else 819 else
820#endif 820#endif
821 BUG(); 821 return 0;
822 822
823 dma_clk = clk_get(NULL, "dma"); 823 dma_clk = clk_get(NULL, "dma");
824 if (IS_ERR(dma_clk))
825 return PTR_ERR(dma_clk);
824 clk_enable(dma_clk); 826 clk_enable(dma_clk);
825 827
826 /* reset DMA module */ 828 /* reset DMA module */
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index 7e1e9dc2c8fc..275c8589d797 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -26,20 +26,16 @@
26#include <linux/spi/ads7846.h> 26#include <linux/spi/ads7846.h>
27#include <linux/backlight.h> 27#include <linux/backlight.h>
28#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
29#include <linux/input/matrix_keypad.h>
30 29
31#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
32 31
33#include <mach/common.h> 32#include <mach/common.h>
34#include <mach/iomux-mx27.h> 33#include <mach/iomux-mx27.h>
35#include <mach/imxfb.h>
36#include <mach/hardware.h> 34#include <mach/hardware.h>
37#include <mach/mmc.h>
38#include <mach/spi.h> 35#include <mach/spi.h>
39#include <mach/audmux.h> 36#include <mach/audmux.h>
40 37
41#include "devices-imx27.h" 38#include "devices-imx27.h"
42#include "devices.h"
43 39
44static const int eukrea_mbimx27_pins[] __initconst = { 40static const int eukrea_mbimx27_pins[] __initconst = {
45 /* UART2 */ 41 /* UART2 */
@@ -111,7 +107,8 @@ static const uint32_t eukrea_mbimx27_keymap[] = {
111 KEY(1, 1, KEY_LEFT), 107 KEY(1, 1, KEY_LEFT),
112}; 108};
113 109
114static struct matrix_keymap_data eukrea_mbimx27_keymap_data = { 110static const struct matrix_keymap_data
111eukrea_mbimx27_keymap_data __initconst = {
115 .keymap = eukrea_mbimx27_keymap, 112 .keymap = eukrea_mbimx27_keymap,
116 .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap), 113 .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap),
117}; 114};
@@ -196,7 +193,7 @@ static struct imx_fb_videomode eukrea_mbimx27_modes[] = {
196 }, 193 },
197}; 194};
198 195
199static struct imx_fb_platform_data eukrea_mbimx27_fb_data = { 196static const struct imx_fb_platform_data eukrea_mbimx27_fb_data __initconst = {
200 .mode = eukrea_mbimx27_modes, 197 .mode = eukrea_mbimx27_modes,
201 .num_modes = ARRAY_SIZE(eukrea_mbimx27_modes), 198 .num_modes = ARRAY_SIZE(eukrea_mbimx27_modes),
202 199
@@ -300,7 +297,7 @@ static struct platform_device *platform_devices[] __initdata = {
300 &leds_gpio, 297 &leds_gpio,
301}; 298};
302 299
303static struct imxmmc_platform_data sdhc_pdata = { 300static const struct imxmmc_platform_data sdhc_pdata __initconst = {
304 .dat3_card_detect = 1, 301 .dat3_card_detect = 1,
305}; 302};
306 303
@@ -345,8 +342,8 @@ void __init eukrea_mbimx27_baseboard_init(void)
345 imx27_add_imx_uart3(&uart_pdata); 342 imx27_add_imx_uart3(&uart_pdata);
346#endif 343#endif
347 344
348 mxc_register_device(&mxc_fb_device, &eukrea_mbimx27_fb_data); 345 imx27_add_imx_fb(&eukrea_mbimx27_fb_data);
349 mxc_register_device(&mxc_sdhc_device0, &sdhc_pdata); 346 imx27_add_mxc_mmc(0, &sdhc_pdata);
350 347
351 i2c_register_board_info(0, eukrea_mbimx27_i2c_devices, 348 i2c_register_board_info(0, eukrea_mbimx27_i2c_devices,
352 ARRAY_SIZE(eukrea_mbimx27_i2c_devices)); 349 ARRAY_SIZE(eukrea_mbimx27_i2c_devices));
@@ -380,7 +377,7 @@ void __init eukrea_mbimx27_baseboard_init(void)
380 gpio_request(GPIO_PORTA | 25, "lcd_enable"); 377 gpio_request(GPIO_PORTA | 25, "lcd_enable");
381 platform_device_register(&eukrea_mbimx27_lcd_powerdev); 378 platform_device_register(&eukrea_mbimx27_lcd_powerdev);
382 379
383 mxc_register_device(&imx_kpp_device, &eukrea_mbimx27_keymap_data); 380 imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data);
384 381
385 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 382 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
386} 383}
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
new file mode 100644
index 000000000000..cb705c28de02
--- /dev/null
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -0,0 +1,296 @@
1/*
2 * Copyright (C) 2010 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm970-baseboard.c which is :
5 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22#include <linux/gpio.h>
23#include <linux/leds.h>
24#include <linux/platform_device.h>
25#include <linux/gpio_keys.h>
26#include <linux/input.h>
27#include <video/platform_lcd.h>
28
29#include <mach/hardware.h>
30#include <mach/iomux-mx25.h>
31#include <mach/common.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <mach/mx25.h>
35#include <mach/imx-uart.h>
36#include <mach/audmux.h>
37
38#include "devices-imx25.h"
39
40static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
41 /* LCD */
42 MX25_PAD_LD0__LD0,
43 MX25_PAD_LD1__LD1,
44 MX25_PAD_LD2__LD2,
45 MX25_PAD_LD3__LD3,
46 MX25_PAD_LD4__LD4,
47 MX25_PAD_LD5__LD5,
48 MX25_PAD_LD6__LD6,
49 MX25_PAD_LD7__LD7,
50 MX25_PAD_LD8__LD8,
51 MX25_PAD_LD9__LD9,
52 MX25_PAD_LD10__LD10,
53 MX25_PAD_LD11__LD11,
54 MX25_PAD_LD12__LD12,
55 MX25_PAD_LD13__LD13,
56 MX25_PAD_LD14__LD14,
57 MX25_PAD_LD15__LD15,
58 MX25_PAD_GPIO_E__LD16,
59 MX25_PAD_GPIO_F__LD17,
60 MX25_PAD_HSYNC__HSYNC,
61 MX25_PAD_VSYNC__VSYNC,
62 MX25_PAD_LSCLK__LSCLK,
63 MX25_PAD_OE_ACD__OE_ACD,
64 MX25_PAD_CONTRAST__CONTRAST,
65 /* LCD_PWR */
66 MX25_PAD_PWM__GPIO_1_26,
67 /* LED */
68 MX25_PAD_POWER_FAIL__GPIO_3_19,
69 /* SWITCH */
70 MX25_PAD_VSTBY_ACK__GPIO_3_18,
71 /* UART2 */
72 MX25_PAD_UART2_RTS__UART2_RTS,
73 MX25_PAD_UART2_CTS__UART2_CTS,
74 MX25_PAD_UART2_TXD__UART2_TXD,
75 MX25_PAD_UART2_RXD__UART2_RXD,
76 /* SD1 */
77 MX25_PAD_SD1_CMD__SD1_CMD,
78 MX25_PAD_SD1_CLK__SD1_CLK,
79 MX25_PAD_SD1_DATA0__SD1_DATA0,
80 MX25_PAD_SD1_DATA1__SD1_DATA1,
81 MX25_PAD_SD1_DATA2__SD1_DATA2,
82 MX25_PAD_SD1_DATA3__SD1_DATA3,
83 /* SD1 CD */
84 MX25_PAD_DE_B__GPIO_2_20,
85 /* I2S */
86 MX25_PAD_KPP_COL3__AUD5_TXFS,
87 MX25_PAD_KPP_COL2__AUD5_TXC,
88 MX25_PAD_KPP_COL1__AUD5_RXD,
89 MX25_PAD_KPP_COL0__AUD5_TXD,
90 /* CAN */
91 MX25_PAD_GPIO_D__CAN2_RX,
92 MX25_PAD_GPIO_C__CAN2_TX,
93};
94
95#define GPIO_LED1 83
96#define GPIO_SWITCH1 82
97#define GPIO_SD1CD 52
98#define GPIO_LCDPWR 26
99
100static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
101 {
102 .mode = {
103 .name = "CMO-QVGA",
104 .refresh = 60,
105 .xres = 320,
106 .yres = 240,
107 .pixclock = KHZ2PICOS(6500),
108 .left_margin = 30,
109 .right_margin = 38,
110 .upper_margin = 20,
111 .lower_margin = 3,
112 .hsync_len = 15,
113 .vsync_len = 4,
114 },
115 .bpp = 16,
116 .pcr = 0xCAD08B80,
117 }, {
118 .mode = {
119 .name = "DVI-VGA",
120 .refresh = 60,
121 .xres = 640,
122 .yres = 480,
123 .pixclock = 32000,
124 .hsync_len = 7,
125 .left_margin = 100,
126 .right_margin = 100,
127 .vsync_len = 7,
128 .upper_margin = 7,
129 .lower_margin = 100,
130 },
131 .pcr = 0xFA208B80,
132 .bpp = 16,
133 }, {
134 .mode = {
135 .name = "DVI-SVGA",
136 .refresh = 60,
137 .xres = 800,
138 .yres = 600,
139 .pixclock = 25000,
140 .hsync_len = 7,
141 .left_margin = 75,
142 .right_margin = 75,
143 .vsync_len = 7,
144 .upper_margin = 7,
145 .lower_margin = 75,
146 },
147 .pcr = 0xFA208B80,
148 .bpp = 16,
149 },
150};
151
152static const struct imx_fb_platform_data eukrea_mximxsd_fb_pdata __initconst = {
153 .mode = eukrea_mximxsd_modes,
154 .num_modes = ARRAY_SIZE(eukrea_mximxsd_modes),
155 .pwmr = 0x00A903FF,
156 .lscr1 = 0x00120300,
157 .dmacr = 0x00040060,
158};
159
160static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
161 unsigned int power)
162{
163 if (power)
164 gpio_direction_output(GPIO_LCDPWR, 1);
165 else
166 gpio_direction_output(GPIO_LCDPWR, 0);
167}
168
169static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
170 .set_power = eukrea_mbimxsd_lcd_power_set,
171};
172
173static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
174 .name = "platform-lcd",
175 .dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
176};
177
178static struct gpio_led eukrea_mbimxsd_leds[] = {
179 {
180 .name = "led1",
181 .default_trigger = "heartbeat",
182 .active_low = 1,
183 .gpio = GPIO_LED1,
184 },
185};
186
187static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
188 .leds = eukrea_mbimxsd_leds,
189 .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
190};
191
192static struct platform_device eukrea_mbimxsd_leds_gpio = {
193 .name = "leds-gpio",
194 .id = -1,
195 .dev = {
196 .platform_data = &eukrea_mbimxsd_led_info,
197 },
198};
199
200static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
201 {
202 .gpio = GPIO_SWITCH1,
203 .code = BTN_0,
204 .desc = "BP1",
205 .active_low = 1,
206 .wakeup = 1,
207 },
208};
209
210static struct gpio_keys_platform_data eukrea_mbimxsd_button_data = {
211 .buttons = eukrea_mbimxsd_gpio_buttons,
212 .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
213};
214
215static struct platform_device eukrea_mbimxsd_button_device = {
216 .name = "gpio-keys",
217 .id = -1,
218 .num_resources = 0,
219 .dev = {
220 .platform_data = &eukrea_mbimxsd_button_data,
221 }
222};
223
224static struct platform_device *platform_devices[] __initdata = {
225 &eukrea_mbimxsd_leds_gpio,
226 &eukrea_mbimxsd_button_device,
227 &eukrea_mbimxsd_lcd_powerdev,
228};
229
230static const struct imxuart_platform_data uart_pdata __initconst = {
231 .flags = IMXUART_HAVE_RTSCTS,
232};
233
234static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
235 {
236 I2C_BOARD_INFO("tlv320aic23", 0x1a),
237 },
238};
239
240static const
241struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
242 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
243};
244
245/*
246 * system init for baseboard usage. Will be called by cpuimx25 init.
247 *
248 * Add platform devices present on this baseboard and init
249 * them from CPU side as far as required to use them later on
250 */
251void __init eukrea_mbimxsd25_baseboard_init(void)
252{
253 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
254 ARRAY_SIZE(eukrea_mbimxsd_pads)))
255 printk(KERN_ERR "error setting mbimxsd pads !\n");
256
257#if defined(CONFIG_SND_SOC_EUKREA_TLV320)
258 /* SSI unit master I2S codec connected to SSI_AUD5*/
259 mxc_audmux_v2_configure_port(0,
260 MXC_AUDMUX_V2_PTCR_SYN |
261 MXC_AUDMUX_V2_PTCR_TFSDIR |
262 MXC_AUDMUX_V2_PTCR_TFSEL(4) |
263 MXC_AUDMUX_V2_PTCR_TCLKDIR |
264 MXC_AUDMUX_V2_PTCR_TCSEL(4),
265 MXC_AUDMUX_V2_PDCR_RXDSEL(4)
266 );
267 mxc_audmux_v2_configure_port(4,
268 MXC_AUDMUX_V2_PTCR_SYN,
269 MXC_AUDMUX_V2_PDCR_RXDSEL(0)
270 );
271#endif
272
273 imx25_add_imx_uart1(&uart_pdata);
274 imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata);
275 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
276
277 imx25_add_flexcan1(NULL);
278 imx25_add_sdhci_esdhc_imx(0, NULL);
279
280 gpio_request(GPIO_LED1, "LED1");
281 gpio_direction_output(GPIO_LED1, 1);
282 gpio_free(GPIO_LED1);
283
284 gpio_request(GPIO_SWITCH1, "SWITCH1");
285 gpio_direction_input(GPIO_SWITCH1);
286 gpio_free(GPIO_SWITCH1);
287
288 gpio_request(GPIO_LCDPWR, "LCDPWR");
289 gpio_direction_output(GPIO_LCDPWR, 1);
290 gpio_free(GPIO_SWITCH1);
291
292 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
293 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
294
295 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
296}
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 745ee60fb068..6cf04da2456a 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -28,7 +28,6 @@
28#include <linux/serial_8250.h> 28#include <linux/serial_8250.h>
29#include <linux/usb/otg.h> 29#include <linux/usb/otg.h>
30#include <linux/usb/ulpi.h> 30#include <linux/usb/ulpi.h>
31#include <linux/fsl_devices.h>
32 31
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -40,11 +39,9 @@
40#include <mach/hardware.h> 39#include <mach/hardware.h>
41#include <mach/iomux-mx27.h> 40#include <mach/iomux-mx27.h>
42#include <mach/mxc_nand.h> 41#include <mach/mxc_nand.h>
43#include <mach/mxc_ehci.h>
44#include <mach/ulpi.h> 42#include <mach/ulpi.h>
45 43
46#include "devices-imx27.h" 44#include "devices-imx27.h"
47#include "devices.h"
48 45
49static const int eukrea_cpuimx27_pins[] __initconst = { 46static const int eukrea_cpuimx27_pins[] __initconst = {
50 /* UART1 */ 47 /* UART1 */
@@ -157,8 +154,6 @@ cpuimx27_nand_board_info __initconst = {
157 154
158static struct platform_device *platform_devices[] __initdata = { 155static struct platform_device *platform_devices[] __initdata = {
159 &eukrea_cpuimx27_nor_mtd_device, 156 &eukrea_cpuimx27_nor_mtd_device,
160 &mxc_wdt,
161 &mxc_w1_master_device,
162}; 157};
163 158
164static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = { 159static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
@@ -215,18 +210,18 @@ static struct platform_device serial_device = {
215#endif 210#endif
216 211
217#if defined(CONFIG_USB_ULPI) 212#if defined(CONFIG_USB_ULPI)
218static struct mxc_usbh_platform_data otg_pdata = { 213static struct mxc_usbh_platform_data otg_pdata __initdata = {
219 .portsc = MXC_EHCI_MODE_ULPI, 214 .portsc = MXC_EHCI_MODE_ULPI,
220 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 215 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
221}; 216};
222 217
223static struct mxc_usbh_platform_data usbh2_pdata = { 218static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
224 .portsc = MXC_EHCI_MODE_ULPI, 219 .portsc = MXC_EHCI_MODE_ULPI,
225 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 220 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
226}; 221};
227#endif 222#endif
228 223
229static struct fsl_usb2_platform_data otg_device_pdata = { 224static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
230 .operating_mode = FSL_USB2_DR_DEVICE, 225 .operating_mode = FSL_USB2_DR_DEVICE,
231 .phy_mode = FSL_USB2_PHY_ULPI, 226 .phy_mode = FSL_USB2_PHY_ULPI,
232}; 227};
@@ -262,10 +257,12 @@ static void __init eukrea_cpuimx27_init(void)
262 257
263 imx27_add_fec(NULL); 258 imx27_add_fec(NULL);
264 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 259 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
260 imx27_add_imx2_wdt(NULL);
261 imx27_add_mxc_w1(NULL);
265 262
266#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) 263#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
267 /* SDHC2 can be used for Wifi */ 264 /* SDHC2 can be used for Wifi */
268 mxc_register_device(&mxc_sdhc_device1, NULL); 265 imx27_add_mxc_mmc(1, NULL);
269#endif 266#endif
270#if defined(MACH_EUKREA_CPUIMX27_USEUART4) 267#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
271 /* in which case UART4 is also used for Bluetooth */ 268 /* in which case UART4 is also used for Bluetooth */
@@ -281,16 +278,16 @@ static void __init eukrea_cpuimx27_init(void)
281 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 278 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
282 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 279 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
283 280
284 mxc_register_device(&mxc_otg_host, &otg_pdata); 281 imx27_add_mxc_ehci_otg(&otg_pdata);
285 } 282 }
286 283
287 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 284 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
288 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 285 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
289 286
290 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 287 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
291#endif 288#endif
292 if (!otg_mode_host) 289 if (!otg_mode_host)
293 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 290 imx27_add_fsl_usb2_udc(&otg_device_pdata);
294 291
295#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD 292#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
296 eukrea_mbimx27_baseboard_init(); 293 eukrea_mbimx27_baseboard_init();
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
new file mode 100644
index 000000000000..eb395aba9237
--- /dev/null
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -0,0 +1,161 @@
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 * Copyright 2010 Eric Bénard - Eukréa Electromatique, <eric@eukrea.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
17 * Boston, MA 02110-1301, USA.
18 */
19
20#include <linux/types.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/clk.h>
24#include <linux/irq.h>
25#include <linux/gpio.h>
26#include <linux/platform_device.h>
27#include <linux/usb/otg.h>
28#include <linux/usb/ulpi.h>
29
30#include <mach/eukrea-baseboards.h>
31#include <mach/hardware.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/time.h>
35#include <asm/memory.h>
36#include <asm/mach/map.h>
37#include <mach/common.h>
38#include <mach/mx25.h>
39#include <mach/mxc_nand.h>
40#include <mach/imxfb.h>
41#include <mach/iomux-mx25.h>
42
43#include "devices-imx25.h"
44
45static const struct imxuart_platform_data uart_pdata __initconst = {
46 .flags = IMXUART_HAVE_RTSCTS,
47};
48
49static iomux_v3_cfg_t eukrea_cpuimx25_pads[] = {
50 /* FEC - RMII */
51 MX25_PAD_FEC_MDC__FEC_MDC,
52 MX25_PAD_FEC_MDIO__FEC_MDIO,
53 MX25_PAD_FEC_TDATA0__FEC_TDATA0,
54 MX25_PAD_FEC_TDATA1__FEC_TDATA1,
55 MX25_PAD_FEC_TX_EN__FEC_TX_EN,
56 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
57 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
58 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
59 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
60 /* I2C1 */
61 MX25_PAD_I2C1_CLK__I2C1_CLK,
62 MX25_PAD_I2C1_DAT__I2C1_DAT,
63};
64
65static const struct fec_platform_data mx25_fec_pdata __initconst = {
66 .phy = PHY_INTERFACE_MODE_RMII,
67};
68
69static const struct mxc_nand_platform_data
70eukrea_cpuimx25_nand_board_info __initconst = {
71 .width = 1,
72 .hw_ecc = 1,
73 .flash_bbt = 1,
74};
75
76static const struct imxi2c_platform_data
77eukrea_cpuimx25_i2c0_data __initconst = {
78 .bitrate = 100000,
79};
80
81static struct i2c_board_info eukrea_cpuimx25_i2c_devices[] = {
82 {
83 I2C_BOARD_INFO("pcf8563", 0x51),
84 },
85};
86
87static const struct mxc_usbh_platform_data otg_pdata __initconst = {
88 .portsc = MXC_EHCI_MODE_UTMI,
89 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
90};
91
92static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
93 .portsc = MXC_EHCI_MODE_SERIAL,
94 .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
95 MXC_EHCI_IPPUE_DOWN,
96};
97
98static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
99 .operating_mode = FSL_USB2_DR_DEVICE,
100 .phy_mode = FSL_USB2_PHY_UTMI,
101};
102
103static int otg_mode_host;
104
105static int __init eukrea_cpuimx25_otg_mode(char *options)
106{
107 if (!strcmp(options, "host"))
108 otg_mode_host = 1;
109 else if (!strcmp(options, "device"))
110 otg_mode_host = 0;
111 else
112 pr_info("otg_mode neither \"host\" nor \"device\". "
113 "Defaulting to device\n");
114 return 0;
115}
116__setup("otg_mode=", eukrea_cpuimx25_otg_mode);
117
118static void __init eukrea_cpuimx25_init(void)
119{
120 if (mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
121 ARRAY_SIZE(eukrea_cpuimx25_pads)))
122 printk(KERN_ERR "error setting cpuimx25 pads !\n");
123
124 imx25_add_imx_uart0(&uart_pdata);
125 imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info);
126 imx25_add_imxdi_rtc(NULL);
127 imx25_add_fec(&mx25_fec_pdata);
128
129 i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices,
130 ARRAY_SIZE(eukrea_cpuimx25_i2c_devices));
131 imx25_add_imx_i2c0(&eukrea_cpuimx25_i2c0_data);
132
133 if (otg_mode_host)
134 imx25_add_mxc_ehci_otg(&otg_pdata);
135 else
136 imx25_add_fsl_usb2_udc(&otg_device_pdata);
137
138 imx25_add_mxc_ehci_hs(&usbh2_pdata);
139
140#ifdef CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD
141 eukrea_mbimxsd25_baseboard_init();
142#endif
143}
144
145static void __init eukrea_cpuimx25_timer_init(void)
146{
147 mx25_clocks_init();
148}
149
150static struct sys_timer eukrea_cpuimx25_timer = {
151 .init = eukrea_cpuimx25_timer_init,
152};
153
154MACHINE_START(EUKREA_CPUIMX25, "Eukrea CPUIMX25")
155 /* Maintainer: Eukrea Electromatique */
156 .boot_params = MX25_PHYS_OFFSET + 0x100,
157 .map_io = mx25_map_io,
158 .init_irq = mx25_init_irq,
159 .init_machine = eukrea_cpuimx25_init,
160 .timer = &eukrea_cpuimx25_timer,
161MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 59716fab586d..40a3666ea632 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -34,12 +34,9 @@
34#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/mach/time.h> 35#include <asm/mach/time.h>
36#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/mmc.h>
38#include <mach/iomux.h> 37#include <mach/iomux.h>
39#include <mach/mxc_ehci.h>
40 38
41#include "devices-imx27.h" 39#include "devices-imx27.h"
42#include "devices.h"
43 40
44#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17) 41#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
45#define SDHC1_IRQ IRQ_GPIOB(25) 42#define SDHC1_IRQ IRQ_GPIOB(25)
@@ -156,7 +153,7 @@ static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
156 free_irq(SDHC1_IRQ, data); 153 free_irq(SDHC1_IRQ, data);
157} 154}
158 155
159static struct imxmmc_platform_data visstrim_m10_sdhc_pdata = { 156static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
160 .init = visstrim_m10_sdhc1_init, 157 .init = visstrim_m10_sdhc1_init,
161 .exit = visstrim_m10_sdhc1_exit, 158 .exit = visstrim_m10_sdhc1_exit,
162}; 159};
@@ -216,7 +213,8 @@ static int otg_phy_init(struct platform_device *pdev)
216 return 0; 213 return 0;
217} 214}
218 215
219static struct mxc_usbh_platform_data visstrim_m10_usbotg_pdata = { 216static const struct mxc_usbh_platform_data
217visstrim_m10_usbotg_pdata __initconst = {
220 .init = otg_phy_init, 218 .init = otg_phy_init,
221 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 219 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
222 .flags = MXC_EHCI_POWER_PINS_ENABLED, 220 .flags = MXC_EHCI_POWER_PINS_ENABLED,
@@ -237,8 +235,8 @@ static void __init visstrim_m10_board_init(void)
237 ARRAY_SIZE(visstrim_m10_i2c_devices)); 235 ARRAY_SIZE(visstrim_m10_i2c_devices));
238 imx27_add_imx_i2c(0, &visstrim_m10_i2c_data); 236 imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
239 imx27_add_imx_i2c(1, &visstrim_m10_i2c_data); 237 imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
240 mxc_register_device(&mxc_sdhc_device0, &visstrim_m10_sdhc_pdata); 238 imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
241 mxc_register_device(&mxc_otg_host, &visstrim_m10_usbotg_pdata); 239 imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
242 imx27_add_fec(NULL); 240 imx27_add_fec(NULL);
243 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 241 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
244} 242}
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index bbdbc75127d3..3a1202e47212 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -25,7 +25,6 @@
25#include <mach/iomux-mx27.h> 25#include <mach/iomux-mx27.h>
26 26
27#include "devices-imx27.h" 27#include "devices-imx27.h"
28#include "devices.h"
29 28
30static const int mx27lite_pins[] __initconst = { 29static const int mx27lite_pins[] __initconst = {
31 /* UART1 */ 30 /* UART1 */
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 6187ce9ba7d5..1f446e5eb636 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -30,7 +30,6 @@
30#include <mach/irqs.h> 30#include <mach/irqs.h>
31 31
32#include "devices-imx1.h" 32#include "devices-imx1.h"
33#include "devices.h"
34 33
35static const int mx1ads_pins[] __initconst = { 34static const int mx1ads_pins[] __initconst = {
36 /* UART1 */ 35 /* UART1 */
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index e1282e9f50ff..0a372577c2ac 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -24,13 +24,10 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/time.h> 25#include <asm/mach/time.h>
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27#include <mach/imxfb.h>
28#include <mach/iomux-mx21.h> 27#include <mach/iomux-mx21.h>
29#include <mach/mxc_nand.h> 28#include <mach/mxc_nand.h>
30#include <mach/mmc.h>
31 29
32#include "devices-imx21.h" 30#include "devices-imx21.h"
33#include "devices.h"
34 31
35/* 32/*
36 * Memory-mapped I/O on MX21ADS base board 33 * Memory-mapped I/O on MX21ADS base board
@@ -213,7 +210,7 @@ static struct imx_fb_videomode mx21ads_modes[] = {
213 }, 210 },
214}; 211};
215 212
216static struct imx_fb_platform_data mx21ads_fb_data = { 213static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
217 .mode = mx21ads_modes, 214 .mode = mx21ads_modes,
218 .num_modes = ARRAY_SIZE(mx21ads_modes), 215 .num_modes = ARRAY_SIZE(mx21ads_modes),
219 216
@@ -233,15 +230,8 @@ static int mx21ads_sdhc_get_ro(struct device *dev)
233static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq, 230static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
234 void *data) 231 void *data)
235{ 232{
236 int ret; 233 return request_irq(IRQ_GPIOD(25), detect_irq,
237
238 ret = request_irq(IRQ_GPIOD(25), detect_irq,
239 IRQF_TRIGGER_FALLING, "mmc-detect", data); 234 IRQF_TRIGGER_FALLING, "mmc-detect", data);
240 if (ret)
241 goto out;
242 return 0;
243out:
244 return ret;
245} 235}
246 236
247static void mx21ads_sdhc_exit(struct device *dev, void *data) 237static void mx21ads_sdhc_exit(struct device *dev, void *data)
@@ -249,7 +239,7 @@ static void mx21ads_sdhc_exit(struct device *dev, void *data)
249 free_irq(IRQ_GPIOD(25), data); 239 free_irq(IRQ_GPIOD(25), data);
250} 240}
251 241
252static struct imxmmc_platform_data mx21ads_sdhc_pdata = { 242static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
253 .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */ 243 .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */
254 .get_ro = mx21ads_sdhc_get_ro, 244 .get_ro = mx21ads_sdhc_get_ro,
255 .init = mx21ads_sdhc_init, 245 .init = mx21ads_sdhc_init,
@@ -296,8 +286,8 @@ static void __init mx21ads_board_init(void)
296 imx21_add_imx_uart0(&uart_pdata_rts); 286 imx21_add_imx_uart0(&uart_pdata_rts);
297 imx21_add_imx_uart2(&uart_pdata_norts); 287 imx21_add_imx_uart2(&uart_pdata_norts);
298 imx21_add_imx_uart3(&uart_pdata_rts); 288 imx21_add_imx_uart3(&uart_pdata_rts);
299 mxc_register_device(&mxc_fb_device, &mx21ads_fb_data); 289 imx21_add_imx_fb(&mx21ads_fb_data);
300 mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata); 290 imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata);
301 imx21_add_mxc_nand(&mx21ads_nand_board_info); 291 imx21_add_mxc_nand(&mx21ads_nand_board_info);
302 292
303 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 293 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
new file mode 100644
index 000000000000..aa76cfd9f348
--- /dev/null
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -0,0 +1,235 @@
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
19/*
20 * This machine is known as:
21 * - i.MX25 3-Stack Development System
22 * - i.MX25 Platform Development Kit (i.MX25 PDK)
23 */
24
25#include <linux/types.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/clk.h>
29#include <linux/irq.h>
30#include <linux/gpio.h>
31#include <linux/platform_device.h>
32#include <linux/input/matrix_keypad.h>
33#include <linux/usb/otg.h>
34
35#include <mach/hardware.h>
36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/time.h>
39#include <asm/memory.h>
40#include <asm/mach/map.h>
41#include <mach/common.h>
42#include <mach/mx25.h>
43#include <mach/iomux-mx25.h>
44
45#include "devices-imx25.h"
46
47static const struct imxuart_platform_data uart_pdata __initconst = {
48 .flags = IMXUART_HAVE_RTSCTS,
49};
50
51static iomux_v3_cfg_t mx25pdk_pads[] = {
52 MX25_PAD_FEC_MDC__FEC_MDC,
53 MX25_PAD_FEC_MDIO__FEC_MDIO,
54 MX25_PAD_FEC_TDATA0__FEC_TDATA0,
55 MX25_PAD_FEC_TDATA1__FEC_TDATA1,
56 MX25_PAD_FEC_TX_EN__FEC_TX_EN,
57 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
58 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
59 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
60 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
61 MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
62 MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
63
64 /* LCD */
65 MX25_PAD_LD0__LD0,
66 MX25_PAD_LD1__LD1,
67 MX25_PAD_LD2__LD2,
68 MX25_PAD_LD3__LD3,
69 MX25_PAD_LD4__LD4,
70 MX25_PAD_LD5__LD5,
71 MX25_PAD_LD6__LD6,
72 MX25_PAD_LD7__LD7,
73 MX25_PAD_LD8__LD8,
74 MX25_PAD_LD9__LD9,
75 MX25_PAD_LD10__LD10,
76 MX25_PAD_LD11__LD11,
77 MX25_PAD_LD12__LD12,
78 MX25_PAD_LD13__LD13,
79 MX25_PAD_LD14__LD14,
80 MX25_PAD_LD15__LD15,
81 MX25_PAD_GPIO_E__LD16,
82 MX25_PAD_GPIO_F__LD17,
83 MX25_PAD_HSYNC__HSYNC,
84 MX25_PAD_VSYNC__VSYNC,
85 MX25_PAD_LSCLK__LSCLK,
86 MX25_PAD_OE_ACD__OE_ACD,
87 MX25_PAD_CONTRAST__CONTRAST,
88
89 /* Keypad */
90 MX25_PAD_KPP_ROW0__KPP_ROW0,
91 MX25_PAD_KPP_ROW1__KPP_ROW1,
92 MX25_PAD_KPP_ROW2__KPP_ROW2,
93 MX25_PAD_KPP_ROW3__KPP_ROW3,
94 MX25_PAD_KPP_COL0__KPP_COL0,
95 MX25_PAD_KPP_COL1__KPP_COL1,
96 MX25_PAD_KPP_COL2__KPP_COL2,
97 MX25_PAD_KPP_COL3__KPP_COL3,
98
99 /* SD1 */
100 MX25_PAD_SD1_CMD__SD1_CMD,
101 MX25_PAD_SD1_CLK__SD1_CLK,
102 MX25_PAD_SD1_DATA0__SD1_DATA0,
103 MX25_PAD_SD1_DATA1__SD1_DATA1,
104 MX25_PAD_SD1_DATA2__SD1_DATA2,
105 MX25_PAD_SD1_DATA3__SD1_DATA3,
106};
107
108static const struct fec_platform_data mx25_fec_pdata __initconst = {
109 .phy = PHY_INTERFACE_MODE_RMII,
110};
111
112#define FEC_ENABLE_GPIO 35
113#define FEC_RESET_B_GPIO 104
114
115static void __init mx25pdk_fec_reset(void)
116{
117 gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
118 gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
119
120 gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */
121 gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
122 udelay(2);
123
124 /* turn on PHY power and lift reset */
125 gpio_set_value(FEC_ENABLE_GPIO, 1);
126 gpio_set_value(FEC_RESET_B_GPIO, 1);
127}
128
129static const struct mxc_nand_platform_data
130mx25pdk_nand_board_info __initconst = {
131 .width = 1,
132 .hw_ecc = 1,
133 .flash_bbt = 1,
134};
135
136static struct imx_fb_videomode mx25pdk_modes[] = {
137 {
138 .mode = {
139 .name = "CRT-VGA",
140 .refresh = 60,
141 .xres = 640,
142 .yres = 480,
143 .pixclock = 39683,
144 .left_margin = 45,
145 .right_margin = 114,
146 .upper_margin = 33,
147 .lower_margin = 11,
148 .hsync_len = 1,
149 .vsync_len = 1,
150 },
151 .bpp = 16,
152 .pcr = 0xFA208B80,
153 },
154};
155
156static const struct imx_fb_platform_data mx25pdk_fb_pdata __initconst = {
157 .mode = mx25pdk_modes,
158 .num_modes = ARRAY_SIZE(mx25pdk_modes),
159 .pwmr = 0x00A903FF,
160 .lscr1 = 0x00120300,
161 .dmacr = 0x00020010,
162};
163
164static const uint32_t mx25pdk_keymap[] = {
165 KEY(0, 0, KEY_UP),
166 KEY(0, 1, KEY_DOWN),
167 KEY(0, 2, KEY_VOLUMEDOWN),
168 KEY(0, 3, KEY_HOME),
169 KEY(1, 0, KEY_RIGHT),
170 KEY(1, 1, KEY_LEFT),
171 KEY(1, 2, KEY_ENTER),
172 KEY(1, 3, KEY_VOLUMEUP),
173 KEY(2, 0, KEY_F6),
174 KEY(2, 1, KEY_F8),
175 KEY(2, 2, KEY_F9),
176 KEY(2, 3, KEY_F10),
177 KEY(3, 0, KEY_F1),
178 KEY(3, 1, KEY_F2),
179 KEY(3, 2, KEY_F3),
180 KEY(3, 3, KEY_POWER),
181};
182
183static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = {
184 .keymap = mx25pdk_keymap,
185 .keymap_size = ARRAY_SIZE(mx25pdk_keymap),
186};
187
188static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
189 .portsc = MXC_EHCI_MODE_SERIAL,
190 .flags = MXC_EHCI_INTERNAL_PHY,
191};
192
193static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
194 .operating_mode = FSL_USB2_DR_DEVICE,
195 .phy_mode = FSL_USB2_PHY_UTMI,
196};
197
198static void __init mx25pdk_init(void)
199{
200 mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
201 ARRAY_SIZE(mx25pdk_pads));
202
203 imx25_add_imx_uart0(&uart_pdata);
204 imx25_add_fsl_usb2_udc(&otg_device_pdata);
205 imx25_add_mxc_ehci_hs(&usbh2_pdata);
206 imx25_add_mxc_nand(&mx25pdk_nand_board_info);
207 imx25_add_imxdi_rtc(NULL);
208 imx25_add_imx_fb(&mx25pdk_fb_pdata);
209 imx25_add_imx2_wdt(NULL);
210
211 mx25pdk_fec_reset();
212 imx25_add_fec(&mx25_fec_pdata);
213 imx25_add_imx_keypad(&mx25pdk_keymap_data);
214
215 imx25_add_sdhci_esdhc_imx(0, NULL);
216}
217
218static void __init mx25pdk_timer_init(void)
219{
220 mx25_clocks_init();
221}
222
223static struct sys_timer mx25pdk_timer = {
224 .init = mx25pdk_timer_init,
225};
226
227MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
228 /* Maintainer: Freescale Semiconductor, Inc. */
229 .boot_params = MX25_PHYS_OFFSET + 0x100,
230 .map_io = mx25_map_io,
231 .init_irq = mx25_init_irq,
232 .init_machine = mx25pdk_init,
233 .timer = &mx25pdk_timer,
234MACHINE_END
235
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 84a5ba03f1ba..6fd0f8f6deb6 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -22,20 +22,27 @@
22 22
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/input/matrix_keypad.h>
26#include <linux/irq.h> 25#include <linux/irq.h>
26#include <linux/usb/otg.h>
27#include <linux/usb/ulpi.h>
28#include <linux/delay.h>
29#include <linux/mfd/mc13783.h>
30#include <linux/spi/spi.h>
31#include <linux/regulator/machine.h>
32
27#include <asm/mach-types.h> 33#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
29#include <asm/mach/time.h> 35#include <asm/mach/time.h>
30#include <mach/hardware.h> 36#include <mach/hardware.h>
31#include <mach/common.h> 37#include <mach/common.h>
32#include <mach/iomux-mx27.h> 38#include <mach/iomux-mx27.h>
33#include <mach/mmc.h> 39#include <mach/ulpi.h>
34 40
35#include "devices-imx27.h" 41#include "devices-imx27.h"
36#include "devices.h"
37 42
38#define SD1_EN_GPIO (GPIO_PORTB + 25) 43#define SD1_EN_GPIO (GPIO_PORTB + 25)
44#define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23)
45#define SPI2_SS0 (GPIO_PORTD + 21)
39 46
40static const int mx27pdk_pins[] __initconst = { 47static const int mx27pdk_pins[] __initconst = {
41 /* UART1 */ 48 /* UART1 */
@@ -70,6 +77,24 @@ static const int mx27pdk_pins[] __initconst = {
70 PE22_PF_SD1_CMD, 77 PE22_PF_SD1_CMD,
71 PE23_PF_SD1_CLK, 78 PE23_PF_SD1_CLK,
72 SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT, 79 SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT,
80 /* OTG */
81 OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT,
82 PC7_PF_USBOTG_DATA5,
83 PC8_PF_USBOTG_DATA6,
84 PC9_PF_USBOTG_DATA0,
85 PC10_PF_USBOTG_DATA2,
86 PC11_PF_USBOTG_DATA1,
87 PC12_PF_USBOTG_DATA4,
88 PC13_PF_USBOTG_DATA3,
89 PE0_PF_USBOTG_NXT,
90 PE1_PF_USBOTG_STP,
91 PE2_PF_USBOTG_DIR,
92 PE24_PF_USBOTG_CLK,
93 PE25_PF_USBOTG_DATA7,
94 /* CSPI2 */
95 PD22_PF_CSPI2_SCLK,
96 PD23_PF_CSPI2_MISO,
97 PD24_PF_CSPI2_MOSI,
73}; 98};
74 99
75static const struct imxuart_platform_data uart_pdata __initconst = { 100static const struct imxuart_platform_data uart_pdata __initconst = {
@@ -92,7 +117,7 @@ static const uint32_t mx27_3ds_keymap[] = {
92 KEY(2, 3, KEY_F10), 117 KEY(2, 3, KEY_F10),
93}; 118};
94 119
95static struct matrix_keymap_data mx27_3ds_keymap_data = { 120static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
96 .keymap = mx27_3ds_keymap, 121 .keymap = mx27_3ds_keymap,
97 .keymap_size = ARRAY_SIZE(mx27_3ds_keymap), 122 .keymap_size = ARRAY_SIZE(mx27_3ds_keymap),
98}; 123};
@@ -109,7 +134,7 @@ static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
109 free_irq(IRQ_GPIOB(26), data); 134 free_irq(IRQ_GPIOB(26), data);
110} 135}
111 136
112static struct imxmmc_platform_data sdhc1_pdata = { 137static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
113 .init = mx27_3ds_sdhc1_init, 138 .init = mx27_3ds_sdhc1_init,
114 .exit = mx27_3ds_sdhc1_exit, 139 .exit = mx27_3ds_sdhc1_exit,
115}; 140};
@@ -121,6 +146,111 @@ static void mx27_3ds_sdhc1_enable_level_translator(void)
121 gpio_direction_output(SD1_EN_GPIO, 1); 146 gpio_direction_output(SD1_EN_GPIO, 1);
122} 147}
123 148
149
150static int otg_phy_init(void)
151{
152 gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset");
153 gpio_direction_output(OTG_PHY_RESET_GPIO, 0);
154 mdelay(1);
155 gpio_set_value(OTG_PHY_RESET_GPIO, 1);
156 return 0;
157}
158
159#if defined(CONFIG_USB_ULPI)
160
161static struct mxc_usbh_platform_data otg_pdata __initdata = {
162 .portsc = MXC_EHCI_MODE_ULPI,
163 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
164};
165#endif
166
167static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
168 .operating_mode = FSL_USB2_DR_DEVICE,
169 .phy_mode = FSL_USB2_PHY_ULPI,
170};
171
172static int otg_mode_host;
173
174static int __init mx27_3ds_otg_mode(char *options)
175{
176 if (!strcmp(options, "host"))
177 otg_mode_host = 1;
178 else if (!strcmp(options, "device"))
179 otg_mode_host = 0;
180 else
181 pr_info("otg_mode neither \"host\" nor \"device\". "
182 "Defaulting to device\n");
183 return 0;
184}
185__setup("otg_mode=", mx27_3ds_otg_mode);
186
187/* Regulators */
188static struct regulator_consumer_supply vmmc1_consumers[] = {
189 REGULATOR_SUPPLY("lcd_2v8", NULL),
190};
191
192static struct regulator_init_data vmmc1_init = {
193 .constraints = {
194 .min_uV = 2800000,
195 .max_uV = 2800000,
196 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
197 },
198 .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
199 .consumer_supplies = vmmc1_consumers,
200};
201
202static struct regulator_consumer_supply vgen_consumers[] = {
203 REGULATOR_SUPPLY("vdd_lcdio", NULL),
204};
205
206static struct regulator_init_data vgen_init = {
207 .constraints = {
208 .min_uV = 1800000,
209 .max_uV = 1800000,
210 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
211 },
212 .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
213 .consumer_supplies = vgen_consumers,
214};
215
216static struct mc13783_regulator_init_data mx27_3ds_regulators[] = {
217 {
218 .id = MC13783_REGU_VMMC1,
219 .init_data = &vmmc1_init,
220 }, {
221 .id = MC13783_REGU_VGEN,
222 .init_data = &vgen_init,
223 },
224};
225
226/* MC13783 */
227static struct mc13783_platform_data mc13783_pdata __initdata = {
228 .regulators = mx27_3ds_regulators,
229 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
230 .flags = MC13783_USE_REGULATOR,
231};
232
233/* SPI */
234static int spi2_internal_chipselect[] = {SPI2_SS0};
235
236static const struct spi_imx_master spi2_pdata __initconst = {
237 .chipselect = spi2_internal_chipselect,
238 .num_chipselect = ARRAY_SIZE(spi2_internal_chipselect),
239};
240
241static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
242 {
243 .modalias = "mc13783",
244 .max_speed_hz = 1000000,
245 .bus_num = 1,
246 .chip_select = 0, /* SS0 */
247 .platform_data = &mc13783_pdata,
248 .irq = IRQ_GPIOC(14),
249 .mode = SPI_CS_HIGH,
250 },
251};
252
253
124static void __init mx27pdk_init(void) 254static void __init mx27pdk_init(void)
125{ 255{
126 mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), 256 mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
@@ -128,8 +258,24 @@ static void __init mx27pdk_init(void)
128 mx27_3ds_sdhc1_enable_level_translator(); 258 mx27_3ds_sdhc1_enable_level_translator();
129 imx27_add_imx_uart0(&uart_pdata); 259 imx27_add_imx_uart0(&uart_pdata);
130 imx27_add_fec(NULL); 260 imx27_add_fec(NULL);
131 mxc_register_device(&imx_kpp_device, &mx27_3ds_keymap_data); 261 imx27_add_imx_keypad(&mx27_3ds_keymap_data);
132 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); 262 imx27_add_mxc_mmc(0, &sdhc1_pdata);
263 imx27_add_imx2_wdt(NULL);
264 otg_phy_init();
265#if defined(CONFIG_USB_ULPI)
266 if (otg_mode_host) {
267 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
268 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
269
270 imx27_add_mxc_ehci_otg(&otg_pdata);
271 }
272#endif
273 if (!otg_mode_host)
274 imx27_add_fsl_usb2_udc(&otg_device_pdata);
275
276 imx27_add_spi_imx1(&spi2_pdata);
277 spi_register_board_info(mx27_3ds_spi_devs,
278 ARRAY_SIZE(mx27_3ds_spi_devs));
133} 279}
134 280
135static void __init mx27pdk_timer_init(void) 281static void __init mx27pdk_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index a1e4bc573afc..b832f960fec4 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -30,11 +30,8 @@
30#include <mach/gpio.h> 30#include <mach/gpio.h>
31#include <mach/iomux-mx27.h> 31#include <mach/iomux-mx27.h>
32#include <mach/mxc_nand.h> 32#include <mach/mxc_nand.h>
33#include <mach/imxfb.h>
34#include <mach/mmc.h>
35 33
36#include "devices-imx27.h" 34#include "devices-imx27.h"
37#include "devices.h"
38 35
39/* 36/*
40 * Base address of PBC controller, CS4 37 * Base address of PBC controller, CS4
@@ -228,7 +225,7 @@ static struct imx_fb_videomode mx27ads_modes[] = {
228 }, 225 },
229}; 226};
230 227
231static struct imx_fb_platform_data mx27ads_fb_data = { 228static const struct imx_fb_platform_data mx27ads_fb_data __initconst = {
232 .mode = mx27ads_modes, 229 .mode = mx27ads_modes,
233 .num_modes = ARRAY_SIZE(mx27ads_modes), 230 .num_modes = ARRAY_SIZE(mx27ads_modes),
234 231
@@ -272,19 +269,18 @@ static void mx27ads_sdhc2_exit(struct device *dev, void *data)
272 free_irq(IRQ_GPIOB(7), data); 269 free_irq(IRQ_GPIOB(7), data);
273} 270}
274 271
275static struct imxmmc_platform_data sdhc1_pdata = { 272static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
276 .init = mx27ads_sdhc1_init, 273 .init = mx27ads_sdhc1_init,
277 .exit = mx27ads_sdhc1_exit, 274 .exit = mx27ads_sdhc1_exit,
278}; 275};
279 276
280static struct imxmmc_platform_data sdhc2_pdata = { 277static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
281 .init = mx27ads_sdhc2_init, 278 .init = mx27ads_sdhc2_init,
282 .exit = mx27ads_sdhc2_exit, 279 .exit = mx27ads_sdhc2_exit,
283}; 280};
284 281
285static struct platform_device *platform_devices[] __initdata = { 282static struct platform_device *platform_devices[] __initdata = {
286 &mx27ads_nor_mtd_device, 283 &mx27ads_nor_mtd_device,
287 &mxc_w1_master_device,
288}; 284};
289 285
290static const struct imxuart_platform_data uart_pdata __initconst = { 286static const struct imxuart_platform_data uart_pdata __initconst = {
@@ -308,12 +304,13 @@ static void __init mx27ads_board_init(void)
308 i2c_register_board_info(1, mx27ads_i2c_devices, 304 i2c_register_board_info(1, mx27ads_i2c_devices,
309 ARRAY_SIZE(mx27ads_i2c_devices)); 305 ARRAY_SIZE(mx27ads_i2c_devices));
310 imx27_add_imx_i2c(1, &mx27ads_i2c1_data); 306 imx27_add_imx_i2c(1, &mx27ads_i2c1_data);
311 mxc_register_device(&mxc_fb_device, &mx27ads_fb_data); 307 imx27_add_imx_fb(&mx27ads_fb_data);
312 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); 308 imx27_add_mxc_mmc(0, &sdhc1_pdata);
313 mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); 309 imx27_add_mxc_mmc(1, &sdhc2_pdata);
314 310
315 imx27_add_fec(NULL); 311 imx27_add_fec(NULL);
316 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 312 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
313 imx27_add_mxc_w1(NULL);
317} 314}
318 315
319static void __init mx27ads_timer_init(void) 316static void __init mx27ads_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 38d3a4ae17c7..4ce71b0401db 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -31,11 +31,8 @@
31#include <mach/iomux-mx27.h> 31#include <mach/iomux-mx27.h>
32#include <mach/mxc_nand.h> 32#include <mach/mxc_nand.h>
33#include <linux/i2c/pca953x.h> 33#include <linux/i2c/pca953x.h>
34#include <mach/imxfb.h>
35#include <mach/mmc.h>
36 34
37#include "devices-imx27.h" 35#include "devices-imx27.h"
38#include "devices.h"
39 36
40static const int mxt_td60_pins[] __initconst = { 37static const int mxt_td60_pins[] __initconst = {
41 /* UART0 */ 38 /* UART0 */
@@ -196,7 +193,7 @@ static struct imx_fb_videomode mxt_td60_modes[] = {
196 }, 193 },
197}; 194};
198 195
199static struct imx_fb_platform_data mxt_td60_fb_data = { 196static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = {
200 .mode = mxt_td60_modes, 197 .mode = mxt_td60_modes,
201 .num_modes = ARRAY_SIZE(mxt_td60_modes), 198 .num_modes = ARRAY_SIZE(mxt_td60_modes),
202 199
@@ -226,7 +223,7 @@ static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
226 free_irq(IRQ_GPIOF(8), data); 223 free_irq(IRQ_GPIOF(8), data);
227} 224}
228 225
229static struct imxmmc_platform_data sdhc1_pdata = { 226static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
230 .init = mxt_td60_sdhc1_init, 227 .init = mxt_td60_sdhc1_init,
231 .exit = mxt_td60_sdhc1_exit, 228 .exit = mxt_td60_sdhc1_exit,
232}; 229};
@@ -253,8 +250,8 @@ static void __init mxt_td60_board_init(void)
253 250
254 imx27_add_imx_i2c(0, &mxt_td60_i2c0_data); 251 imx27_add_imx_i2c(0, &mxt_td60_i2c0_data);
255 imx27_add_imx_i2c(1, &mxt_td60_i2c1_data); 252 imx27_add_imx_i2c(1, &mxt_td60_i2c1_data);
256 mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data); 253 imx27_add_imx_fb(&mxt_td60_fb_data);
257 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); 254 imx27_add_mxc_mmc(0, &sdhc1_pdata);
258 imx27_add_fec(NULL); 255 imx27_add_fec(NULL);
259} 256}
260 257
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 8c720d44602a..cccc0a0a9c72 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -29,7 +29,6 @@
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/usb/otg.h> 30#include <linux/usb/otg.h>
31#include <linux/usb/ulpi.h> 31#include <linux/usb/ulpi.h>
32#include <linux/fsl_devices.h>
33 32
34#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
35#include <asm/mach-types.h> 34#include <asm/mach-types.h>
@@ -40,13 +39,9 @@
40#include <mach/audmux.h> 39#include <mach/audmux.h>
41#include <mach/mxc_nand.h> 40#include <mach/mxc_nand.h>
42#include <mach/irqs.h> 41#include <mach/irqs.h>
43#include <mach/mmc.h>
44#include <mach/mxc_ehci.h>
45#include <mach/ulpi.h> 42#include <mach/ulpi.h>
46#include <mach/imxfb.h>
47 43
48#include "devices-imx27.h" 44#include "devices-imx27.h"
49#include "devices.h"
50 45
51#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23) 46#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
52#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24) 47#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
@@ -171,11 +166,6 @@ pca100_nand_board_info __initconst = {
171 .hw_ecc = 1, 166 .hw_ecc = 1,
172}; 167};
173 168
174static struct platform_device *platform_devices[] __initdata = {
175 &mxc_w1_master_device,
176 &mxc_wdt,
177};
178
179static const struct imxi2c_platform_data pca100_i2c1_data __initconst = { 169static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
180 .bitrate = 100000, 170 .bitrate = 100000,
181}; 171};
@@ -274,7 +264,7 @@ static void pca100_sdhc2_exit(struct device *dev, void *data)
274 free_irq(IRQ_GPIOC(29), data); 264 free_irq(IRQ_GPIOC(29), data);
275} 265}
276 266
277static struct imxmmc_platform_data sdhc_pdata = { 267static const struct imxmmc_platform_data sdhc_pdata __initconst = {
278 .init = pca100_sdhc2_init, 268 .init = pca100_sdhc2_init,
279 .exit = pca100_sdhc2_exit, 269 .exit = pca100_sdhc2_exit,
280}; 270};
@@ -286,7 +276,7 @@ static int otg_phy_init(struct platform_device *pdev)
286 return 0; 276 return 0;
287} 277}
288 278
289static struct mxc_usbh_platform_data otg_pdata = { 279static struct mxc_usbh_platform_data otg_pdata __initdata = {
290 .init = otg_phy_init, 280 .init = otg_phy_init,
291 .portsc = MXC_EHCI_MODE_ULPI, 281 .portsc = MXC_EHCI_MODE_ULPI,
292 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 282 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
@@ -298,14 +288,14 @@ static int usbh2_phy_init(struct platform_device *pdev)
298 return 0; 288 return 0;
299} 289}
300 290
301static struct mxc_usbh_platform_data usbh2_pdata = { 291static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
302 .init = usbh2_phy_init, 292 .init = usbh2_phy_init,
303 .portsc = MXC_EHCI_MODE_ULPI, 293 .portsc = MXC_EHCI_MODE_ULPI,
304 .flags = MXC_EHCI_INTERFACE_DIFF_UNI, 294 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
305}; 295};
306#endif 296#endif
307 297
308static struct fsl_usb2_platform_data otg_device_pdata = { 298static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
309 .operating_mode = FSL_USB2_DR_DEVICE, 299 .operating_mode = FSL_USB2_DR_DEVICE,
310 .phy_mode = FSL_USB2_PHY_ULPI, 300 .phy_mode = FSL_USB2_PHY_ULPI,
311}; 301};
@@ -355,7 +345,7 @@ static struct imx_fb_videomode pca100_fb_modes[] = {
355 }, 345 },
356}; 346};
357 347
358static struct imx_fb_platform_data pca100_fb_data = { 348static const struct imx_fb_platform_data pca100_fb_data __initconst = {
359 .mode = pca100_fb_modes, 349 .mode = pca100_fb_modes,
360 .num_modes = ARRAY_SIZE(pca100_fb_modes), 350 .num_modes = ARRAY_SIZE(pca100_fb_modes),
361 351
@@ -389,7 +379,7 @@ static void __init pca100_init(void)
389 379
390 imx27_add_imx_uart0(&uart_pdata); 380 imx27_add_imx_uart0(&uart_pdata);
391 381
392 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); 382 imx27_add_mxc_mmc(1, &sdhc_pdata);
393 383
394 imx27_add_mxc_nand(&pca100_nand_board_info); 384 imx27_add_mxc_nand(&pca100_nand_board_info);
395 385
@@ -417,23 +407,24 @@ static void __init pca100_init(void)
417 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 407 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
418 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 408 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
419 409
420 mxc_register_device(&mxc_otg_host, &otg_pdata); 410 imx27_add_mxc_ehci_otg(&otg_pdata);
421 } 411 }
422 412
423 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 413 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
424 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); 414 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
425 415
426 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 416 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
427#endif 417#endif
428 if (!otg_mode_host) { 418 if (!otg_mode_host) {
429 gpio_set_value(OTG_PHY_CS_GPIO, 0); 419 gpio_set_value(OTG_PHY_CS_GPIO, 0);
430 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 420 imx27_add_fsl_usb2_udc(&otg_device_pdata);
431 } 421 }
432 422
433 mxc_register_device(&mxc_fb_device, &pca100_fb_data); 423 imx27_add_imx_fb(&pca100_fb_data);
434 424
435 imx27_add_fec(NULL); 425 imx27_add_fec(NULL);
436 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 426 imx27_add_imx2_wdt(NULL);
427 imx27_add_mxc_w1(NULL);
437} 428}
438 429
439static void __init pca100_timer_init(void) 430static void __init pca100_timer_init(void)
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 49a97ce07426..f667a262dfc1 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -37,11 +37,9 @@
37#include <mach/hardware.h> 37#include <mach/hardware.h>
38#include <mach/iomux-mx27.h> 38#include <mach/iomux-mx27.h>
39#include <mach/mxc_nand.h> 39#include <mach/mxc_nand.h>
40#include <mach/mxc_ehci.h>
41#include <mach/ulpi.h> 40#include <mach/ulpi.h>
42 41
43#include "devices-imx27.h" 42#include "devices-imx27.h"
44#include "devices.h"
45 43
46static const int pcm038_pins[] __initconst = { 44static const int pcm038_pins[] __initconst = {
47 /* UART1 */ 45 /* UART1 */
@@ -172,9 +170,7 @@ pcm038_nand_board_info __initconst = {
172 170
173static struct platform_device *platform_devices[] __initdata = { 171static struct platform_device *platform_devices[] __initdata = {
174 &pcm038_nor_mtd_device, 172 &pcm038_nor_mtd_device,
175 &mxc_w1_master_device,
176 &pcm038_sram_mtd_device, 173 &pcm038_sram_mtd_device,
177 &mxc_wdt,
178}; 174};
179 175
180/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and 176/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
@@ -214,7 +210,7 @@ static const struct spi_imx_master pcm038_spi0_data __initconst = {
214 210
215static struct regulator_consumer_supply sdhc1_consumers[] = { 211static struct regulator_consumer_supply sdhc1_consumers[] = {
216 { 212 {
217 .dev = &mxc_sdhc_device1.dev, 213 .dev_name = "mxc-mmc.1",
218 .supply = "sdhc_vcc", 214 .supply = "sdhc_vcc",
219 }, 215 },
220}; 216};
@@ -285,7 +281,7 @@ static struct spi_board_info pcm038_spi_board_info[] __initdata = {
285 } 281 }
286}; 282};
287 283
288static struct mxc_usbh_platform_data usbh2_pdata = { 284static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
289 .portsc = MXC_EHCI_MODE_ULPI, 285 .portsc = MXC_EHCI_MODE_ULPI,
290 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, 286 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
291}; 287};
@@ -322,10 +318,12 @@ static void __init pcm038_init(void)
322 spi_register_board_info(pcm038_spi_board_info, 318 spi_register_board_info(pcm038_spi_board_info,
323 ARRAY_SIZE(pcm038_spi_board_info)); 319 ARRAY_SIZE(pcm038_spi_board_info));
324 320
325 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 321 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
326 322
327 imx27_add_fec(NULL); 323 imx27_add_fec(NULL);
328 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 324 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
325 imx27_add_imx2_wdt(NULL);
326 imx27_add_mxc_w1(NULL);
329 327
330#ifdef CONFIG_MACH_PCM970_BASEBOARD 328#ifdef CONFIG_MACH_PCM970_BASEBOARD
331 pcm970_baseboard_init(); 329 pcm970_baseboard_init();
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index 1fbdd3faa7ab..eae878f306c6 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -25,7 +25,6 @@
25#include <mach/iomux-mx1.h> 25#include <mach/iomux-mx1.h>
26 26
27#include "devices-imx1.h" 27#include "devices-imx1.h"
28#include "devices.h"
29 28
30/* 29/*
31 * This scb9328 has a 32MiB flash 30 * This scb9328 has a 32MiB flash
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index 9be92b96dc89..729ae0915af8 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -25,12 +25,7 @@
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26 26
27static struct map_desc imx_io_desc[] __initdata = { 27static struct map_desc imx_io_desc[] __initdata = {
28 { 28 imx_map_entry(MX1, IO, MT_DEVICE),
29 .virtual = MX1_IO_BASE_ADDR_VIRT,
30 .pfn = __phys_to_pfn(MX1_IO_BASE_ADDR),
31 .length = MX1_IO_SIZE,
32 .type = MT_DEVICE
33 }
34}; 29};
35 30
36void __init mx1_map_io(void) 31void __init mx1_map_io(void)
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index 12faeeaa0a97..e728af81d1b1 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -35,33 +35,18 @@ static struct map_desc imx21_io_desc[] __initdata = {
35 * - ROM Patch 35 * - ROM Patch
36 * - and some reserved space 36 * - and some reserved space
37 */ 37 */
38 { 38 imx_map_entry(MX21, AIPI, MT_DEVICE),
39 .virtual = MX21_AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR),
41 .length = MX21_AIPI_SIZE,
42 .type = MT_DEVICE
43 },
44 /* 39 /*
45 * this fixed mapping covers: 40 * this fixed mapping covers:
46 * - CSI 41 * - CSI
47 * - ATA 42 * - ATA
48 */ 43 */
49 { 44 imx_map_entry(MX21, SAHB1, MT_DEVICE),
50 .virtual = MX21_SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR),
52 .length = MX21_SAHB1_SIZE,
53 .type = MT_DEVICE
54 },
55 /* 45 /*
56 * this fixed mapping covers: 46 * this fixed mapping covers:
57 * - EMI 47 * - EMI
58 */ 48 */
59 { 49 imx_map_entry(MX21, X_MEMC, MT_DEVICE),
60 .virtual = MX21_X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR),
62 .length = MX21_X_MEMC_SIZE,
63 .type = MT_DEVICE
64 },
65}; 50};
66 51
67/* 52/*
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
new file mode 100644
index 000000000000..2edec6ce8fe7
--- /dev/null
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -0,0 +1,62 @@
1/*
2 * Copyright (C) 1999,2000 Arm Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * - add MX31 specific definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/mm.h>
20#include <linux/init.h>
21#include <linux/err.h>
22
23#include <asm/pgtable.h>
24#include <asm/mach/map.h>
25
26#include <mach/common.h>
27#include <mach/hardware.h>
28#include <mach/mx25.h>
29#include <mach/iomux-v3.h>
30
31/*
32 * This table defines static virtual address mappings for I/O regions.
33 * These are the mappings common across all MX25 boards.
34 */
35static struct map_desc mx25_io_desc[] __initdata = {
36 imx_map_entry(MX25, AVIC, MT_DEVICE_NONSHARED),
37 imx_map_entry(MX25, AIPS1, MT_DEVICE_NONSHARED),
38 imx_map_entry(MX25, AIPS2, MT_DEVICE_NONSHARED),
39};
40
41/*
42 * This function initializes the memory map. It is called during the
43 * system startup to create static physical to virtual memory mappings
44 * for the IO modules.
45 */
46void __init mx25_map_io(void)
47{
48 mxc_set_cpu_type(MXC_CPU_MX25);
49 mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR));
50 mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR));
51
52 iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc));
53}
54
55int imx25_register_gpios(void);
56
57void __init mx25_init_irq(void)
58{
59 mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR));
60 imx25_register_gpios();
61}
62
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index a24622957ff2..374e48b7a412 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -35,33 +35,18 @@ static struct map_desc imx27_io_desc[] __initdata = {
35 * - ROM Patch 35 * - ROM Patch
36 * - and some reserved space 36 * - and some reserved space
37 */ 37 */
38 { 38 imx_map_entry(MX27, AIPI, MT_DEVICE),
39 .virtual = MX27_AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR),
41 .length = MX27_AIPI_SIZE,
42 .type = MT_DEVICE
43 },
44 /* 39 /*
45 * this fixed mapping covers: 40 * this fixed mapping covers:
46 * - CSI 41 * - CSI
47 * - ATA 42 * - ATA
48 */ 43 */
49 { 44 imx_map_entry(MX27, SAHB1, MT_DEVICE),
50 .virtual = MX27_SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR),
52 .length = MX27_SAHB1_SIZE,
53 .type = MT_DEVICE
54 },
55 /* 45 /*
56 * this fixed mapping covers: 46 * this fixed mapping covers:
57 * - EMI 47 * - EMI
58 */ 48 */
59 { 49 imx_map_entry(MX27, X_MEMC, MT_DEVICE),
60 .virtual = MX27_X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR),
62 .length = MX27_X_MEMC_SIZE,
63 .type = MT_DEVICE
64 },
65}; 50};
66 51
67/* 52/*
diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c
index 9110d9cca7a2..99afbc3f43a3 100644
--- a/arch/arm/mach-imx/pcm970-baseboard.c
+++ b/arch/arm/mach-imx/pcm970-baseboard.c
@@ -25,11 +25,9 @@
25 25
26#include <mach/common.h> 26#include <mach/common.h>
27#include <mach/iomux-mx27.h> 27#include <mach/iomux-mx27.h>
28#include <mach/imxfb.h>
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/mmc.h>
31 29
32#include "devices.h" 30#include "devices-imx27.h"
33 31
34static const int pcm970_pins[] __initconst = { 32static const int pcm970_pins[] __initconst = {
35 /* SDHC */ 33 /* SDHC */
@@ -119,7 +117,7 @@ static void pcm970_sdhc2_exit(struct device *dev, void *data)
119 gpio_free(GPIO_PORTC + 28); 117 gpio_free(GPIO_PORTC + 28);
120} 118}
121 119
122static struct imxmmc_platform_data sdhc_pdata = { 120static const struct imxmmc_platform_data sdhc_pdata __initconst = {
123 .get_ro = pcm970_sdhc2_get_ro, 121 .get_ro = pcm970_sdhc2_get_ro,
124 .init = pcm970_sdhc2_init, 122 .init = pcm970_sdhc2_init,
125 .exit = pcm970_sdhc2_exit, 123 .exit = pcm970_sdhc2_exit,
@@ -179,7 +177,7 @@ static struct imx_fb_videomode pcm970_modes[] = {
179 }, 177 },
180}; 178};
181 179
182static struct imx_fb_platform_data pcm038_fb_data = { 180static const struct imx_fb_platform_data pcm038_fb_data __initconst = {
183 .mode = pcm970_modes, 181 .mode = pcm970_modes,
184 .num_modes = ARRAY_SIZE(pcm970_modes), 182 .num_modes = ARRAY_SIZE(pcm970_modes),
185 183
@@ -226,8 +224,8 @@ void __init pcm970_baseboard_init(void)
226 mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins), 224 mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins),
227 "PCM970"); 225 "PCM970");
228 226
229 mxc_register_device(&mxc_fb_device, &pcm038_fb_data); 227 imx27_add_imx_fb(&pcm038_fb_data);
230 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN); 228 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN);
231 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); 229 imx27_add_mxc_mmc(1, &sdhc_pdata);
232 platform_device_register(&pcm970_sja1000); 230 platform_device_register(&pcm970_sja1000);
233} 231}
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index afc17ce0bb54..6bf81ceea137 100644
--- a/arch/arm/mach-imx/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
@@ -39,6 +39,9 @@ static struct platform_suspend_ops mx27_suspend_ops = {
39 39
40static int __init mx27_pm_init(void) 40static int __init mx27_pm_init(void)
41{ 41{
42 if (!cpu_is_mx27())
43 return 0;
44
42 suspend_set_ops(&mx27_suspend_ops); 45 suspend_set_ops(&mx27_suspend_ops);
43 return 0; 46 return 0;
44} 47}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 01:47:41 -0500