6 files changed, 111 insertions, 86 deletions

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5f7f9c2a34ae..c44aa974e79c 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC
 config HAVE_IMX_SRC
         bool
 
-#
-# ARCH_MX31 and ARCH_MX35 are left for compatibility
-# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
-# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
-# more sensible) names are used: SOC_IMX31 and SOC_IMX35
 config ARCH_MX1
         bool
 
@@ -27,12 +22,6 @@ config ARCH_MX25
 config MACH_MX27
         bool
 
-config ARCH_MX31
-        bool
-
-config ARCH_MX35
-        bool
-
 config SOC_IMX1
         bool
         select ARCH_MX1
@@ -72,7 +61,6 @@ config SOC_IMX31
         select CPU_V6
         select IMX_HAVE_PLATFORM_MXC_RNGA
         select ARCH_MXC_AUDMUX_V2
-        select ARCH_MX31
         select MXC_AVIC
         select SMP_ON_UP if SMP
 
@@ -82,7 +70,6 @@ config SOC_IMX35
         select ARCH_MXC_IOMUX_V3
         select ARCH_MXC_AUDMUX_V2
         select HAVE_EPIT
-        select ARCH_MX35
         select MXC_AVIC
         select SMP_ON_UP if SMP
 
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 22d85889f622..cfede5768aa0 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -1,22 +1,26 @@
-zreladdr-$(CONFIG_ARCH_MX1)     += 0x08008000
-params_phys-$(CONFIG_ARCH_MX1)  := 0x08000100
-initrd_phys-$(CONFIG_ARCH_MX1)  := 0x08800000
+zreladdr-$(CONFIG_SOC_IMX1)     += 0x08008000
+params_phys-$(CONFIG_SOC_IMX1)  := 0x08000100
+initrd_phys-$(CONFIG_SOC_IMX1)  := 0x08800000
 
-zreladdr-$(CONFIG_MACH_MX21)    += 0xC0008000
-params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
-initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
+zreladdr-$(CONFIG_SOC_IMX21)    += 0xC0008000
+params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100
+initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000
 
-zreladdr-$(CONFIG_ARCH_MX25)    += 0x80008000
-params_phys-$(CONFIG_ARCH_MX25) := 0x80000100
-initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000
+zreladdr-$(CONFIG_SOC_IMX25)    += 0x80008000
+params_phys-$(CONFIG_SOC_IMX25) := 0x80000100
+initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000
 
-zreladdr-$(CONFIG_MACH_MX27)    += 0xA0008000
-params_phys-$(CONFIG_MACH_MX27) := 0xA0000100
-initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000
+zreladdr-$(CONFIG_SOC_IMX27)    += 0xA0008000
+params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100
+initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000
 
-zreladdr-$(CONFIG_ARCH_MX3)     += 0x80008000
-params_phys-$(CONFIG_ARCH_MX3)  := 0x80000100
-initrd_phys-$(CONFIG_ARCH_MX3)  := 0x80800000
+zreladdr-$(CONFIG_SOC_IMX31)    += 0x80008000
+params_phys-$(CONFIG_SOC_IMX31) := 0x80000100
+initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000
+
+zreladdr-$(CONFIG_SOC_IMX35)    += 0x80008000
+params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
+initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
 
 zreladdr-$(CONFIG_SOC_IMX6Q)    += 0x10008000
 params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index e0b926dfeced..039a7abb165a 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
                 return -EINVAL;
 
         max_div = ((d->bm_pred >> d->bp_pred) + 1) *
-                  ((d->bm_pred >> d->bp_pred) + 1);
+                  ((d->bm_podf >> d->bp_podf) + 1);
 
         div = parent_rate / rate;
         if (div == 0)
@@ -1953,14 +1953,17 @@ static struct map_desc imx6q_clock_desc[] = {
         imx_map_entry(MX6Q, ANATOP, MT_DEVICE),
 };
 
+void __init imx6q_clock_map_io(void)
+{
+        iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
+}
+
 int __init mx6q_clocks_init(void)
 {
         struct device_node *np;
         void __iomem *base;
         int i, irq;
 
-        iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
-
         /* retrieve the freqency of fixed clocks from device tree */
         for_each_compatible_node(np, NULL, "fixed-clock") {
                 u32 rate;
@@ -2002,6 +2005,21 @@ int __init mx6q_clocks_init(void)
         clk_set_rate(&asrc_serial_clk, 1500000);
         clk_set_rate(&enfc_clk, 11000000);
 
+        /*
+         * Before pinctrl API is available, we have to rely on the pad
+         * configuration set up by bootloader.  For usdhc example here,
+         * u-boot sets up the pads for 49.5 MHz case, and we have to lower
+         * the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
+         *
+         * FIXME: This is should be removed after pinctrl API is available.
+         * At that time, usdhc driver can call pinctrl API to change pad
+         * configuration dynamically per different usdhc clock settings.
+         */
+        clk_set_rate(&usdhc1_clk, 49500000);
+        clk_set_rate(&usdhc2_clk, 49500000);
+        clk_set_rate(&usdhc3_clk, 49500000);
+        clk_set_rate(&usdhc4_clk, 49500000);
+
         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
         base = of_iomap(np, 0);
         WARN_ON(!base);
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8bf5fa349484..8deb012189b5 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -34,16 +34,18 @@ static void __init imx6q_map_io(void)
 {
         imx_lluart_map_io();
         imx_scu_map_io();
+        imx6q_clock_map_io();
 }
 
-static void __init imx6q_gpio_add_irq_domain(struct device_node *np,
+static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
-                                   32 * 7; /* imx6q gets 7 gpio ports */
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
+        gpio_irq_base -= 32;
         irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+
+        return 0;
 }
 
 static const struct of_device_id imx6q_irq_match[] __initconst = {
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9f0e82ec3398..31807d2a8b7b 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -33,29 +33,32 @@
 static void imx3_idle(void)
 {
         unsigned long reg = 0;
-        __asm__ __volatile__(
-                /* disable I and D cache */
-                "mrc p15, 0, %0, c1, c0, 0\n"
-                "bic %0, %0, #0x00001000\n"
-                "bic %0, %0, #0x00000004\n"
-                "mcr p15, 0, %0, c1, c0, 0\n"
-                /* invalidate I cache */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c5, 0\n"
-                /* clear and invalidate D cache */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c14, 0\n"
-                /* WFI */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c0, 4\n"
-                "nop\n" "nop\n" "nop\n" "nop\n"
-                "nop\n" "nop\n" "nop\n"
-                /* enable I and D cache */
-                "mrc p15, 0, %0, c1, c0, 0\n"
-                "orr %0, %0, #0x00001000\n"
-                "orr %0, %0, #0x00000004\n"
-                "mcr p15, 0, %0, c1, c0, 0\n"
-                : "=r" (reg));
+
+        if (!need_resched())
+                __asm__ __volatile__(
+                        /* disable I and D cache */
+                        "mrc p15, 0, %0, c1, c0, 0\n"
+                        "bic %0, %0, #0x00001000\n"
+                        "bic %0, %0, #0x00000004\n"
+                        "mcr p15, 0, %0, c1, c0, 0\n"
+                        /* invalidate I cache */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c5, 0\n"
+                        /* clear and invalidate D cache */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c14, 0\n"
+                        /* WFI */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c0, 4\n"
+                        "nop\n" "nop\n" "nop\n" "nop\n"
+                        "nop\n" "nop\n" "nop\n"
+                        /* enable I and D cache */
+                        "mrc p15, 0, %0, c1, c0, 0\n"
+                        "orr %0, %0, #0x00001000\n"
+                        "orr %0, %0, #0x00000004\n"
+                        "mcr p15, 0, %0, c1, c0, 0\n"
+                        : "=r" (reg));
+        local_irq_enable();
 }
 
 static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void)
         l2x0_init(l2x0_base, 0x00030024, 0x00000000);
 }
 
+#ifdef CONFIG_SOC_IMX31
 static struct map_desc mx31_io_desc[] __initdata = {
         imx_map_entry(MX31, X_MEMC, MT_DEVICE),
         imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
@@ -126,33 +130,11 @@ void __init mx31_map_io(void)
         iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
 }
 
-static struct map_desc mx35_io_desc[] __initdata = {
-        imx_map_entry(MX35, X_MEMC, MT_DEVICE),
-        imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
-};
-
-void __init mx35_map_io(void)
-{
-        iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
-}
-
 void __init imx31_init_early(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX31);
         mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        imx_idle = imx3_idle;
-        imx_ioremap = imx3_ioremap;
-}
-
-void __init imx35_init_early(void)
-{
-        mxc_set_cpu_type(MXC_CPU_MX35);
-        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
-        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
-        imx_idle = imx3_idle;
+        pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
 }
 
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void)
         mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
 }
 
-void __init mx35_init_irq(void)
-{
-        mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
-}
-
 static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
         .per_2_per_addr = 1677,
 };
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void)
 
         imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
 }
+#endif /* ifdef CONFIG_SOC_IMX31 */
+
+#ifdef CONFIG_SOC_IMX35
+static struct map_desc mx35_io_desc[] __initdata = {
+        imx_map_entry(MX35, X_MEMC, MT_DEVICE),
+        imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
+};
+
+void __init mx35_map_io(void)
+{
+        iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
+}
+
+void __init imx35_init_early(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX35);
+        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
+        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
+        pm_idle = imx3_idle;
+        imx_ioremap = imx3_ioremap;
+}
+
+void __init mx35_init_irq(void)
+{
+        mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
+}
 
 static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
         .ap_2_ap_addr = 642,
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void)
 
         imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
 }
+#endif /* ifdef CONFIG_SOC_IMX35 */
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 36cacbd0dcc2..a8e33681b732 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/smp.h>
 #include <asm/unified.h>
 
 #define SRC_SCR                         0x000
@@ -23,10 +24,15 @@
 
 static void __iomem *src_base;
 
+#ifndef CONFIG_SMP
+#define cpu_logical_map(cpu)            0
+#endif
+
 void imx_enable_cpu(int cpu, bool enable)
 {
         u32 mask, val;
 
+        cpu = cpu_logical_map(cpu);
         mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
         val = readl_relaxed(src_base + SRC_SCR);
         val = enable ? val | mask : val & ~mask;
@@ -35,6 +41,7 @@ void imx_enable_cpu(int cpu, bool enable)
 
 void imx_set_cpu_jump(int cpu, void *jump_addr)
 {
+        cpu = cpu_logical_map(cpu);
         writel_relaxed(BSYM(virt_to_phys(jump_addr)),
                        src_base + SRC_GPR1 + cpu * 8);
 }