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Diffstat (limited to 'arch/arm/mach-imx/pm-imx6q.c')
-rw-r--r--arch/arm/mach-imx/pm-imx6q.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index ee42d20cba19..5faba7a3c95f 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -22,8 +22,6 @@
22#include "common.h" 22#include "common.h"
23#include "hardware.h" 23#include "hardware.h"
24 24
25extern unsigned long phys_l2x0_saved_regs;
26
27static int imx6q_suspend_finish(unsigned long val) 25static int imx6q_suspend_finish(unsigned long val)
28{ 26{
29 cpu_do_idle(); 27 cpu_do_idle();
@@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = {
57 55
58void __init imx6q_pm_init(void) 56void __init imx6q_pm_init(void)
59{ 57{
60 /*
61 * The l2x0 core code provides an infrastucture to save and restore
62 * l2x0 registers across suspend/resume cycle. But because imx6q
63 * retains L2 content during suspend and needs to resume L2 before
64 * MMU is enabled, it can only utilize register saving support and
65 * have to take care of restoring on its own. So we save physical
66 * address of the data structure used by l2x0 core to save registers,
67 * and later restore the necessary ones in imx6q resume entry.
68 */
69#ifdef CONFIG_CACHE_L2X0
70 phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
71#endif
72
73 suspend_set_ops(&imx6q_pm_ops); 58 suspend_set_ops(&imx6q_pm_ops);
74} 59}