diff options
Diffstat (limited to 'arch/arm/mach-imx/mm-imx3.c')
-rw-r--r-- | arch/arm/mach-imx/mm-imx3.c | 109 |
1 files changed, 58 insertions, 51 deletions
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 9f0e82ec3398..31807d2a8b7b 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c | |||
@@ -33,29 +33,32 @@ | |||
33 | static void imx3_idle(void) | 33 | static void imx3_idle(void) |
34 | { | 34 | { |
35 | unsigned long reg = 0; | 35 | unsigned long reg = 0; |
36 | __asm__ __volatile__( | 36 | |
37 | /* disable I and D cache */ | 37 | if (!need_resched()) |
38 | "mrc p15, 0, %0, c1, c0, 0\n" | 38 | __asm__ __volatile__( |
39 | "bic %0, %0, #0x00001000\n" | 39 | /* disable I and D cache */ |
40 | "bic %0, %0, #0x00000004\n" | 40 | "mrc p15, 0, %0, c1, c0, 0\n" |
41 | "mcr p15, 0, %0, c1, c0, 0\n" | 41 | "bic %0, %0, #0x00001000\n" |
42 | /* invalidate I cache */ | 42 | "bic %0, %0, #0x00000004\n" |
43 | "mov %0, #0\n" | 43 | "mcr p15, 0, %0, c1, c0, 0\n" |
44 | "mcr p15, 0, %0, c7, c5, 0\n" | 44 | /* invalidate I cache */ |
45 | /* clear and invalidate D cache */ | 45 | "mov %0, #0\n" |
46 | "mov %0, #0\n" | 46 | "mcr p15, 0, %0, c7, c5, 0\n" |
47 | "mcr p15, 0, %0, c7, c14, 0\n" | 47 | /* clear and invalidate D cache */ |
48 | /* WFI */ | 48 | "mov %0, #0\n" |
49 | "mov %0, #0\n" | 49 | "mcr p15, 0, %0, c7, c14, 0\n" |
50 | "mcr p15, 0, %0, c7, c0, 4\n" | 50 | /* WFI */ |
51 | "nop\n" "nop\n" "nop\n" "nop\n" | 51 | "mov %0, #0\n" |
52 | "nop\n" "nop\n" "nop\n" | 52 | "mcr p15, 0, %0, c7, c0, 4\n" |
53 | /* enable I and D cache */ | 53 | "nop\n" "nop\n" "nop\n" "nop\n" |
54 | "mrc p15, 0, %0, c1, c0, 0\n" | 54 | "nop\n" "nop\n" "nop\n" |
55 | "orr %0, %0, #0x00001000\n" | 55 | /* enable I and D cache */ |
56 | "orr %0, %0, #0x00000004\n" | 56 | "mrc p15, 0, %0, c1, c0, 0\n" |
57 | "mcr p15, 0, %0, c1, c0, 0\n" | 57 | "orr %0, %0, #0x00001000\n" |
58 | : "=r" (reg)); | 58 | "orr %0, %0, #0x00000004\n" |
59 | "mcr p15, 0, %0, c1, c0, 0\n" | ||
60 | : "=r" (reg)); | ||
61 | local_irq_enable(); | ||
59 | } | 62 | } |
60 | 63 | ||
61 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, | 64 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, |
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void) | |||
108 | l2x0_init(l2x0_base, 0x00030024, 0x00000000); | 111 | l2x0_init(l2x0_base, 0x00030024, 0x00000000); |
109 | } | 112 | } |
110 | 113 | ||
114 | #ifdef CONFIG_SOC_IMX31 | ||
111 | static struct map_desc mx31_io_desc[] __initdata = { | 115 | static struct map_desc mx31_io_desc[] __initdata = { |
112 | imx_map_entry(MX31, X_MEMC, MT_DEVICE), | 116 | imx_map_entry(MX31, X_MEMC, MT_DEVICE), |
113 | imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), | 117 | imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), |
@@ -126,33 +130,11 @@ void __init mx31_map_io(void) | |||
126 | iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); | 130 | iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); |
127 | } | 131 | } |
128 | 132 | ||
129 | static struct map_desc mx35_io_desc[] __initdata = { | ||
130 | imx_map_entry(MX35, X_MEMC, MT_DEVICE), | ||
131 | imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED), | ||
132 | imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED), | ||
133 | imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED), | ||
134 | imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED), | ||
135 | }; | ||
136 | |||
137 | void __init mx35_map_io(void) | ||
138 | { | ||
139 | iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); | ||
140 | } | ||
141 | |||
142 | void __init imx31_init_early(void) | 133 | void __init imx31_init_early(void) |
143 | { | 134 | { |
144 | mxc_set_cpu_type(MXC_CPU_MX31); | 135 | mxc_set_cpu_type(MXC_CPU_MX31); |
145 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | 136 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
146 | imx_idle = imx3_idle; | 137 | pm_idle = imx3_idle; |
147 | imx_ioremap = imx3_ioremap; | ||
148 | } | ||
149 | |||
150 | void __init imx35_init_early(void) | ||
151 | { | ||
152 | mxc_set_cpu_type(MXC_CPU_MX35); | ||
153 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); | ||
154 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | ||
155 | imx_idle = imx3_idle; | ||
156 | imx_ioremap = imx3_ioremap; | 138 | imx_ioremap = imx3_ioremap; |
157 | } | 139 | } |
158 | 140 | ||
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void) | |||
161 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); | 143 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); |
162 | } | 144 | } |
163 | 145 | ||
164 | void __init mx35_init_irq(void) | ||
165 | { | ||
166 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); | ||
167 | } | ||
168 | |||
169 | static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { | 146 | static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { |
170 | .per_2_per_addr = 1677, | 147 | .per_2_per_addr = 1677, |
171 | }; | 148 | }; |
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void) | |||
199 | 176 | ||
200 | imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); | 177 | imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); |
201 | } | 178 | } |
179 | #endif /* ifdef CONFIG_SOC_IMX31 */ | ||
180 | |||
181 | #ifdef CONFIG_SOC_IMX35 | ||
182 | static struct map_desc mx35_io_desc[] __initdata = { | ||
183 | imx_map_entry(MX35, X_MEMC, MT_DEVICE), | ||
184 | imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED), | ||
185 | imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED), | ||
186 | imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED), | ||
187 | imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED), | ||
188 | }; | ||
189 | |||
190 | void __init mx35_map_io(void) | ||
191 | { | ||
192 | iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); | ||
193 | } | ||
194 | |||
195 | void __init imx35_init_early(void) | ||
196 | { | ||
197 | mxc_set_cpu_type(MXC_CPU_MX35); | ||
198 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); | ||
199 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | ||
200 | pm_idle = imx3_idle; | ||
201 | imx_ioremap = imx3_ioremap; | ||
202 | } | ||
203 | |||
204 | void __init mx35_init_irq(void) | ||
205 | { | ||
206 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); | ||
207 | } | ||
202 | 208 | ||
203 | static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { | 209 | static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { |
204 | .ap_2_ap_addr = 642, | 210 | .ap_2_ap_addr = 642, |
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void) | |||
254 | 260 | ||
255 | imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); | 261 | imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); |
256 | } | 262 | } |
263 | #endif /* ifdef CONFIG_SOC_IMX35 */ | ||