diff options
Diffstat (limited to 'arch/arm/mach-imx/mach-mx27_3ds.c')
-rw-r--r-- | arch/arm/mach-imx/mach-mx27_3ds.c | 93 |
1 files changed, 92 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index b31d4129e10e..6fa6934ab150 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/mfd/mc13783.h> | 29 | #include <linux/mfd/mc13783.h> |
30 | #include <linux/spi/spi.h> | 30 | #include <linux/spi/spi.h> |
31 | #include <linux/regulator/machine.h> | 31 | #include <linux/regulator/machine.h> |
32 | #include <linux/spi/l4f00242t03.h> | ||
32 | 33 | ||
33 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
34 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
@@ -47,7 +48,10 @@ | |||
47 | #define SPI2_SS0 IMX_GPIO_NR(4, 21) | 48 | #define SPI2_SS0 IMX_GPIO_NR(4, 21) |
48 | #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) | 49 | #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) |
49 | #define PMIC_INT IMX_GPIO_NR(3, 14) | 50 | #define PMIC_INT IMX_GPIO_NR(3, 14) |
51 | #define SPI1_SS0 IMX_GPIO_NR(4, 28) | ||
50 | #define SD1_CD IMX_GPIO_NR(2, 26) | 52 | #define SD1_CD IMX_GPIO_NR(2, 26) |
53 | #define LCD_RESET IMX_GPIO_NR(1, 3) | ||
54 | #define LCD_ENABLE IMX_GPIO_NR(1, 31) | ||
51 | 55 | ||
52 | static const int mx27pdk_pins[] __initconst = { | 56 | static const int mx27pdk_pins[] __initconst = { |
53 | /* UART1 */ | 57 | /* UART1 */ |
@@ -96,6 +100,12 @@ static const int mx27pdk_pins[] __initconst = { | |||
96 | PE2_PF_USBOTG_DIR, | 100 | PE2_PF_USBOTG_DIR, |
97 | PE24_PF_USBOTG_CLK, | 101 | PE24_PF_USBOTG_CLK, |
98 | PE25_PF_USBOTG_DATA7, | 102 | PE25_PF_USBOTG_DATA7, |
103 | /* CSPI1 */ | ||
104 | PD31_PF_CSPI1_MOSI, | ||
105 | PD30_PF_CSPI1_MISO, | ||
106 | PD29_PF_CSPI1_SCLK, | ||
107 | PD25_PF_CSPI1_RDY, | ||
108 | SPI1_SS0 | GPIO_GPIO | GPIO_OUT, | ||
99 | /* CSPI2 */ | 109 | /* CSPI2 */ |
100 | PD22_PF_CSPI2_SCLK, | 110 | PD22_PF_CSPI2_SCLK, |
101 | PD23_PF_CSPI2_MISO, | 111 | PD23_PF_CSPI2_MISO, |
@@ -106,6 +116,31 @@ static const int mx27pdk_pins[] __initconst = { | |||
106 | PD18_PF_I2C_CLK, | 116 | PD18_PF_I2C_CLK, |
107 | /* PMIC INT */ | 117 | /* PMIC INT */ |
108 | PMIC_INT | GPIO_GPIO | GPIO_IN, | 118 | PMIC_INT | GPIO_GPIO | GPIO_IN, |
119 | /* LCD */ | ||
120 | PA5_PF_LSCLK, | ||
121 | PA6_PF_LD0, | ||
122 | PA7_PF_LD1, | ||
123 | PA8_PF_LD2, | ||
124 | PA9_PF_LD3, | ||
125 | PA10_PF_LD4, | ||
126 | PA11_PF_LD5, | ||
127 | PA12_PF_LD6, | ||
128 | PA13_PF_LD7, | ||
129 | PA14_PF_LD8, | ||
130 | PA15_PF_LD9, | ||
131 | PA16_PF_LD10, | ||
132 | PA17_PF_LD11, | ||
133 | PA18_PF_LD12, | ||
134 | PA19_PF_LD13, | ||
135 | PA20_PF_LD14, | ||
136 | PA21_PF_LD15, | ||
137 | PA22_PF_LD16, | ||
138 | PA23_PF_LD17, | ||
139 | PA28_PF_HSYNC, | ||
140 | PA29_PF_VSYNC, | ||
141 | PA30_PF_CONTRAST, | ||
142 | LCD_ENABLE | GPIO_GPIO | GPIO_OUT, | ||
143 | LCD_RESET | GPIO_GPIO | GPIO_OUT, | ||
109 | }; | 144 | }; |
110 | 145 | ||
111 | static const struct imxuart_platform_data uart_pdata __initconst = { | 146 | static const struct imxuart_platform_data uart_pdata __initconst = { |
@@ -258,10 +293,18 @@ static struct mc13xxx_platform_data mc13783_pdata = { | |||
258 | .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), | 293 | .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), |
259 | 294 | ||
260 | }, | 295 | }, |
261 | .flags = MC13783_USE_REGULATOR, | 296 | .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN | |
297 | MC13783_USE_RTC, | ||
262 | }; | 298 | }; |
263 | 299 | ||
264 | /* SPI */ | 300 | /* SPI */ |
301 | static int spi1_chipselect[] = {SPI1_SS0}; | ||
302 | |||
303 | static const struct spi_imx_master spi1_pdata __initconst = { | ||
304 | .chipselect = spi1_chipselect, | ||
305 | .num_chipselect = ARRAY_SIZE(spi1_chipselect), | ||
306 | }; | ||
307 | |||
265 | static int spi2_chipselect[] = {SPI2_SS0}; | 308 | static int spi2_chipselect[] = {SPI2_SS0}; |
266 | 309 | ||
267 | static const struct spi_imx_master spi2_pdata __initconst = { | 310 | static const struct spi_imx_master spi2_pdata __initconst = { |
@@ -269,6 +312,46 @@ static const struct spi_imx_master spi2_pdata __initconst = { | |||
269 | .num_chipselect = ARRAY_SIZE(spi2_chipselect), | 312 | .num_chipselect = ARRAY_SIZE(spi2_chipselect), |
270 | }; | 313 | }; |
271 | 314 | ||
315 | static struct imx_fb_videomode mx27_3ds_modes[] = { | ||
316 | { /* 480x640 @ 60 Hz */ | ||
317 | .mode = { | ||
318 | .name = "Epson-VGA", | ||
319 | .refresh = 60, | ||
320 | .xres = 480, | ||
321 | .yres = 640, | ||
322 | .pixclock = 41701, | ||
323 | .left_margin = 20, | ||
324 | .right_margin = 41, | ||
325 | .upper_margin = 10, | ||
326 | .lower_margin = 5, | ||
327 | .hsync_len = 20, | ||
328 | .vsync_len = 10, | ||
329 | .sync = FB_SYNC_OE_ACT_HIGH | | ||
330 | FB_SYNC_CLK_INVERT, | ||
331 | .vmode = FB_VMODE_NONINTERLACED, | ||
332 | .flag = 0, | ||
333 | }, | ||
334 | .bpp = 16, | ||
335 | .pcr = 0xFAC08B82, | ||
336 | }, | ||
337 | }; | ||
338 | |||
339 | static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = { | ||
340 | .mode = mx27_3ds_modes, | ||
341 | .num_modes = ARRAY_SIZE(mx27_3ds_modes), | ||
342 | .pwmr = 0x00A903FF, | ||
343 | .lscr1 = 0x00120300, | ||
344 | .dmacr = 0x00020010, | ||
345 | }; | ||
346 | |||
347 | /* LCD */ | ||
348 | static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = { | ||
349 | .reset_gpio = LCD_RESET, | ||
350 | .data_enable_gpio = LCD_ENABLE, | ||
351 | .core_supply = "lcd_2v8", | ||
352 | .io_supply = "vdd_lcdio", | ||
353 | }; | ||
354 | |||
272 | static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { | 355 | static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { |
273 | { | 356 | { |
274 | .modalias = "mc13783", | 357 | .modalias = "mc13783", |
@@ -278,6 +361,12 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { | |||
278 | .platform_data = &mc13783_pdata, | 361 | .platform_data = &mc13783_pdata, |
279 | .irq = gpio_to_irq(PMIC_INT), | 362 | .irq = gpio_to_irq(PMIC_INT), |
280 | .mode = SPI_CS_HIGH, | 363 | .mode = SPI_CS_HIGH, |
364 | }, { | ||
365 | .modalias = "l4f00242t03", | ||
366 | .max_speed_hz = 5000000, | ||
367 | .bus_num = 0, | ||
368 | .chip_select = 0, /* SS0 */ | ||
369 | .platform_data = &mx27_3ds_lcd_pdata, | ||
281 | }, | 370 | }, |
282 | }; | 371 | }; |
283 | 372 | ||
@@ -311,12 +400,14 @@ static void __init mx27pdk_init(void) | |||
311 | imx27_add_fsl_usb2_udc(&otg_device_pdata); | 400 | imx27_add_fsl_usb2_udc(&otg_device_pdata); |
312 | 401 | ||
313 | imx27_add_spi_imx1(&spi2_pdata); | 402 | imx27_add_spi_imx1(&spi2_pdata); |
403 | imx27_add_spi_imx0(&spi1_pdata); | ||
314 | spi_register_board_info(mx27_3ds_spi_devs, | 404 | spi_register_board_info(mx27_3ds_spi_devs, |
315 | ARRAY_SIZE(mx27_3ds_spi_devs)); | 405 | ARRAY_SIZE(mx27_3ds_spi_devs)); |
316 | 406 | ||
317 | if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) | 407 | if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) |
318 | pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); | 408 | pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); |
319 | imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); | 409 | imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); |
410 | imx27_add_imx_fb(&mx27_3ds_fb_data); | ||
320 | } | 411 | } |
321 | 412 | ||
322 | static void __init mx27pdk_timer_init(void) | 413 | static void __init mx27pdk_timer_init(void) |