diff options
Diffstat (limited to 'arch/arm/mach-imx/cpufreq.c')
-rw-r--r-- | arch/arm/mach-imx/cpufreq.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c index 4f66e90db74f..7e70e0b0b989 100644 --- a/arch/arm/mach-imx/cpufreq.c +++ b/arch/arm/mach-imx/cpufreq.c | |||
@@ -50,6 +50,7 @@ | |||
50 | #define CR_920T_ASYNC_MODE 0xC0000000 | 50 | #define CR_920T_ASYNC_MODE 0xC0000000 |
51 | 51 | ||
52 | static u32 mpctl0_at_boot; | 52 | static u32 mpctl0_at_boot; |
53 | static u32 bclk_div_at_boot; | ||
53 | 54 | ||
54 | static void imx_set_async_mode(void) | 55 | static void imx_set_async_mode(void) |
55 | { | 56 | { |
@@ -82,13 +83,13 @@ static void imx_set_mpctl0(u32 mpctl0) | |||
82 | * imx_compute_mpctl - compute new PLL parameters | 83 | * imx_compute_mpctl - compute new PLL parameters |
83 | * @new_mpctl: pointer to location assigned by new PLL control register value | 84 | * @new_mpctl: pointer to location assigned by new PLL control register value |
84 | * @cur_mpctl: current PLL control register parameters | 85 | * @cur_mpctl: current PLL control register parameters |
86 | * @f_ref: reference source frequency Hz | ||
85 | * @freq: required frequency in Hz | 87 | * @freq: required frequency in Hz |
86 | * @relation: is one of %CPUFREQ_RELATION_L (supremum) | 88 | * @relation: is one of %CPUFREQ_RELATION_L (supremum) |
87 | * and %CPUFREQ_RELATION_H (infimum) | 89 | * and %CPUFREQ_RELATION_H (infimum) |
88 | */ | 90 | */ |
89 | long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, unsigned long freq, int relation) | 91 | long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, u32 f_ref, unsigned long freq, int relation) |
90 | { | 92 | { |
91 | u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512); | ||
92 | u32 mfi; | 93 | u32 mfi; |
93 | u32 mfn; | 94 | u32 mfn; |
94 | u32 mfd; | 95 | u32 mfd; |
@@ -182,7 +183,7 @@ static int imx_set_target(struct cpufreq_policy *policy, | |||
182 | unsigned long flags; | 183 | unsigned long flags; |
183 | long freq; | 184 | long freq; |
184 | long sysclk; | 185 | long sysclk; |
185 | unsigned int bclk_div = 1; | 186 | unsigned int bclk_div = bclk_div_at_boot; |
186 | 187 | ||
187 | /* | 188 | /* |
188 | * Some governors do not respects CPU and policy lower limits | 189 | * Some governors do not respects CPU and policy lower limits |
@@ -202,8 +203,8 @@ static int imx_set_target(struct cpufreq_policy *policy, | |||
202 | 203 | ||
203 | sysclk = imx_get_system_clk(); | 204 | sysclk = imx_get_system_clk(); |
204 | 205 | ||
205 | if (freq > sysclk + 1000000) { | 206 | if (freq > sysclk / bclk_div_at_boot + 1000000) { |
206 | freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, freq, relation); | 207 | freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation); |
207 | if (freq < 0) { | 208 | if (freq < 0) { |
208 | printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq); | 209 | printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq); |
209 | return -EINVAL; | 210 | return -EINVAL; |
@@ -217,6 +218,8 @@ static int imx_set_target(struct cpufreq_policy *policy, | |||
217 | 218 | ||
218 | if(bclk_div > 16) | 219 | if(bclk_div > 16) |
219 | bclk_div = 16; | 220 | bclk_div = 16; |
221 | if(bclk_div < bclk_div_at_boot) | ||
222 | bclk_div = bclk_div_at_boot; | ||
220 | } | 223 | } |
221 | freq = (sysclk + bclk_div / 2) / bclk_div; | 224 | freq = (sysclk + bclk_div / 2) / bclk_div; |
222 | } | 225 | } |
@@ -285,7 +288,7 @@ static struct cpufreq_driver imx_driver = { | |||
285 | 288 | ||
286 | static int __init imx_cpufreq_init(void) | 289 | static int __init imx_cpufreq_init(void) |
287 | { | 290 | { |
288 | 291 | bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1; | |
289 | mpctl0_at_boot = 0; | 292 | mpctl0_at_boot = 0; |
290 | 293 | ||
291 | if((CSCR & CSCR_MPEN) && | 294 | if((CSCR & CSCR_MPEN) && |