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Diffstat (limited to 'arch/arm/mach-imx/cpufreq.c')
-rw-r--r--arch/arm/mach-imx/cpufreq.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index e548ba74a4d2..be0809b33e08 100644
--- a/arch/arm/mach-imx/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -32,6 +32,8 @@
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/init.h> 33#include <linux/init.h>
34#include <linux/cpufreq.h> 34#include <linux/cpufreq.h>
35#include <linux/clk.h>
36#include <linux/err.h>
35#include <asm/system.h> 37#include <asm/system.h>
36 38
37#include <asm/hardware.h> 39#include <asm/hardware.h>
@@ -52,6 +54,8 @@
52static u32 mpctl0_at_boot; 54static u32 mpctl0_at_boot;
53static u32 bclk_div_at_boot; 55static u32 bclk_div_at_boot;
54 56
57static struct clk *system_clk, *mcu_clk;
58
55static void imx_set_async_mode(void) 59static void imx_set_async_mode(void)
56{ 60{
57 adjust_cr(CR_920T_CLOCK_MODE, CR_920T_ASYNC_MODE); 61 adjust_cr(CR_920T_CLOCK_MODE, CR_920T_ASYNC_MODE);
@@ -160,10 +164,10 @@ static unsigned int imx_get_speed(unsigned int cpu)
160 cr = get_cr(); 164 cr = get_cr();
161 165
162 if((cr & CR_920T_CLOCK_MODE) == CR_920T_FASTBUS_MODE) { 166 if((cr & CR_920T_CLOCK_MODE) == CR_920T_FASTBUS_MODE) {
163 freq = imx_get_system_clk(); 167 freq = clk_get_rate(system_clk);
164 freq = (freq + bclk_div/2) / bclk_div; 168 freq = (freq + bclk_div/2) / bclk_div;
165 } else { 169 } else {
166 freq = imx_get_mcu_clk(); 170 freq = clk_get_rate(mcu_clk);
167 if (cscr & CSCR_MPU_PRESC) 171 if (cscr & CSCR_MPU_PRESC)
168 freq /= 2; 172 freq /= 2;
169 } 173 }
@@ -201,7 +205,7 @@ static int imx_set_target(struct cpufreq_policy *policy,
201 pr_debug(KERN_DEBUG "imx: requested frequency %ld Hz, mpctl0 at boot 0x%08x\n", 205 pr_debug(KERN_DEBUG "imx: requested frequency %ld Hz, mpctl0 at boot 0x%08x\n",
202 freq, mpctl0_at_boot); 206 freq, mpctl0_at_boot);
203 207
204 sysclk = imx_get_system_clk(); 208 sysclk = clk_get_rate(system_clk);
205 209
206 if (freq > sysclk / bclk_div_at_boot + 1000000) { 210 if (freq > sysclk / bclk_div_at_boot + 1000000) {
207 freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation); 211 freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation);
@@ -290,6 +294,16 @@ static int __init imx_cpufreq_init(void)
290 bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1; 294 bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1;
291 mpctl0_at_boot = 0; 295 mpctl0_at_boot = 0;
292 296
297 system_clk = clk_get(NULL, "system_clk");
298 if (IS_ERR(system_clk))
299 return PTR_ERR(system_clk);
300
301 mcu_clk = clk_get(NULL, "mcu_clk");
302 if (IS_ERR(mcu_clk)) {
303 clk_put(system_clk);
304 return PTR_ERR(mcu_clk);
305 }
306
293 if((CSCR & CSCR_MPEN) && 307 if((CSCR & CSCR_MPEN) &&
294 ((get_cr() & CR_920T_CLOCK_MODE) != CR_920T_FASTBUS_MODE)) 308 ((get_cr() & CR_920T_CLOCK_MODE) != CR_920T_FASTBUS_MODE))
295 mpctl0_at_boot = MPCTL0; 309 mpctl0_at_boot = MPCTL0;