aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-imx/cpu-imx5.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-imx/cpu-imx5.c')
-rw-r--r--arch/arm/mach-imx/cpu-imx5.c36
1 files changed, 0 insertions, 36 deletions
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c
index 5e2e7a843860..aa15c517d06e 100644
--- a/arch/arm/mach-imx/cpu-imx5.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
@@ -149,39 +149,3 @@ int mx50_revision(void)
149 return mx5_cpu_rev; 149 return mx5_cpu_rev;
150} 150}
151EXPORT_SYMBOL(mx50_revision); 151EXPORT_SYMBOL(mx50_revision);
152
153static int __init post_cpu_init(void)
154{
155 unsigned int reg;
156 void __iomem *base;
157
158 if (cpu_is_mx51() || cpu_is_mx53()) {
159 if (cpu_is_mx51())
160 base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
161 else
162 base = MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR);
163
164 __raw_writel(0x0, base + 0x40);
165 __raw_writel(0x0, base + 0x44);
166 __raw_writel(0x0, base + 0x48);
167 __raw_writel(0x0, base + 0x4C);
168 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
169 __raw_writel(reg, base + 0x50);
170
171 if (cpu_is_mx51())
172 base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
173 else
174 base = MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR);
175
176 __raw_writel(0x0, base + 0x40);
177 __raw_writel(0x0, base + 0x44);
178 __raw_writel(0x0, base + 0x48);
179 __raw_writel(0x0, base + 0x4C);
180 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
181 __raw_writel(reg, base + 0x50);
182 }
183
184 return 0;
185}
186
187postcore_initcall(post_cpu_init);