diff options
Diffstat (limited to 'arch/arm/mach-imx/cpu-imx35.c')
-rw-r--r-- | arch/arm/mach-imx/cpu-imx35.c | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c index 6637cd819ecb..846e46eb8cbf 100644 --- a/arch/arm/mach-imx/cpu-imx35.c +++ b/arch/arm/mach-imx/cpu-imx35.c | |||
@@ -13,32 +13,30 @@ | |||
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | #include <mach/iim.h> | 14 | #include <mach/iim.h> |
15 | 15 | ||
16 | unsigned int mx35_cpu_rev; | 16 | static int mx35_cpu_rev = -1; |
17 | EXPORT_SYMBOL(mx35_cpu_rev); | ||
18 | 17 | ||
19 | void __init mx35_read_cpu_rev(void) | 18 | static int mx35_read_cpu_rev(void) |
20 | { | 19 | { |
21 | u32 rev; | 20 | u32 rev; |
22 | char *srev; | ||
23 | 21 | ||
24 | rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); | 22 | rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); |
25 | switch (rev) { | 23 | switch (rev) { |
26 | case 0x00: | 24 | case 0x00: |
27 | mx35_cpu_rev = IMX_CHIP_REVISION_1_0; | 25 | return IMX_CHIP_REVISION_1_0; |
28 | srev = "1.0"; | ||
29 | break; | ||
30 | case 0x10: | 26 | case 0x10: |
31 | mx35_cpu_rev = IMX_CHIP_REVISION_2_0; | 27 | return IMX_CHIP_REVISION_2_0; |
32 | srev = "2.0"; | ||
33 | break; | ||
34 | case 0x11: | 28 | case 0x11: |
35 | mx35_cpu_rev = IMX_CHIP_REVISION_2_1; | 29 | return IMX_CHIP_REVISION_2_1; |
36 | srev = "2.1"; | ||
37 | break; | ||
38 | default: | 30 | default: |
39 | mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; | 31 | return IMX_CHIP_REVISION_UNKNOWN; |
40 | srev = "unknown"; | ||
41 | } | 32 | } |
33 | } | ||
34 | |||
35 | int mx35_revision(void) | ||
36 | { | ||
37 | if (mx35_cpu_rev == -1) | ||
38 | mx35_cpu_rev = mx35_read_cpu_rev(); | ||
42 | 39 | ||
43 | printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev); | 40 | return mx35_cpu_rev; |
44 | } | 41 | } |
42 | EXPORT_SYMBOL(mx35_revision); | ||