diff options
Diffstat (limited to 'arch/arm/mach-imx/clock-imx31.c')
-rw-r--r-- | arch/arm/mach-imx/clock-imx31.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c index d973770b1f96..988a28178d4c 100644 --- a/arch/arm/mach-imx/clock-imx31.c +++ b/arch/arm/mach-imx/clock-imx31.c | |||
@@ -476,7 +476,7 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CGR0, 4, NULL, NULL, &perclk_clk); | |||
476 | DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk); | 476 | DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk); |
477 | DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk); | 477 | DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk); |
478 | DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk); | 478 | DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk); |
479 | DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk); | 479 | DEFINE_CLOCK(pata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk); |
480 | DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk); | 480 | DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk); |
481 | DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk); | 481 | DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk); |
482 | DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk); | 482 | DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk); |
@@ -562,7 +562,7 @@ static struct clk_lookup lookups[] = { | |||
562 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) | 562 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) |
563 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) | 563 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) |
564 | _REGISTER_CLOCK(NULL, "firi", firi_clk) | 564 | _REGISTER_CLOCK(NULL, "firi", firi_clk) |
565 | _REGISTER_CLOCK(NULL, "ata", ata_clk) | 565 | _REGISTER_CLOCK("pata_imx", NULL, pata_clk) |
566 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) | 566 | _REGISTER_CLOCK(NULL, "rtic", rtic_clk) |
567 | _REGISTER_CLOCK(NULL, "rng", rng_clk) | 567 | _REGISTER_CLOCK(NULL, "rng", rng_clk) |
568 | _REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1) | 568 | _REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1) |
@@ -611,11 +611,11 @@ int __init mx31_clocks_init(unsigned long fref) | |||
611 | clk_enable(&gpt_clk); | 611 | clk_enable(&gpt_clk); |
612 | clk_enable(&emi_clk); | 612 | clk_enable(&emi_clk); |
613 | clk_enable(&iim_clk); | 613 | clk_enable(&iim_clk); |
614 | mx31_revision(); | ||
615 | clk_disable(&iim_clk); | ||
614 | 616 | ||
615 | clk_enable(&serial_pll_clk); | 617 | clk_enable(&serial_pll_clk); |
616 | 618 | ||
617 | mx31_read_cpu_rev(); | ||
618 | |||
619 | if (mx31_revision() >= IMX_CHIP_REVISION_2_0) { | 619 | if (mx31_revision() >= IMX_CHIP_REVISION_2_0) { |
620 | reg = __raw_readl(MXC_CCM_PMCR1); | 620 | reg = __raw_readl(MXC_CCM_PMCR1); |
621 | /* No PLL restart on DVFS switch; enable auto EMI handshake */ | 621 | /* No PLL restart on DVFS switch; enable auto EMI handshake */ |