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-rw-r--r--arch/arm/mach-imx/clk.h83
1 files changed, 83 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
new file mode 100644
index 000000000000..1bf64fe2523c
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+++ b/arch/arm/mach-imx/clk.h
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1#ifndef __MACH_IMX_CLK_H
2#define __MACH_IMX_CLK_H
3
4#include <linux/spinlock.h>
5#include <linux/clk-provider.h>
6#include <mach/clock.h>
7
8struct clk *imx_clk_pllv1(const char *name, const char *parent,
9 void __iomem *base);
10
11struct clk *imx_clk_pllv2(const char *name, const char *parent,
12 void __iomem *base);
13
14enum imx_pllv3_type {
15 IMX_PLLV3_GENERIC,
16 IMX_PLLV3_SYS,
17 IMX_PLLV3_USB,
18 IMX_PLLV3_AV,
19 IMX_PLLV3_ENET,
20 IMX_PLLV3_MLB,
21};
22
23struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
24 const char *parent_name, void __iomem *base, u32 gate_mask,
25 u32 div_mask);
26
27struct clk *clk_register_gate2(struct device *dev, const char *name,
28 const char *parent_name, unsigned long flags,
29 void __iomem *reg, u8 bit_idx,
30 u8 clk_gate_flags, spinlock_t *lock);
31
32static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
33 void __iomem *reg, u8 shift)
34{
35 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
36 shift, 0, &imx_ccm_lock);
37}
38
39struct clk *imx_clk_pfd(const char *name, const char *parent_name,
40 void __iomem *reg, u8 idx);
41
42struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
43 void __iomem *reg, u8 shift, u8 width,
44 void __iomem *busy_reg, u8 busy_shift);
45
46struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
47 u8 width, void __iomem *busy_reg, u8 busy_shift,
48 const char **parent_names, int num_parents);
49
50static inline struct clk *imx_clk_fixed(const char *name, int rate)
51{
52 return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
53}
54
55static inline struct clk *imx_clk_divider(const char *name, const char *parent,
56 void __iomem *reg, u8 shift, u8 width)
57{
58 return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
59 reg, shift, width, 0, &imx_ccm_lock);
60}
61
62static inline struct clk *imx_clk_gate(const char *name, const char *parent,
63 void __iomem *reg, u8 shift)
64{
65 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
66 shift, 0, &imx_ccm_lock);
67}
68
69static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
70 u8 shift, u8 width, const char **parents, int num_parents)
71{
72 return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,
73 width, 0, &imx_ccm_lock);
74}
75
76static inline struct clk *imx_clk_fixed_factor(const char *name,
77 const char *parent, unsigned int mult, unsigned int div)
78{
79 return clk_register_fixed_factor(NULL, name, parent,
80 CLK_SET_RATE_PARENT, mult, div);
81}
82
83#endif