diff options
Diffstat (limited to 'arch/arm/mach-imx/clk-pllv1.c')
-rw-r--r-- | arch/arm/mach-imx/clk-pllv1.c | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c new file mode 100644 index 000000000000..2d856f9ccf59 --- /dev/null +++ b/arch/arm/mach-imx/clk-pllv1.c | |||
@@ -0,0 +1,66 @@ | |||
1 | #include <linux/clk.h> | ||
2 | #include <linux/clk-provider.h> | ||
3 | #include <linux/io.h> | ||
4 | #include <linux/slab.h> | ||
5 | #include <linux/kernel.h> | ||
6 | #include <linux/err.h> | ||
7 | #include <mach/common.h> | ||
8 | #include <mach/hardware.h> | ||
9 | #include <mach/clock.h> | ||
10 | #include "clk.h" | ||
11 | |||
12 | /** | ||
13 | * pll v1 | ||
14 | * | ||
15 | * @clk_hw clock source | ||
16 | * @parent the parent clock name | ||
17 | * @base base address of pll registers | ||
18 | * | ||
19 | * PLL clock version 1, found on i.MX1/21/25/27/31/35 | ||
20 | */ | ||
21 | struct clk_pllv1 { | ||
22 | struct clk_hw hw; | ||
23 | void __iomem *base; | ||
24 | }; | ||
25 | |||
26 | #define to_clk_pllv1(clk) (container_of(clk, struct clk_pllv1, clk)) | ||
27 | |||
28 | static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw, | ||
29 | unsigned long parent_rate) | ||
30 | { | ||
31 | struct clk_pllv1 *pll = to_clk_pllv1(hw); | ||
32 | |||
33 | return mxc_decode_pll(readl(pll->base), parent_rate); | ||
34 | } | ||
35 | |||
36 | struct clk_ops clk_pllv1_ops = { | ||
37 | .recalc_rate = clk_pllv1_recalc_rate, | ||
38 | }; | ||
39 | |||
40 | struct clk *imx_clk_pllv1(const char *name, const char *parent, | ||
41 | void __iomem *base) | ||
42 | { | ||
43 | struct clk_pllv1 *pll; | ||
44 | struct clk *clk; | ||
45 | struct clk_init_data init; | ||
46 | |||
47 | pll = kmalloc(sizeof(*pll), GFP_KERNEL); | ||
48 | if (!pll) | ||
49 | return ERR_PTR(-ENOMEM); | ||
50 | |||
51 | pll->base = base; | ||
52 | |||
53 | init.name = name; | ||
54 | init.ops = &clk_pllv1_ops; | ||
55 | init.flags = 0; | ||
56 | init.parent_names = &parent; | ||
57 | init.num_parents = 1; | ||
58 | |||
59 | pll->hw.init = &init; | ||
60 | |||
61 | clk = clk_register(NULL, &pll->hw); | ||
62 | if (IS_ERR(clk)) | ||
63 | kfree(pll); | ||
64 | |||
65 | return clk; | ||
66 | } | ||