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Diffstat (limited to 'arch/arm/mach-imx/clk-imx51-imx53.c')
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c29
1 files changed, 10 insertions, 19 deletions
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 7c0dc4540aa4..ceaac9cd7b42 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -11,6 +11,7 @@
11#include <linux/clk.h> 11#include <linux/clk.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/clkdev.h> 13#include <linux/clkdev.h>
14#include <linux/clk-provider.h>
14#include <linux/of.h> 15#include <linux/of.h>
15#include <linux/err.h> 16#include <linux/err.h>
16 17
@@ -131,8 +132,6 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
131{ 132{
132 int i; 133 int i;
133 134
134 of_clk_init(NULL);
135
136 clk[dummy] = imx_clk_fixed("dummy", 0); 135 clk[dummy] = imx_clk_fixed("dummy", 0);
137 clk[ckil] = imx_obtain_fixed_clock("ckil", rate_ckil); 136 clk[ckil] = imx_obtain_fixed_clock("ckil", rate_ckil);
138 clk[osc] = imx_obtain_fixed_clock("osc", rate_osc); 137 clk[osc] = imx_obtain_fixed_clock("osc", rate_osc);
@@ -465,12 +464,16 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
465 return 0; 464 return 0;
466} 465}
467 466
468int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, 467static void __init mx51_clocks_init_dt(struct device_node *np)
469 unsigned long rate_ckih1, unsigned long rate_ckih2) 468{
469 mx51_clocks_init(0, 0, 0, 0);
470}
471CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init_dt);
472
473static void __init mx53_clocks_init(struct device_node *np)
470{ 474{
471 int i; 475 int i;
472 unsigned long r; 476 unsigned long r;
473 struct device_node *np;
474 477
475 clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE); 478 clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
476 clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE); 479 clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
@@ -529,12 +532,11 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
529 pr_err("i.MX53 clk %d: register failed with %ld\n", 532 pr_err("i.MX53 clk %d: register failed with %ld\n",
530 i, PTR_ERR(clk[i])); 533 i, PTR_ERR(clk[i]));
531 534
532 np = of_find_compatible_node(NULL, NULL, "fsl,imx53-ccm");
533 clk_data.clks = clk; 535 clk_data.clks = clk;
534 clk_data.clk_num = ARRAY_SIZE(clk); 536 clk_data.clk_num = ARRAY_SIZE(clk);
535 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); 537 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
536 538
537 mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); 539 mx5_clocks_common_init(0, 0, 0, 0);
538 540
539 clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0"); 541 clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
540 clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); 542 clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
@@ -566,16 +568,5 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
566 568
567 r = clk_round_rate(clk[usboh3_per_gate], 54000000); 569 r = clk_round_rate(clk[usboh3_per_gate], 54000000);
568 clk_set_rate(clk[usboh3_per_gate], r); 570 clk_set_rate(clk[usboh3_per_gate], r);
569
570 return 0;
571}
572
573int __init mx51_clocks_init_dt(void)
574{
575 return mx51_clocks_init(0, 0, 0, 0);
576}
577
578int __init mx53_clocks_init_dt(void)
579{
580 return mx53_clocks_init(0, 0, 0, 0);
581} 571}
572CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);