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Diffstat (limited to 'arch/arm/mach-imx/clk-imx51-imx53.c')
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index a163e0e365dc..efbccc0dcada 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -110,6 +110,7 @@ enum imx5_clks {
110 owire_gate, gpu3d_s, gpu2d_s, gpu3d_gate, gpu2d_gate, garb_gate, 110 owire_gate, gpu3d_s, gpu2d_s, gpu3d_gate, gpu2d_gate, garb_gate,
111 cko1_sel, cko1_podf, cko1, 111 cko1_sel, cko1_podf, cko1,
112 cko2_sel, cko2_podf, cko2, 112 cko2_sel, cko2_podf, cko2,
113 srtc_gate, pata_gate,
113 clk_max 114 clk_max
114}; 115};
115 116
@@ -266,6 +267,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
266 clk[epit2_ipg_gate] = imx_clk_gate2("epit2_ipg_gate", "ipg", MXC_CCM_CCGR2, 6); 267 clk[epit2_ipg_gate] = imx_clk_gate2("epit2_ipg_gate", "ipg", MXC_CCM_CCGR2, 6);
267 clk[epit2_hf_gate] = imx_clk_gate2("epit2_hf_gate", "per_root", MXC_CCM_CCGR2, 8); 268 clk[epit2_hf_gate] = imx_clk_gate2("epit2_hf_gate", "per_root", MXC_CCM_CCGR2, 8);
268 clk[owire_gate] = imx_clk_gate2("owire_gate", "per_root", MXC_CCM_CCGR2, 22); 269 clk[owire_gate] = imx_clk_gate2("owire_gate", "per_root", MXC_CCM_CCGR2, 22);
270 clk[srtc_gate] = imx_clk_gate2("srtc_gate", "per_root", MXC_CCM_CCGR4, 28);
271 clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", MXC_CCM_CCGR4, 0);
269 272
270 for (i = 0; i < ARRAY_SIZE(clk); i++) 273 for (i = 0; i < ARRAY_SIZE(clk); i++)
271 if (IS_ERR(clk[i])) 274 if (IS_ERR(clk[i]))