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Diffstat (limited to 'arch/arm/mach-imx/clk-imx27.c')
-rw-r--r--arch/arm/mach-imx/clk-imx27.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 30b3242a7d49..c3cfa4116dc0 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -86,10 +86,12 @@ enum mx27_clks {
86}; 86};
87 87
88static struct clk *clk[clk_max]; 88static struct clk *clk[clk_max];
89static struct clk_onecell_data clk_data;
89 90
90int __init mx27_clocks_init(unsigned long fref) 91int __init mx27_clocks_init(unsigned long fref)
91{ 92{
92 int i; 93 int i;
94 struct device_node *np;
93 95
94 clk[dummy] = imx_clk_fixed("dummy", 0); 96 clk[dummy] = imx_clk_fixed("dummy", 0);
95 clk[ckih] = imx_clk_fixed("ckih", fref); 97 clk[ckih] = imx_clk_fixed("ckih", fref);
@@ -198,6 +200,13 @@ int __init mx27_clocks_init(unsigned long fref)
198 pr_err("i.MX27 clk %d: register failed with %ld\n", 200 pr_err("i.MX27 clk %d: register failed with %ld\n",
199 i, PTR_ERR(clk[i])); 201 i, PTR_ERR(clk[i]));
200 202
203 np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
204 if (np) {
205 clk_data.clks = clk;
206 clk_data.clk_num = ARRAY_SIZE(clk);
207 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
208 }
209
201 clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0"); 210 clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0");
202 clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.0"); 211 clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.0");
203 clk_register_clkdev(clk[uart2_ipg_gate], "ipg", "imx21-uart.1"); 212 clk_register_clkdev(clk[uart2_ipg_gate], "ipg", "imx21-uart.1");
@@ -276,10 +285,8 @@ int __init mx27_clocks_init(unsigned long fref)
276 clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL); 285 clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
277 clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc"); 286 clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
278 clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); 287 clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
279 clk_register_clkdev(clk[cpu_div], "cpu", NULL); 288 clk_register_clkdev(clk[cpu_div], NULL, "cpufreq-cpu0.0");
280 clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); 289 clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
281 clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0");
282 clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1");
283 290
284 mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1); 291 mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
285 292