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Diffstat (limited to 'arch/arm/mach-h720x/common.c')
-rw-r--r--arch/arm/mach-h720x/common.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 1f28c90932c7..51d4e44ab973 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -199,29 +199,29 @@ void __init h720x_init_irq (void)
199 199
200 /* Initialize global IRQ's, fast path */ 200 /* Initialize global IRQ's, fast path */
201 for (irq = 0; irq < NR_GLBL_IRQS; irq++) { 201 for (irq = 0; irq < NR_GLBL_IRQS; irq++) {
202 set_irq_chip(irq, &h720x_global_chip); 202 irq_set_chip_and_handler(irq, &h720x_global_chip,
203 set_irq_handler(irq, handle_level_irq); 203 handle_level_irq);
204 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 204 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
205 } 205 }
206 206
207 /* Initialize multiplexed IRQ's, slow path */ 207 /* Initialize multiplexed IRQ's, slow path */
208 for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { 208 for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) {
209 set_irq_chip(irq, &h720x_gpio_chip); 209 irq_set_chip_and_handler(irq, &h720x_gpio_chip,
210 set_irq_handler(irq, handle_edge_irq); 210 handle_edge_irq);
211 set_irq_flags(irq, IRQF_VALID ); 211 set_irq_flags(irq, IRQF_VALID );
212 } 212 }
213 set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); 213 irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
214 set_irq_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler); 214 irq_set_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler);
215 set_irq_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler); 215 irq_set_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler);
216 set_irq_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler); 216 irq_set_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler);
217 217
218#ifdef CONFIG_CPU_H7202 218#ifdef CONFIG_CPU_H7202
219 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { 219 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) {
220 set_irq_chip(irq, &h720x_gpio_chip); 220 irq_set_chip_and_handler(irq, &h720x_gpio_chip,
221 set_irq_handler(irq, handle_edge_irq); 221 handle_edge_irq);
222 set_irq_flags(irq, IRQF_VALID ); 222 set_irq_flags(irq, IRQF_VALID );
223 } 223 }
224 set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); 224 irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);
225#endif 225#endif
226 226
227 /* Enable multiplexed irq's */ 227 /* Enable multiplexed irq's */