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path: root/arch/arm/mach-h720x/common.c
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Diffstat (limited to 'arch/arm/mach-h720x/common.c')
-rw-r--r--arch/arm/mach-h720x/common.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 7f31816896ad..45144ad2bed9 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -103,7 +103,7 @@ static void
103h720x_gpio_handler(unsigned int mask, unsigned int irq, 103h720x_gpio_handler(unsigned int mask, unsigned int irq,
104 struct irq_desc *desc) 104 struct irq_desc *desc)
105{ 105{
106 IRQDBG("%s irq: %d\n",__FUNCTION__,irq); 106 IRQDBG("%s irq: %d\n", __func__, irq);
107 desc = irq_desc + irq; 107 desc = irq_desc + irq;
108 while (mask) { 108 while (mask) {
109 if (mask & 1) { 109 if (mask & 1) {
@@ -123,7 +123,7 @@ h720x_gpioa_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
123 123
124 mask = CPU_REG(GPIO_A_VIRT,GPIO_STAT); 124 mask = CPU_REG(GPIO_A_VIRT,GPIO_STAT);
125 irq = IRQ_CHAINED_GPIOA(0); 125 irq = IRQ_CHAINED_GPIOA(0);
126 IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); 126 IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
127 h720x_gpio_handler(mask, irq, desc); 127 h720x_gpio_handler(mask, irq, desc);
128} 128}
129 129
@@ -133,7 +133,7 @@ h720x_gpiob_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
133 unsigned int mask, irq; 133 unsigned int mask, irq;
134 mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT); 134 mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT);
135 irq = IRQ_CHAINED_GPIOB(0); 135 irq = IRQ_CHAINED_GPIOB(0);
136 IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); 136 IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
137 h720x_gpio_handler(mask, irq, desc); 137 h720x_gpio_handler(mask, irq, desc);
138} 138}
139 139
@@ -144,7 +144,7 @@ h720x_gpioc_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
144 144
145 mask = CPU_REG(GPIO_C_VIRT,GPIO_STAT); 145 mask = CPU_REG(GPIO_C_VIRT,GPIO_STAT);
146 irq = IRQ_CHAINED_GPIOC(0); 146 irq = IRQ_CHAINED_GPIOC(0);
147 IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); 147 IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
148 h720x_gpio_handler(mask, irq, desc); 148 h720x_gpio_handler(mask, irq, desc);
149} 149}
150 150
@@ -155,7 +155,7 @@ h720x_gpiod_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
155 155
156 mask = CPU_REG(GPIO_D_VIRT,GPIO_STAT); 156 mask = CPU_REG(GPIO_D_VIRT,GPIO_STAT);
157 irq = IRQ_CHAINED_GPIOD(0); 157 irq = IRQ_CHAINED_GPIOD(0);
158 IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); 158 IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
159 h720x_gpio_handler(mask, irq, desc); 159 h720x_gpio_handler(mask, irq, desc);
160} 160}
161 161
@@ -167,7 +167,7 @@ h720x_gpioe_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
167 167
168 mask = CPU_REG(GPIO_E_VIRT,GPIO_STAT); 168 mask = CPU_REG(GPIO_E_VIRT,GPIO_STAT);
169 irq = IRQ_CHAINED_GPIOE(0); 169 irq = IRQ_CHAINED_GPIOE(0);
170 IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); 170 IRQDBG("%s mask: 0x%08x irq: %d\n", __func__, mask,irq);
171 h720x_gpio_handler(mask, irq, desc); 171 h720x_gpio_handler(mask, irq, desc);
172} 172}
173#endif 173#endif