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Diffstat (limited to 'arch/arm/mach-footbridge/time.c')
-rw-r--r-- | arch/arm/mach-footbridge/time.c | 180 |
1 files changed, 180 insertions, 0 deletions
diff --git a/arch/arm/mach-footbridge/time.c b/arch/arm/mach-footbridge/time.c new file mode 100644 index 000000000000..2c64a0b0502e --- /dev/null +++ b/arch/arm/mach-footbridge/time.c | |||
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1 | /* | ||
2 | * linux/include/asm-arm/arch-ebsa285/time.h | ||
3 | * | ||
4 | * Copyright (C) 1998 Russell King. | ||
5 | * Copyright (C) 1998 Phil Blundell | ||
6 | * | ||
7 | * CATS has a real-time clock, though the evaluation board doesn't. | ||
8 | * | ||
9 | * Changelog: | ||
10 | * 21-Mar-1998 RMK Created | ||
11 | * 27-Aug-1998 PJB CATS support | ||
12 | * 28-Dec-1998 APH Made leds optional | ||
13 | * 20-Jan-1999 RMK Started merge of EBSA285, CATS and NetWinder | ||
14 | * 16-Mar-1999 RMK More support for EBSA285-like machines with RTCs in | ||
15 | */ | ||
16 | |||
17 | #define RTC_PORT(x) (rtc_base+(x)) | ||
18 | #define RTC_ALWAYS_BCD 0 | ||
19 | |||
20 | #include <linux/timex.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/sched.h> | ||
23 | #include <linux/mc146818rtc.h> | ||
24 | #include <linux/bcd.h> | ||
25 | |||
26 | #include <asm/hardware.h> | ||
27 | #include <asm/io.h> | ||
28 | |||
29 | #include <asm/mach/time.h> | ||
30 | #include "common.h" | ||
31 | |||
32 | static int rtc_base; | ||
33 | |||
34 | static unsigned long __init get_isa_cmos_time(void) | ||
35 | { | ||
36 | unsigned int year, mon, day, hour, min, sec; | ||
37 | int i; | ||
38 | |||
39 | // check to see if the RTC makes sense..... | ||
40 | if ((CMOS_READ(RTC_VALID) & RTC_VRT) == 0) | ||
41 | return mktime(1970, 1, 1, 0, 0, 0); | ||
42 | |||
43 | /* The Linux interpretation of the CMOS clock register contents: | ||
44 | * When the Update-In-Progress (UIP) flag goes from 1 to 0, the | ||
45 | * RTC registers show the second which has precisely just started. | ||
46 | * Let's hope other operating systems interpret the RTC the same way. | ||
47 | */ | ||
48 | /* read RTC exactly on falling edge of update flag */ | ||
49 | for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ | ||
50 | if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) | ||
51 | break; | ||
52 | |||
53 | for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */ | ||
54 | if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) | ||
55 | break; | ||
56 | |||
57 | do { /* Isn't this overkill ? UIP above should guarantee consistency */ | ||
58 | sec = CMOS_READ(RTC_SECONDS); | ||
59 | min = CMOS_READ(RTC_MINUTES); | ||
60 | hour = CMOS_READ(RTC_HOURS); | ||
61 | day = CMOS_READ(RTC_DAY_OF_MONTH); | ||
62 | mon = CMOS_READ(RTC_MONTH); | ||
63 | year = CMOS_READ(RTC_YEAR); | ||
64 | } while (sec != CMOS_READ(RTC_SECONDS)); | ||
65 | |||
66 | if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | ||
67 | BCD_TO_BIN(sec); | ||
68 | BCD_TO_BIN(min); | ||
69 | BCD_TO_BIN(hour); | ||
70 | BCD_TO_BIN(day); | ||
71 | BCD_TO_BIN(mon); | ||
72 | BCD_TO_BIN(year); | ||
73 | } | ||
74 | if ((year += 1900) < 1970) | ||
75 | year += 100; | ||
76 | return mktime(year, mon, day, hour, min, sec); | ||
77 | } | ||
78 | |||
79 | static int set_isa_cmos_time(void) | ||
80 | { | ||
81 | int retval = 0; | ||
82 | int real_seconds, real_minutes, cmos_minutes; | ||
83 | unsigned char save_control, save_freq_select; | ||
84 | unsigned long nowtime = xtime.tv_sec; | ||
85 | |||
86 | save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ | ||
87 | CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); | ||
88 | |||
89 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */ | ||
90 | CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); | ||
91 | |||
92 | cmos_minutes = CMOS_READ(RTC_MINUTES); | ||
93 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) | ||
94 | BCD_TO_BIN(cmos_minutes); | ||
95 | |||
96 | /* | ||
97 | * since we're only adjusting minutes and seconds, | ||
98 | * don't interfere with hour overflow. This avoids | ||
99 | * messing with unknown time zones but requires your | ||
100 | * RTC not to be off by more than 15 minutes | ||
101 | */ | ||
102 | real_seconds = nowtime % 60; | ||
103 | real_minutes = nowtime / 60; | ||
104 | if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) | ||
105 | real_minutes += 30; /* correct for half hour time zone */ | ||
106 | real_minutes %= 60; | ||
107 | |||
108 | if (abs(real_minutes - cmos_minutes) < 30) { | ||
109 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | ||
110 | BIN_TO_BCD(real_seconds); | ||
111 | BIN_TO_BCD(real_minutes); | ||
112 | } | ||
113 | CMOS_WRITE(real_seconds,RTC_SECONDS); | ||
114 | CMOS_WRITE(real_minutes,RTC_MINUTES); | ||
115 | } else | ||
116 | retval = -1; | ||
117 | |||
118 | /* The following flags have to be released exactly in this order, | ||
119 | * otherwise the DS12887 (popular MC146818A clone with integrated | ||
120 | * battery and quartz) will not reset the oscillator and will not | ||
121 | * update precisely 500 ms later. You won't find this mentioned in | ||
122 | * the Dallas Semiconductor data sheets, but who believes data | ||
123 | * sheets anyway ... -- Markus Kuhn | ||
124 | */ | ||
125 | CMOS_WRITE(save_control, RTC_CONTROL); | ||
126 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); | ||
127 | |||
128 | return retval; | ||
129 | } | ||
130 | |||
131 | void __init isa_rtc_init(void) | ||
132 | { | ||
133 | if (machine_is_co285() || | ||
134 | machine_is_personal_server()) | ||
135 | /* | ||
136 | * Add-in 21285s shouldn't access the RTC | ||
137 | */ | ||
138 | rtc_base = 0; | ||
139 | else | ||
140 | rtc_base = 0x70; | ||
141 | |||
142 | if (rtc_base) { | ||
143 | int reg_d, reg_b; | ||
144 | |||
145 | /* | ||
146 | * Probe for the RTC. | ||
147 | */ | ||
148 | reg_d = CMOS_READ(RTC_REG_D); | ||
149 | |||
150 | /* | ||
151 | * make sure the divider is set | ||
152 | */ | ||
153 | CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A); | ||
154 | |||
155 | /* | ||
156 | * Set control reg B | ||
157 | * (24 hour mode, update enabled) | ||
158 | */ | ||
159 | reg_b = CMOS_READ(RTC_REG_B) & 0x7f; | ||
160 | reg_b |= 2; | ||
161 | CMOS_WRITE(reg_b, RTC_REG_B); | ||
162 | |||
163 | if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ && | ||
164 | CMOS_READ(RTC_REG_B) == reg_b) { | ||
165 | struct timespec tv; | ||
166 | |||
167 | /* | ||
168 | * We have a RTC. Check the battery | ||
169 | */ | ||
170 | if ((reg_d & 0x80) == 0) | ||
171 | printk(KERN_WARNING "RTC: *** warning: CMOS battery bad\n"); | ||
172 | |||
173 | tv.tv_nsec = 0; | ||
174 | tv.tv_sec = get_isa_cmos_time(); | ||
175 | do_settimeofday(&tv); | ||
176 | set_rtc = set_isa_cmos_time; | ||
177 | } else | ||
178 | rtc_base = 0; | ||
179 | } | ||
180 | } | ||