11 files changed, 639 insertions, 0 deletions

diff --git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S
new file mode 100644
index 000000000000..4329b8123570
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S
@@ -0,0 +1,57 @@
+/* arch/arm/mach-footbridge/include/mach/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#include <asm/hardware/dec21285.h>
+
+#ifndef CONFIG_DEBUG_DC21285_PORT
+        /* For NetWinder debugging */
+                .macro  addruart,rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                 @ MMU enabled?
+                moveq   \rx, #0x7c000000        @ physical
+                movne   \rx, #0xff000000        @ virtual
+                orr     \rx, \rx, #0x000003f8
+                .endm
+
+#define UART_SHIFT      0
+#define FLOW_CONTROL
+#include <asm/hardware/debug-8250.S>
+
+#else
+        /* For EBSA285 debugging */
+                .equ    dc21285_high, ARMCSR_BASE & 0xff000000
+                .equ    dc21285_low,  ARMCSR_BASE & 0x00ffffff
+
+                .macro  addruart,rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                 @ MMU enabled?
+                moveq   \rx, #0x42000000
+                movne   \rx, #dc21285_high
+                .if     dc21285_low
+                orrne   \rx, \rx, #dc21285_low
+                .endif
+                .endm
+
+                .macro  senduart,rd,rx
+                str     \rd, [\rx, #0x160]      @ UARTDR
+                .endm
+
+                .macro  busyuart,rd,rx
+1001:           ldr     \rd, [\rx, #0x178]      @ UARTFLG
+                tst     \rd, #1 << 3
+                bne     1001b
+                .endm
+
+                .macro  waituart,rd,rx
+                .endm
+#endif
diff --git a/arch/arm/mach-footbridge/include/mach/dma.h b/arch/arm/mach-footbridge/include/mach/dma.h
new file mode 100644
index 000000000000..62afd213effb
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/dma.h
@@ -0,0 +1,25 @@
+/*
+ *  arch/arm/mach-footbridge/include/mach/dma.h
+ *
+ *  Architecture DMA routines
+ *
+ *  Copyright (C) 1998,1999 Russell King
+ *  Copyright (C) 1998,1999 Philip Blundell
+ */
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H
+
+/*
+ * The 21285 has two internal DMA channels; we call these 8 and 9.
+ * On CATS hardware we have an additional eight ISA dma channels
+ * numbered 0..7.
+ */
+#define _ISA_DMA(x)             (0+(x))
+#define _DC21285_DMA(x)         (8+(x))
+
+#define MAX_DMA_CHANNELS        10
+
+#define DMA_FLOPPY              _ISA_DMA(2)
+#define DMA_ISA_CASCADE         _ISA_DMA(4)
+
+#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-footbridge/include/mach/entry-macro.S b/arch/arm/mach-footbridge/include/mach/entry-macro.S
new file mode 100644
index 000000000000..d3847be0c667
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/entry-macro.S
@@ -0,0 +1,113 @@
+/*
+ * arch/arm/mach-footbridge/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros for footbridge-based platforms
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+#include <asm/hardware/dec21285.h>
+
+                .equ    dc21285_high, ARMCSR_BASE & 0xff000000
+                .equ    dc21285_low, ARMCSR_BASE & 0x00ffffff
+
+                .macro  disable_fiq
+                .endm
+
+                .macro  get_irqnr_preamble, base, tmp
+                mov     \base, #dc21285_high
+                .if     dc21285_low
+                orr     \base, \base, #dc21285_low
+                .endif
+                .endm
+
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
+
+                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+                ldr     \irqstat, [\base, #0x180]       @ get interrupts
+
+                mov     \irqnr, #IRQ_SDRAMPARITY
+                tst     \irqstat, #IRQ_MASK_SDRAMPARITY
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_UART_RX
+                movne   \irqnr, #IRQ_CONRX
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_DMA1
+                movne   \irqnr, #IRQ_DMA1
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_DMA2
+                movne   \irqnr, #IRQ_DMA2
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_IN0
+                movne   \irqnr, #IRQ_IN0
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_IN1
+                movne   \irqnr, #IRQ_IN1
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_IN2
+                movne   \irqnr, #IRQ_IN2
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_IN3
+                movne   \irqnr, #IRQ_IN3
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_PCI
+                movne   \irqnr, #IRQ_PCI
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_DOORBELLHOST
+                movne   \irqnr, #IRQ_DOORBELLHOST
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_I2OINPOST
+                movne   \irqnr, #IRQ_I2OINPOST
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_TIMER1
+                movne   \irqnr, #IRQ_TIMER1
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_TIMER2
+                movne   \irqnr, #IRQ_TIMER2
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_TIMER3
+                movne   \irqnr, #IRQ_TIMER3
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_UART_TX
+                movne   \irqnr, #IRQ_CONTX
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_PCI_ABORT
+                movne   \irqnr, #IRQ_PCI_ABORT
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_PCI_SERR
+                movne   \irqnr, #IRQ_PCI_SERR
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_DISCARD_TIMER
+                movne   \irqnr, #IRQ_DISCARD_TIMER
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_PCI_DPERR
+                movne   \irqnr, #IRQ_PCI_DPERR
+                bne     1001f
+
+                tst     \irqstat, #IRQ_MASK_PCI_PERR
+                movne   \irqnr, #IRQ_PCI_PERR
+1001:
+                .endm
+
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
new file mode 100644
index 000000000000..ffaea90486f9
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -0,0 +1,105 @@
+/*
+ *  arch/arm/mach-footbridge/include/mach/hardware.h
+ *
+ *  Copyright (C) 1998-1999 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  This file contains the hardware definitions of the EBSA-285.
+ */
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <mach/memory.h>
+
+/*   Virtual      Physical      Size
+ * 0xff800000   0x40000000      1MB     X-Bus
+ * 0xff000000   0x7c000000      1MB     PCI I/O space
+ * 0xfe000000   0x42000000      1MB     CSR
+ * 0xfd000000   0x78000000      1MB     Outbound write flush (not supported)
+ * 0xfc000000   0x79000000      1MB     PCI IACK/special space
+ * 0xfb000000   0x7a000000      16MB    PCI Config type 1
+ * 0xfa000000   0x7b000000      16MB    PCI Config type 0
+ * 0xf9000000   0x50000000      1MB     Cache flush
+ * 0xf0000000   0x80000000      16MB    ISA memory
+ */
+#define XBUS_SIZE               0x00100000
+#define XBUS_BASE               0xff800000
+
+#define PCIO_SIZE               0x00100000
+#define PCIO_BASE               0xff000000
+
+#define ARMCSR_SIZE             0x00100000
+#define ARMCSR_BASE             0xfe000000
+
+#define WFLUSH_SIZE             0x00100000
+#define WFLUSH_BASE             0xfd000000
+
+#define PCIIACK_SIZE            0x00100000
+#define PCIIACK_BASE            0xfc000000
+
+#define PCICFG1_SIZE            0x01000000
+#define PCICFG1_BASE            0xfb000000
+
+#define PCICFG0_SIZE            0x01000000
+#define PCICFG0_BASE            0xfa000000
+
+#define PCIMEM_SIZE             0x01000000
+#define PCIMEM_BASE             0xf0000000
+
+#define XBUS_LEDS               ((volatile unsigned char *)(XBUS_BASE + 0x12000))
+#define XBUS_LED_AMBER          (1 << 0)
+#define XBUS_LED_GREEN          (1 << 1)
+#define XBUS_LED_RED            (1 << 2)
+#define XBUS_LED_TOGGLE         (1 << 8)
+
+#define XBUS_SWITCH             ((volatile unsigned char *)(XBUS_BASE + 0x12000))
+#define XBUS_SWITCH_SWITCH      ((*XBUS_SWITCH) & 15)
+#define XBUS_SWITCH_J17_13      ((*XBUS_SWITCH) & (1 << 4))
+#define XBUS_SWITCH_J17_11      ((*XBUS_SWITCH) & (1 << 5))
+#define XBUS_SWITCH_J17_9       ((*XBUS_SWITCH) & (1 << 6))
+
+#define UNCACHEABLE_ADDR        (ARMCSR_BASE + 0x108)
+
+
+/* PIC irq control */
+#define PIC_LO                  0x20
+#define PIC_MASK_LO             0x21
+#define PIC_HI                  0xA0
+#define PIC_MASK_HI             0xA1
+
+/* GPIO pins */
+#define GPIO_CCLK               0x800
+#define GPIO_DSCLK              0x400
+#define GPIO_E2CLK              0x200
+#define GPIO_IOLOAD             0x100
+#define GPIO_RED_LED            0x080
+#define GPIO_WDTIMER            0x040
+#define GPIO_DATA               0x020
+#define GPIO_IOCLK              0x010
+#define GPIO_DONE               0x008
+#define GPIO_FAN                0x004
+#define GPIO_GREEN_LED          0x002
+#define GPIO_RESET              0x001
+
+/* CPLD pins */
+#define CPLD_DS_ENABLE          8
+#define CPLD_7111_DISABLE       4
+#define CPLD_UNMUTE             2
+#define CPLD_FLASH_WR_ENABLE    1
+
+#ifndef __ASSEMBLY__
+extern void gpio_modify_op(int mask, int set);
+extern void gpio_modify_io(int mask, int in);
+extern int  gpio_read(void);
+extern void cpld_modify(int mask, int set);
+#endif
+
+#define pcibios_assign_all_busses()     1
+
+#define PCIBIOS_MIN_IO          0x1000
+#define PCIBIOS_MIN_MEM         0x81000000
+
+#endif
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
new file mode 100644
index 000000000000..a7b066239996
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -0,0 +1,39 @@
+/*
+ *  arch/arm/mach-footbridge/include/mach/io.h
+ *
+ *  Copyright (C) 1997-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Modifications:
+ *   06-12-1997 RMK     Created.
+ *   07-04-1999 RMK     Major cleanup
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#include <mach/hardware.h>
+
+#define IO_SPACE_LIMIT 0xffff
+
+/*
+ * Translation of various region addresses to virtual addresses
+ */
+#define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
+#if 1
+#define __mem_pci(a)            (a)
+#else
+
+static inline void __iomem *___mem_pci(void __iomem *p)
+{
+        unsigned long a = (unsigned long)p;
+        BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
+        return p;
+}
+
+#define __mem_pci(a)            ___mem_pci(a)
+#endif
+
+#endif
diff --git a/arch/arm/mach-footbridge/include/mach/irqs.h b/arch/arm/mach-footbridge/include/mach/irqs.h
new file mode 100644
index 000000000000..400551e43e4e
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/irqs.h
@@ -0,0 +1,98 @@
+/*
+ * arch/arm/mach-footbridge/include/mach/irqs.h
+ *
+ * Copyright (C) 1998 Russell King
+ * Copyright (C) 1998 Phil Blundell
+ *
+ * Changelog:
+ *  20-Jan-1998 RMK     Started merge of EBSA286, CATS and NetWinder
+ *  01-Feb-1999 PJB     ISA IRQs start at 0 not 16
+ */
+#include <asm/mach-types.h>
+
+#define NR_IRQS                 36
+#define NR_DC21285_IRQS         16
+
+#define _ISA_IRQ(x)             (0 + (x))
+#define _ISA_INR(x)             ((x) - 0)
+#define _DC21285_IRQ(x)         (16 + (x))
+#define _DC21285_INR(x)         ((x) - 16)
+
+/*
+ * This is a list of all interrupts that the 21285
+ * can generate and we handle.
+ */
+#define IRQ_CONRX               _DC21285_IRQ(0)
+#define IRQ_CONTX               _DC21285_IRQ(1)
+#define IRQ_TIMER1              _DC21285_IRQ(2)
+#define IRQ_TIMER2              _DC21285_IRQ(3)
+#define IRQ_TIMER3              _DC21285_IRQ(4)
+#define IRQ_IN0                 _DC21285_IRQ(5)
+#define IRQ_IN1                 _DC21285_IRQ(6)
+#define IRQ_IN2                 _DC21285_IRQ(7)
+#define IRQ_IN3                 _DC21285_IRQ(8)
+#define IRQ_DOORBELLHOST        _DC21285_IRQ(9)
+#define IRQ_DMA1                _DC21285_IRQ(10)
+#define IRQ_DMA2                _DC21285_IRQ(11)
+#define IRQ_PCI                 _DC21285_IRQ(12)
+#define IRQ_SDRAMPARITY         _DC21285_IRQ(13)
+#define IRQ_I2OINPOST           _DC21285_IRQ(14)
+#define IRQ_PCI_ABORT           _DC21285_IRQ(15)
+#define IRQ_PCI_SERR            _DC21285_IRQ(16)
+#define IRQ_DISCARD_TIMER       _DC21285_IRQ(17)
+#define IRQ_PCI_DPERR           _DC21285_IRQ(18)
+#define IRQ_PCI_PERR            _DC21285_IRQ(19)
+
+#define IRQ_ISA_TIMER           _ISA_IRQ(0)
+#define IRQ_ISA_KEYBOARD        _ISA_IRQ(1)
+#define IRQ_ISA_CASCADE         _ISA_IRQ(2)
+#define IRQ_ISA_UART2           _ISA_IRQ(3)
+#define IRQ_ISA_UART            _ISA_IRQ(4)
+#define IRQ_ISA_FLOPPY          _ISA_IRQ(6)
+#define IRQ_ISA_PRINTER         _ISA_IRQ(7)
+#define IRQ_ISA_RTC_ALARM       _ISA_IRQ(8)
+#define IRQ_ISA_2               _ISA_IRQ(9)
+#define IRQ_ISA_PS2MOUSE        _ISA_IRQ(12)
+#define IRQ_ISA_HARDDISK1       _ISA_IRQ(14)
+#define IRQ_ISA_HARDDISK2       _ISA_IRQ(15)
+
+#define IRQ_MASK_UART_RX        (1 << 2)
+#define IRQ_MASK_UART_TX        (1 << 3)
+#define IRQ_MASK_TIMER1         (1 << 4)
+#define IRQ_MASK_TIMER2         (1 << 5)
+#define IRQ_MASK_TIMER3         (1 << 6)
+#define IRQ_MASK_IN0            (1 << 8)
+#define IRQ_MASK_IN1            (1 << 9)
+#define IRQ_MASK_IN2            (1 << 10)
+#define IRQ_MASK_IN3            (1 << 11)
+#define IRQ_MASK_DOORBELLHOST   (1 << 15)
+#define IRQ_MASK_DMA1           (1 << 16)
+#define IRQ_MASK_DMA2           (1 << 17)
+#define IRQ_MASK_PCI            (1 << 18)
+#define IRQ_MASK_SDRAMPARITY    (1 << 24)
+#define IRQ_MASK_I2OINPOST      (1 << 25)
+#define IRQ_MASK_PCI_ABORT      ((1 << 29) | (1 << 30))
+#define IRQ_MASK_PCI_SERR       (1 << 23)
+#define IRQ_MASK_DISCARD_TIMER  (1 << 27)
+#define IRQ_MASK_PCI_DPERR      (1 << 28)
+#define IRQ_MASK_PCI_PERR       (1 << 31)
+
+/*
+ * Netwinder interrupt allocations
+ */
+#define IRQ_NETWINDER_ETHER10   IRQ_IN0
+#define IRQ_NETWINDER_ETHER100  IRQ_IN1
+#define IRQ_NETWINDER_VIDCOMP   IRQ_IN2
+#define IRQ_NETWINDER_PS2MOUSE  _ISA_IRQ(5)
+#define IRQ_NETWINDER_IR        _ISA_IRQ(6)
+#define IRQ_NETWINDER_BUTTON    _ISA_IRQ(10)
+#define IRQ_NETWINDER_VGA       _ISA_IRQ(11)
+#define IRQ_NETWINDER_SOUND     _ISA_IRQ(12)
+
+#undef RTC_IRQ
+#define RTC_IRQ         IRQ_ISA_RTC_ALARM
+#define I8042_KBD_IRQ   IRQ_ISA_KEYBOARD
+#define I8042_AUX_IRQ   (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE)
+#define IRQ_FLOPPYDISK  IRQ_ISA_FLOPPY
+
+#define irq_canonicalize(_i)    (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i)
diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h
new file mode 100644
index 000000000000..e9cae99dd1f9
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/memory.h
@@ -0,0 +1,67 @@
+/*
+ *  arch/arm/mach-footbridge/include/mach/memory.h
+ *
+ *  Copyright (C) 1996-1999 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Changelog:
+ *   20-Oct-1996 RMK    Created
+ *   31-Dec-1997 RMK    Fixed definitions to reduce warnings.
+ *   17-May-1998 DAG    Added __virt_to_bus and __bus_to_virt functions.
+ *   21-Nov-1998 RMK    Changed __virt_to_bus and __bus_to_virt to macros.
+ *   21-Mar-1999 RMK    Added PAGE_OFFSET for co285 architecture.
+ *                      Renamed to memory.h
+ *                      Moved PAGE_OFFSET and TASK_SIZE here
+ */
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+
+#if defined(CONFIG_FOOTBRIDGE_ADDIN)
+/*
+ * If we may be using add-in footbridge mode, then we must
+ * use the out-of-line translation that makes use of the
+ * PCI BAR
+ */
+#ifndef __ASSEMBLY__
+extern unsigned long __virt_to_bus(unsigned long);
+extern unsigned long __bus_to_virt(unsigned long);
+#endif
+
+#elif defined(CONFIG_FOOTBRIDGE_HOST)
+
+#define __virt_to_bus(x)        ((x) - 0xe0000000)
+#define __bus_to_virt(x)        ((x) + 0xe0000000)
+
+#else
+
+#error "Undefined footbridge mode"
+
+#endif
+
+/* Task size and page offset at 3GB */
+#define TASK_SIZE               UL(0xbf000000)
+#define PAGE_OFFSET             UL(0xc0000000)
+
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE              0xf9000000
+
+/*
+ * Physical DRAM offset.
+ */
+#define PHYS_OFFSET             UL(0x00000000)
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
+
+#define FLUSH_BASE_PHYS         0x50000000
+
+#endif
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
new file mode 100644
index 000000000000..01c9f407f498
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/system.h
@@ -0,0 +1,69 @@
+/*
+ *  arch/arm/mach-footbridge/include/mach/system.h
+ *
+ *  Copyright (C) 1996-1999 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/hardware/dec21285.h>
+#include <asm/io.h>
+#include <mach/hardware.h>
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+
+static inline void arch_idle(void)
+{
+        cpu_do_idle();
+}
+
+static inline void arch_reset(char mode)
+{
+        if (mode == 's') {
+                /*
+                 * Jump into the ROM
+                 */
+                cpu_reset(0x41000000);
+        } else {
+                if (machine_is_netwinder()) {
+                        /* open up the SuperIO chip
+                         */
+                        outb(0x87, 0x370);
+                        outb(0x87, 0x370);
+
+                        /* aux function group 1 (logical device 7)
+                         */
+                        outb(0x07, 0x370);
+                        outb(0x07, 0x371);
+
+                        /* set GP16 for WD-TIMER output
+                         */
+                        outb(0xe6, 0x370);
+                        outb(0x00, 0x371);
+
+                        /* set a RED LED and toggle WD_TIMER for rebooting
+                         */
+                        outb(0xc4, 0x338);
+                } else {
+                        /* 
+                         * Force the watchdog to do a CPU reset.
+                         *
+                         * After making sure that the watchdog is disabled
+                         * (so we can change the timer registers) we first
+                         * enable the timer to autoreload itself.  Next, the
+                         * timer interval is set really short and any
+                         * current interrupt request is cleared (so we can
+                         * see an edge transition).  Finally, TIMER4 is
+                         * enabled as the watchdog.
+                         */
+                        *CSR_SA110_CNTL &= ~(1 << 13);
+                        *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
+                                           TIMER_CNTL_AUTORELOAD |
+                                           TIMER_CNTL_DIV16;
+                        *CSR_TIMER4_LOAD = 0x2;
+                        *CSR_TIMER4_CLR  = 0;
+                        *CSR_SA110_CNTL |= (1 << 13);
+                }
+        }
+}
diff --git a/arch/arm/mach-footbridge/include/mach/timex.h b/arch/arm/mach-footbridge/include/mach/timex.h
new file mode 100644
index 000000000000..d0fea9d6d4ab
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/timex.h
@@ -0,0 +1,18 @@
+/*
+ *  arch/arm/mach-footbridge/include/mach/timex.h
+ *
+ *  Copyright (C) 1998 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  EBSA285 architecture timex specifications
+ */
+
+/*
+ * We assume a constant here; this satisfies the maths in linux/timex.h
+ * and linux/time.h.  CLOCK_TICK_RATE is actually system dependent, but
+ * this must be a constant.
+ */
+#define CLOCK_TICK_RATE         (50000000/16)
diff --git a/arch/arm/mach-footbridge/include/mach/uncompress.h b/arch/arm/mach-footbridge/include/mach/uncompress.h
new file mode 100644
index 000000000000..5dfa44287346
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/uncompress.h
@@ -0,0 +1,38 @@
+/*
+ *  arch/arm/mach-footbridge/include/mach/uncompress.h
+ *
+ *  Copyright (C) 1996-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/mach-types.h>
+
+/*
+ * Note! This could cause problems on the NetWinder
+ */
+#define DC21285_BASE ((volatile unsigned int *)0x42000160)
+#define SER0_BASE    ((volatile unsigned char *)0x7c0003f8)
+
+static inline void putc(char c)
+{
+        if (machine_is_netwinder()) {
+                while ((SER0_BASE[5] & 0x60) != 0x60)
+                        barrier();
+                SER0_BASE[0] = c;
+        } else {
+                while (DC21285_BASE[6] & 8);
+                DC21285_BASE[0] = c;
+        }
+}
+
+static inline void flush(void)
+{
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
diff --git a/arch/arm/mach-footbridge/include/mach/vmalloc.h b/arch/arm/mach-footbridge/include/mach/vmalloc.h
new file mode 100644
index 000000000000..d0958d860a3c
--- /dev/null
+++ b/arch/arm/mach-footbridge/include/mach/vmalloc.h
@@ -0,0 +1,10 @@
+/*
+ *  arch/arm/mach-footbridge/include/mach/vmalloc.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+#define VMALLOC_END       (PAGE_OFFSET + 0x30000000)