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-rw-r--r--arch/arm/mach-exynos/headsmp.S2
-rw-r--r--arch/arm/mach-exynos/platsmp.c4
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index 5364d4bfa8bc..cdd9d91e9933 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -13,8 +13,6 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <linux/init.h> 14#include <linux/init.h>
15 15
16 __CPUINIT
17
18/* 16/*
19 * exynos4 specific entry point for secondary CPUs. This provides 17 * exynos4 specific entry point for secondary CPUs. This provides
20 * a "holding pen" into which all secondary cores are held until we're 18 * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index deba1308ff16..58b43e6f9262 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -75,7 +75,7 @@ static void __iomem *scu_base_addr(void)
75 75
76static DEFINE_SPINLOCK(boot_lock); 76static DEFINE_SPINLOCK(boot_lock);
77 77
78static void __cpuinit exynos_secondary_init(unsigned int cpu) 78static void exynos_secondary_init(unsigned int cpu)
79{ 79{
80 /* 80 /*
81 * let the primary processor know we're out of the 81 * let the primary processor know we're out of the
@@ -90,7 +90,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
90 spin_unlock(&boot_lock); 90 spin_unlock(&boot_lock);
91} 91}
92 92
93static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) 93static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
94{ 94{
95 unsigned long timeout; 95 unsigned long timeout;
96 unsigned long phys_cpu = cpu_logical_map(cpu); 96 unsigned long phys_cpu = cpu_logical_map(cpu);