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-rw-r--r--arch/arm/mach-exynos/Kconfig17
-rw-r--r--arch/arm/mach-exynos/Makefile4
-rw-r--r--arch/arm/mach-exynos/clock-exynos4.c9
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c39
-rw-r--r--arch/arm/mach-exynos/common.c144
-rw-r--r--arch/arm/mach-exynos/cpuidle.c3
-rw-r--r--arch/arm/mach-exynos/dev-audio.c2
-rw-r--r--arch/arm/mach-exynos/dev-drm.c29
-rw-r--r--arch/arm/mach-exynos/dev-dwmci.c75
-rw-r--r--arch/arm/mach-exynos/dev-ohci.c2
-rw-r--r--arch/arm/mach-exynos/dev-uart.c24
-rw-r--r--arch/arm/mach-exynos/dma.c3
-rw-r--r--arch/arm/mach-exynos/hotplug.c45
-rw-r--r--arch/arm/mach-exynos/include/mach/dwmci.h20
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h13
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h9
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-mem.h23
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-pmu.h3
-rw-r--r--arch/arm/mach-exynos/mach-exynos4-dt.c5
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c76
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c10
-rw-r--r--arch/arm/mach-exynos/mach-origen.c11
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c5
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c9
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c8
-rw-r--r--arch/arm/mach-exynos/mct.c11
-rw-r--r--arch/arm/mach-exynos/platsmp.c30
-rw-r--r--arch/arm/mach-exynos/pm.c7
-rw-r--r--arch/arm/mach-exynos/pm_domains.c93
-rw-r--r--arch/arm/mach-exynos/setup-i2c0.c2
30 files changed, 412 insertions, 319 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index da55107033dd..91d5b6f1d5af 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -63,10 +63,20 @@ config SOC_EXYNOS5250
63 depends on ARCH_EXYNOS5 63 depends on ARCH_EXYNOS5
64 select S5P_PM if PM 64 select S5P_PM if PM
65 select S5P_SLEEP if PM 65 select S5P_SLEEP if PM
66 select S5P_DEV_MFC
66 select SAMSUNG_DMADEV 67 select SAMSUNG_DMADEV
67 help 68 help
68 Enable EXYNOS5250 SoC support 69 Enable EXYNOS5250 SoC support
69 70
71config SOC_EXYNOS5440
72 bool "SAMSUNG EXYNOS5440"
73 default y
74 depends on ARCH_EXYNOS5
75 select ARM_ARCH_TIMER
76 select AUTO_ZRELADDR
77 help
78 Enable EXYNOS5440 SoC support
79
70config EXYNOS4_MCT 80config EXYNOS4_MCT
71 bool 81 bool
72 default y 82 default y
@@ -98,11 +108,6 @@ config EXYNOS_DEV_SYSMMU
98 help 108 help
99 Common setup code for SYSTEM MMU in EXYNOS platforms 109 Common setup code for SYSTEM MMU in EXYNOS platforms
100 110
101config EXYNOS4_DEV_DWMCI
102 bool
103 help
104 Compile in platform device definitions for DWMCI
105
106config EXYNOS4_DEV_USB_OHCI 111config EXYNOS4_DEV_USB_OHCI
107 bool 112 bool
108 help 113 help
@@ -417,9 +422,9 @@ config MACH_EXYNOS4_DT
417 422
418config MACH_EXYNOS5_DT 423config MACH_EXYNOS5_DT
419 bool "SAMSUNG EXYNOS5 Machine using device tree" 424 bool "SAMSUNG EXYNOS5 Machine using device tree"
425 default y
420 depends on ARCH_EXYNOS5 426 depends on ARCH_EXYNOS5
421 select ARM_AMBA 427 select ARM_AMBA
422 select SOC_EXYNOS5250
423 select USE_OF 428 select USE_OF
424 help 429 help
425 Machine support for Samsung EXYNOS5 machine with device tree enabled. 430 Machine support for Samsung EXYNOS5 machine with device tree enabled.
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 9b58024f7d43..b189881657ec 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -14,9 +14,9 @@ obj- :=
14 14
15obj-$(CONFIG_ARCH_EXYNOS) += common.o 15obj-$(CONFIG_ARCH_EXYNOS) += common.o
16obj-$(CONFIG_ARCH_EXYNOS4) += clock-exynos4.o 16obj-$(CONFIG_ARCH_EXYNOS4) += clock-exynos4.o
17obj-$(CONFIG_ARCH_EXYNOS5) += clock-exynos5.o
18obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o 17obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
19obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o 18obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
19obj-$(CONFIG_SOC_EXYNOS5250) += clock-exynos5.o
20 20
21obj-$(CONFIG_PM) += pm.o 21obj-$(CONFIG_PM) += pm.o
22obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o 22obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
@@ -50,10 +50,8 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o
50obj-y += dev-uart.o 50obj-y += dev-uart.o
51obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o 51obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
52obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o 52obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
53obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
54obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o 53obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
55obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o 54obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
56obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o
57obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o 55obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
58 56
59obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o 57obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 6a45c9a9abe9..efead60b9436 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -576,6 +576,10 @@ static struct clk exynos4_init_clocks_off[] = {
576 .enable = exynos4_clk_ip_peril_ctrl, 576 .enable = exynos4_clk_ip_peril_ctrl,
577 .ctrlbit = (1 << 15), 577 .ctrlbit = (1 << 15),
578 }, { 578 }, {
579 .name = "tmu_apbif",
580 .enable = exynos4_clk_ip_perir_ctrl,
581 .ctrlbit = (1 << 17),
582 }, {
579 .name = "keypad", 583 .name = "keypad",
580 .enable = exynos4_clk_ip_perir_ctrl, 584 .enable = exynos4_clk_ip_perir_ctrl,
581 .ctrlbit = (1 << 16), 585 .ctrlbit = (1 << 16),
@@ -613,11 +617,6 @@ static struct clk exynos4_init_clocks_off[] = {
613 .ctrlbit = (1 << 18), 617 .ctrlbit = (1 << 18),
614 }, { 618 }, {
615 .name = "iis", 619 .name = "iis",
616 .devname = "samsung-i2s.0",
617 .enable = exynos4_clk_ip_peril_ctrl,
618 .ctrlbit = (1 << 19),
619 }, {
620 .name = "iis",
621 .devname = "samsung-i2s.1", 620 .devname = "samsung-i2s.1",
622 .enable = exynos4_clk_ip_peril_ctrl, 621 .enable = exynos4_clk_ip_peril_ctrl,
623 .ctrlbit = (1 << 20), 622 .ctrlbit = (1 << 20),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index c44ca1ee1b8d..7652f5d78a56 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -196,6 +196,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable)
196 return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable); 196 return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable);
197} 197}
198 198
199static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable)
200{
201 return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
202}
203
199/* Core list of CMU_CPU side */ 204/* Core list of CMU_CPU side */
200 205
201static struct clksrc_clk exynos5_clk_mout_apll = { 206static struct clksrc_clk exynos5_clk_mout_apll = {
@@ -292,7 +297,7 @@ static struct clksrc_sources exynos5_clk_src_mpll = {
292 .nr_sources = ARRAY_SIZE(exynos5_clk_src_mpll_list), 297 .nr_sources = ARRAY_SIZE(exynos5_clk_src_mpll_list),
293}; 298};
294 299
295struct clksrc_clk exynos5_clk_mout_mpll = { 300static struct clksrc_clk exynos5_clk_mout_mpll = {
296 .clk = { 301 .clk = {
297 .name = "mout_mpll", 302 .name = "mout_mpll",
298 }, 303 },
@@ -467,12 +472,12 @@ static struct clksrc_clk exynos5_clk_pclk_acp = {
467 472
468/* Core list of CMU_TOP side */ 473/* Core list of CMU_TOP side */
469 474
470struct clk *exynos5_clkset_aclk_top_list[] = { 475static struct clk *exynos5_clkset_aclk_top_list[] = {
471 [0] = &exynos5_clk_mout_mpll_user.clk, 476 [0] = &exynos5_clk_mout_mpll_user.clk,
472 [1] = &exynos5_clk_mout_bpll_user.clk, 477 [1] = &exynos5_clk_mout_bpll_user.clk,
473}; 478};
474 479
475struct clksrc_sources exynos5_clkset_aclk = { 480static struct clksrc_sources exynos5_clkset_aclk = {
476 .sources = exynos5_clkset_aclk_top_list, 481 .sources = exynos5_clkset_aclk_top_list,
477 .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_top_list), 482 .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_top_list),
478}; 483};
@@ -486,12 +491,12 @@ static struct clksrc_clk exynos5_clk_aclk_400 = {
486 .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 }, 491 .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
487}; 492};
488 493
489struct clk *exynos5_clkset_aclk_333_166_list[] = { 494static struct clk *exynos5_clkset_aclk_333_166_list[] = {
490 [0] = &exynos5_clk_mout_cpll.clk, 495 [0] = &exynos5_clk_mout_cpll.clk,
491 [1] = &exynos5_clk_mout_mpll_user.clk, 496 [1] = &exynos5_clk_mout_mpll_user.clk,
492}; 497};
493 498
494struct clksrc_sources exynos5_clkset_aclk_333_166 = { 499static struct clksrc_sources exynos5_clkset_aclk_333_166 = {
495 .sources = exynos5_clkset_aclk_333_166_list, 500 .sources = exynos5_clkset_aclk_333_166_list,
496 .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list), 501 .nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list),
497}; 502};
@@ -616,6 +621,11 @@ static struct clk exynos5_init_clocks_off[] = {
616 .enable = exynos5_clk_ip_peric_ctrl, 621 .enable = exynos5_clk_ip_peric_ctrl,
617 .ctrlbit = (1 << 24), 622 .ctrlbit = (1 << 24),
618 }, { 623 }, {
624 .name = "tmu_apbif",
625 .parent = &exynos5_clk_aclk_66.clk,
626 .enable = exynos5_clk_ip_peris_ctrl,
627 .ctrlbit = (1 << 21),
628 }, {
619 .name = "rtc", 629 .name = "rtc",
620 .parent = &exynos5_clk_aclk_66.clk, 630 .parent = &exynos5_clk_aclk_66.clk,
621 .enable = exynos5_clk_ip_peris_ctrl, 631 .enable = exynos5_clk_ip_peris_ctrl,
@@ -664,17 +674,22 @@ static struct clk exynos5_init_clocks_off[] = {
664 .ctrlbit = (1 << 25), 674 .ctrlbit = (1 << 25),
665 }, { 675 }, {
666 .name = "mfc", 676 .name = "mfc",
667 .devname = "s5p-mfc", 677 .devname = "s5p-mfc-v6",
668 .enable = exynos5_clk_ip_mfc_ctrl, 678 .enable = exynos5_clk_ip_mfc_ctrl,
669 .ctrlbit = (1 << 0), 679 .ctrlbit = (1 << 0),
670 }, { 680 }, {
671 .name = "hdmi", 681 .name = "hdmi",
672 .devname = "exynos4-hdmi", 682 .devname = "exynos5-hdmi",
673 .enable = exynos5_clk_ip_disp1_ctrl, 683 .enable = exynos5_clk_ip_disp1_ctrl,
674 .ctrlbit = (1 << 6), 684 .ctrlbit = (1 << 6),
675 }, { 685 }, {
686 .name = "hdmiphy",
687 .devname = "exynos5-hdmi",
688 .enable = exynos5_clk_hdmiphy_ctrl,
689 .ctrlbit = (1 << 0),
690 }, {
676 .name = "mixer", 691 .name = "mixer",
677 .devname = "s5p-mixer", 692 .devname = "exynos5-mixer",
678 .enable = exynos5_clk_ip_disp1_ctrl, 693 .enable = exynos5_clk_ip_disp1_ctrl,
679 .ctrlbit = (1 << 5), 694 .ctrlbit = (1 << 5),
680 }, { 695 }, {
@@ -966,7 +981,7 @@ static struct clk exynos5_clk_fimd1 = {
966 .ctrlbit = (1 << 0), 981 .ctrlbit = (1 << 0),
967}; 982};
968 983
969struct clk *exynos5_clkset_group_list[] = { 984static struct clk *exynos5_clkset_group_list[] = {
970 [0] = &clk_ext_xtal_mux, 985 [0] = &clk_ext_xtal_mux,
971 [1] = NULL, 986 [1] = NULL,
972 [2] = &exynos5_clk_sclk_hdmi24m, 987 [2] = &exynos5_clk_sclk_hdmi24m,
@@ -979,7 +994,7 @@ struct clk *exynos5_clkset_group_list[] = {
979 [9] = &exynos5_clk_mout_cpll.clk, 994 [9] = &exynos5_clk_mout_cpll.clk,
980}; 995};
981 996
982struct clksrc_sources exynos5_clkset_group = { 997static struct clksrc_sources exynos5_clkset_group = {
983 .sources = exynos5_clkset_group_list, 998 .sources = exynos5_clkset_group_list,
984 .nr_sources = ARRAY_SIZE(exynos5_clkset_group_list), 999 .nr_sources = ARRAY_SIZE(exynos5_clkset_group_list),
985}; 1000};
@@ -1195,7 +1210,7 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
1195 .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 }, 1210 .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
1196}; 1211};
1197 1212
1198struct clksrc_clk exynos5_clk_sclk_fimd1 = { 1213static struct clksrc_clk exynos5_clk_sclk_fimd1 = {
1199 .clk = { 1214 .clk = {
1200 .name = "sclk_fimd", 1215 .name = "sclk_fimd",
1201 .devname = "exynos5-fb.1", 1216 .devname = "exynos5-fb.1",
@@ -1476,7 +1491,7 @@ static void exynos5_clock_resume(void)
1476#define exynos5_clock_resume NULL 1491#define exynos5_clock_resume NULL
1477#endif 1492#endif
1478 1493
1479struct syscore_ops exynos5_clock_syscore_ops = { 1494static struct syscore_ops exynos5_clock_syscore_ops = {
1480 .suspend = exynos5_clock_suspend, 1495 .suspend = exynos5_clock_suspend,
1481 .resume = exynos5_clock_resume, 1496 .resume = exynos5_clock_resume,
1482}; 1497};
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 1947be8e5f5b..ddd4b72c6f9a 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -18,6 +18,7 @@
18#include <linux/sched.h> 18#include <linux/sched.h>
19#include <linux/serial_core.h> 19#include <linux/serial_core.h>
20#include <linux/of.h> 20#include <linux/of.h>
21#include <linux/of_fdt.h>
21#include <linux/of_irq.h> 22#include <linux/of_irq.h>
22#include <linux/export.h> 23#include <linux/export.h>
23#include <linux/irqdomain.h> 24#include <linux/irqdomain.h>
@@ -58,12 +59,14 @@ static const char name_exynos4210[] = "EXYNOS4210";
58static const char name_exynos4212[] = "EXYNOS4212"; 59static const char name_exynos4212[] = "EXYNOS4212";
59static const char name_exynos4412[] = "EXYNOS4412"; 60static const char name_exynos4412[] = "EXYNOS4412";
60static const char name_exynos5250[] = "EXYNOS5250"; 61static const char name_exynos5250[] = "EXYNOS5250";
62static const char name_exynos5440[] = "EXYNOS5440";
61 63
62static void exynos4_map_io(void); 64static void exynos4_map_io(void);
63static void exynos5_map_io(void); 65static void exynos5_map_io(void);
66static void exynos5440_map_io(void);
64static void exynos4_init_clocks(int xtal); 67static void exynos4_init_clocks(int xtal);
65static void exynos5_init_clocks(int xtal); 68static void exynos5_init_clocks(int xtal);
66static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no); 69static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
67static int exynos_init(void); 70static int exynos_init(void);
68 71
69static struct cpu_table cpu_ids[] __initdata = { 72static struct cpu_table cpu_ids[] __initdata = {
@@ -72,7 +75,7 @@ static struct cpu_table cpu_ids[] __initdata = {
72 .idmask = EXYNOS4_CPU_MASK, 75 .idmask = EXYNOS4_CPU_MASK,
73 .map_io = exynos4_map_io, 76 .map_io = exynos4_map_io,
74 .init_clocks = exynos4_init_clocks, 77 .init_clocks = exynos4_init_clocks,
75 .init_uarts = exynos_init_uarts, 78 .init_uarts = exynos4_init_uarts,
76 .init = exynos_init, 79 .init = exynos_init,
77 .name = name_exynos4210, 80 .name = name_exynos4210,
78 }, { 81 }, {
@@ -80,7 +83,7 @@ static struct cpu_table cpu_ids[] __initdata = {
80 .idmask = EXYNOS4_CPU_MASK, 83 .idmask = EXYNOS4_CPU_MASK,
81 .map_io = exynos4_map_io, 84 .map_io = exynos4_map_io,
82 .init_clocks = exynos4_init_clocks, 85 .init_clocks = exynos4_init_clocks,
83 .init_uarts = exynos_init_uarts, 86 .init_uarts = exynos4_init_uarts,
84 .init = exynos_init, 87 .init = exynos_init,
85 .name = name_exynos4212, 88 .name = name_exynos4212,
86 }, { 89 }, {
@@ -88,7 +91,7 @@ static struct cpu_table cpu_ids[] __initdata = {
88 .idmask = EXYNOS4_CPU_MASK, 91 .idmask = EXYNOS4_CPU_MASK,
89 .map_io = exynos4_map_io, 92 .map_io = exynos4_map_io,
90 .init_clocks = exynos4_init_clocks, 93 .init_clocks = exynos4_init_clocks,
91 .init_uarts = exynos_init_uarts, 94 .init_uarts = exynos4_init_uarts,
92 .init = exynos_init, 95 .init = exynos_init,
93 .name = name_exynos4412, 96 .name = name_exynos4412,
94 }, { 97 }, {
@@ -96,9 +99,14 @@ static struct cpu_table cpu_ids[] __initdata = {
96 .idmask = EXYNOS5_SOC_MASK, 99 .idmask = EXYNOS5_SOC_MASK,
97 .map_io = exynos5_map_io, 100 .map_io = exynos5_map_io,
98 .init_clocks = exynos5_init_clocks, 101 .init_clocks = exynos5_init_clocks,
99 .init_uarts = exynos_init_uarts,
100 .init = exynos_init, 102 .init = exynos_init,
101 .name = name_exynos5250, 103 .name = name_exynos5250,
104 }, {
105 .idcode = EXYNOS5440_SOC_ID,
106 .idmask = EXYNOS5_SOC_MASK,
107 .map_io = exynos5440_map_io,
108 .init = exynos_init,
109 .name = name_exynos5440,
102 }, 110 },
103}; 111};
104 112
@@ -113,6 +121,17 @@ static struct map_desc exynos_iodesc[] __initdata = {
113 }, 121 },
114}; 122};
115 123
124#ifdef CONFIG_ARCH_EXYNOS5
125static struct map_desc exynos5440_iodesc[] __initdata = {
126 {
127 .virtual = (unsigned long)S5P_VA_CHIPID,
128 .pfn = __phys_to_pfn(EXYNOS5440_PA_CHIPID),
129 .length = SZ_4K,
130 .type = MT_DEVICE,
131 },
132};
133#endif
134
116static struct map_desc exynos4_iodesc[] __initdata = { 135static struct map_desc exynos4_iodesc[] __initdata = {
117 { 136 {
118 .virtual = (unsigned long)S3C_VA_SYS, 137 .virtual = (unsigned long)S3C_VA_SYS,
@@ -257,24 +276,18 @@ static struct map_desc exynos5_iodesc[] __initdata = {
257 .length = SZ_64K, 276 .length = SZ_64K,
258 .type = MT_DEVICE, 277 .type = MT_DEVICE,
259 }, { 278 }, {
260 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
261 .pfn = __phys_to_pfn(EXYNOS5_PA_COMBINER),
262 .length = SZ_4K,
263 .type = MT_DEVICE,
264 }, {
265 .virtual = (unsigned long)S3C_VA_UART, 279 .virtual = (unsigned long)S3C_VA_UART,
266 .pfn = __phys_to_pfn(EXYNOS5_PA_UART), 280 .pfn = __phys_to_pfn(EXYNOS5_PA_UART),
267 .length = SZ_512K, 281 .length = SZ_512K,
268 .type = MT_DEVICE, 282 .type = MT_DEVICE,
269 }, { 283 },
270 .virtual = (unsigned long)S5P_VA_GIC_CPU, 284};
271 .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_CPU), 285
272 .length = SZ_8K, 286static struct map_desc exynos5440_iodesc0[] __initdata = {
273 .type = MT_DEVICE, 287 {
274 }, { 288 .virtual = (unsigned long)S3C_VA_UART,
275 .virtual = (unsigned long)S5P_VA_GIC_DIST, 289 .pfn = __phys_to_pfn(EXYNOS5440_PA_UART0),
276 .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_DIST), 290 .length = SZ_512K,
277 .length = SZ_4K,
278 .type = MT_DEVICE, 291 .type = MT_DEVICE,
279 }, 292 },
280}; 293};
@@ -286,11 +299,29 @@ void exynos4_restart(char mode, const char *cmd)
286 299
287void exynos5_restart(char mode, const char *cmd) 300void exynos5_restart(char mode, const char *cmd)
288{ 301{
289 __raw_writel(0x1, EXYNOS_SWRESET); 302 u32 val;
303 void __iomem *addr;
304
305 if (of_machine_is_compatible("samsung,exynos5250")) {
306 val = 0x1;
307 addr = EXYNOS_SWRESET;
308 } else if (of_machine_is_compatible("samsung,exynos5440")) {
309 val = (0x10 << 20) | (0x1 << 16);
310 addr = EXYNOS5440_SWRESET;
311 } else {
312 pr_err("%s: cannot support non-DT\n", __func__);
313 return;
314 }
315
316 __raw_writel(val, addr);
290} 317}
291 318
292void __init exynos_init_late(void) 319void __init exynos_init_late(void)
293{ 320{
321 if (of_machine_is_compatible("samsung,exynos5440"))
322 /* to be supported later */
323 return;
324
294 exynos_pm_late_initcall(); 325 exynos_pm_late_initcall();
295} 326}
296 327
@@ -302,8 +333,20 @@ void __init exynos_init_late(void)
302 333
303void __init exynos_init_io(struct map_desc *mach_desc, int size) 334void __init exynos_init_io(struct map_desc *mach_desc, int size)
304{ 335{
336 struct map_desc *iodesc = exynos_iodesc;
337 int iodesc_sz = ARRAY_SIZE(exynos_iodesc);
338#if defined(CONFIG_OF) && defined(CONFIG_ARCH_EXYNOS5)
339 unsigned long root = of_get_flat_dt_root();
340
305 /* initialize the io descriptors we need for initialization */ 341 /* initialize the io descriptors we need for initialization */
306 iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); 342 if (of_flat_dt_is_compatible(root, "samsung,exynos5440")) {
343 iodesc = exynos5440_iodesc;
344 iodesc_sz = ARRAY_SIZE(exynos5440_iodesc);
345 }
346#endif
347
348 iotable_init(iodesc, iodesc_sz);
349
307 if (mach_desc) 350 if (mach_desc)
308 iotable_init(mach_desc, size); 351 iotable_init(mach_desc, size);
309 352
@@ -354,23 +397,6 @@ static void __init exynos4_map_io(void)
354static void __init exynos5_map_io(void) 397static void __init exynos5_map_io(void)
355{ 398{
356 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); 399 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
357
358 s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);
359 s3c_device_i2c0.resource[0].end = EXYNOS5_PA_IIC(0) + SZ_4K - 1;
360 s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
361 s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC;
362
363 s3c_sdhci_setname(0, "exynos4-sdhci");
364 s3c_sdhci_setname(1, "exynos4-sdhci");
365 s3c_sdhci_setname(2, "exynos4-sdhci");
366 s3c_sdhci_setname(3, "exynos4-sdhci");
367
368 /* The I2C bus controllers are directly compatible with s3c2440 */
369 s3c_i2c0_setname("s3c2440-i2c");
370 s3c_i2c1_setname("s3c2440-i2c");
371 s3c_i2c2_setname("s3c2440-i2c");
372
373 s3c64xx_spi_setname("exynos4210-spi");
374} 400}
375 401
376static void __init exynos4_init_clocks(int xtal) 402static void __init exynos4_init_clocks(int xtal)
@@ -389,6 +415,11 @@ static void __init exynos4_init_clocks(int xtal)
389 exynos4_setup_clocks(); 415 exynos4_setup_clocks();
390} 416}
391 417
418static void __init exynos5440_map_io(void)
419{
420 iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
421}
422
392static void __init exynos5_init_clocks(int xtal) 423static void __init exynos5_init_clocks(int xtal)
393{ 424{
394 printk(KERN_DEBUG "%s: initializing clocks\n", __func__); 425 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
@@ -589,7 +620,8 @@ static void __init combiner_init(void __iomem *combiner_base,
589} 620}
590 621
591#ifdef CONFIG_OF 622#ifdef CONFIG_OF
592int __init combiner_of_init(struct device_node *np, struct device_node *parent) 623static int __init combiner_of_init(struct device_node *np,
624 struct device_node *parent)
593{ 625{
594 void __iomem *combiner_base; 626 void __iomem *combiner_base;
595 627
@@ -604,8 +636,9 @@ int __init combiner_of_init(struct device_node *np, struct device_node *parent)
604 return 0; 636 return 0;
605} 637}
606 638
607static const struct of_device_id exynos4_dt_irq_match[] = { 639static const struct of_device_id exynos_dt_irq_match[] = {
608 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 640 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
641 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
609 { .compatible = "samsung,exynos4210-combiner", 642 { .compatible = "samsung,exynos4210-combiner",
610 .data = combiner_of_init, }, 643 .data = combiner_of_init, },
611 {}, 644 {},
@@ -622,7 +655,7 @@ void __init exynos4_init_irq(void)
622 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); 655 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
623#ifdef CONFIG_OF 656#ifdef CONFIG_OF
624 else 657 else
625 of_irq_init(exynos4_dt_irq_match); 658 of_irq_init(exynos_dt_irq_match);
626#endif 659#endif
627 660
628 if (!of_have_populated_dt()) 661 if (!of_have_populated_dt())
@@ -639,7 +672,7 @@ void __init exynos4_init_irq(void)
639void __init exynos5_init_irq(void) 672void __init exynos5_init_irq(void)
640{ 673{
641#ifdef CONFIG_OF 674#ifdef CONFIG_OF
642 of_irq_init(exynos4_dt_irq_match); 675 of_irq_init(exynos_dt_irq_match);
643#endif 676#endif
644 /* 677 /*
645 * The parameters of s5p_init_irq() are for VIC init. 678 * The parameters of s5p_init_irq() are for VIC init.
@@ -647,6 +680,8 @@ void __init exynos5_init_irq(void)
647 * uses GIC instead of VIC. 680 * uses GIC instead of VIC.
648 */ 681 */
649 s5p_init_irq(NULL, 0); 682 s5p_init_irq(NULL, 0);
683
684 gic_arch_extn.irq_set_wake = s3c_irq_wake;
650} 685}
651 686
652struct bus_type exynos_subsys = { 687struct bus_type exynos_subsys = {
@@ -669,7 +704,7 @@ static int __init exynos4_l2x0_cache_init(void)
669{ 704{
670 int ret; 705 int ret;
671 706
672 if (soc_is_exynos5250()) 707 if (soc_is_exynos5250() || soc_is_exynos5440())
673 return 0; 708 return 0;
674 709
675 ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); 710 ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
@@ -727,7 +762,7 @@ static int __init exynos_init(void)
727 762
728/* uart registration process */ 763/* uart registration process */
729 764
730static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) 765static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
731{ 766{
732 struct s3c2410_uartcfg *tcfg = cfg; 767 struct s3c2410_uartcfg *tcfg = cfg;
733 u32 ucnt; 768 u32 ucnt;
@@ -735,10 +770,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
735 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) 770 for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
736 tcfg->has_fracval = 1; 771 tcfg->has_fracval = 1;
737 772
738 if (soc_is_exynos5250()) 773 s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
739 s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no);
740 else
741 s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
742} 774}
743 775
744static void __iomem *exynos_eint_base; 776static void __iomem *exynos_eint_base;
@@ -970,14 +1002,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
970 struct irq_chip *chip = irq_get_chip(irq); 1002 struct irq_chip *chip = irq_get_chip(irq);
971 1003
972 chained_irq_enter(chip, desc); 1004 chained_irq_enter(chip, desc);
973 chip->irq_mask(&desc->irq_data);
974
975 if (chip->irq_ack)
976 chip->irq_ack(&desc->irq_data);
977
978 generic_handle_irq(*irq_data); 1005 generic_handle_irq(*irq_data);
979
980 chip->irq_unmask(&desc->irq_data);
981 chained_irq_exit(chip, desc); 1006 chained_irq_exit(chip, desc);
982} 1007}
983 1008
@@ -997,11 +1022,14 @@ static int __init exynos_init_irq_eint(void)
997 * platforms switch over to using the pinctrl driver, the wakeup 1022 * platforms switch over to using the pinctrl driver, the wakeup
998 * interrupt support code here can be completely removed. 1023 * interrupt support code here can be completely removed.
999 */ 1024 */
1025 static const struct of_device_id exynos_pinctrl_ids[] = {
1026 { .compatible = "samsung,pinctrl-exynos4210", },
1027 { .compatible = "samsung,pinctrl-exynos4x12", },
1028 };
1000 struct device_node *pctrl_np, *wkup_np; 1029 struct device_node *pctrl_np, *wkup_np;
1001 const char *pctrl_compat = "samsung,pinctrl-exynos4210";
1002 const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; 1030 const char *wkup_compat = "samsung,exynos4210-wakeup-eint";
1003 1031
1004 for_each_compatible_node(pctrl_np, NULL, pctrl_compat) { 1032 for_each_matching_node(pctrl_np, exynos_pinctrl_ids) {
1005 if (of_device_is_available(pctrl_np)) { 1033 if (of_device_is_available(pctrl_np)) {
1006 wkup_np = of_find_compatible_node(pctrl_np, NULL, 1034 wkup_np = of_find_compatible_node(pctrl_np, NULL,
1007 wkup_compat); 1035 wkup_compat);
@@ -1010,6 +1038,8 @@ static int __init exynos_init_irq_eint(void)
1010 } 1038 }
1011 } 1039 }
1012#endif 1040#endif
1041 if (soc_is_exynos5440())
1042 return 0;
1013 1043
1014 if (soc_is_exynos5250()) 1044 if (soc_is_exynos5250())
1015 exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K); 1045 exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index cff0595d0d35..8e4ec21ef2cf 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -116,7 +116,8 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
116 cpu_suspend(0, idle_finisher); 116 cpu_suspend(0, idle_finisher);
117 117
118#ifdef CONFIG_SMP 118#ifdef CONFIG_SMP
119 scu_enable(S5P_VA_SCU); 119 if (!soc_is_exynos5250())
120 scu_enable(S5P_VA_SCU);
120#endif 121#endif
121 cpu_pm_exit(); 122 cpu_pm_exit();
122 123
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index ae321c7cb15f..a1cb42c39590 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -14,9 +14,9 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/platform_data/asoc-s3c.h>
17 18
18#include <plat/gpio-cfg.h> 19#include <plat/gpio-cfg.h>
19#include <linux/platform_data/asoc-s3c.h>
20 20
21#include <mach/map.h> 21#include <mach/map.h>
22#include <mach/dma.h> 22#include <mach/dma.h>
diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c
deleted file mode 100644
index 17c9c6ecc2e0..000000000000
--- a/arch/arm/mach-exynos/dev-drm.c
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * linux/arch/arm/mach-exynos/dev-drm.c
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * EXYNOS - core DRM device
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/dma-mapping.h>
17#include <linux/platform_device.h>
18
19#include <plat/devs.h>
20
21static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);
22
23struct platform_device exynos_device_drm = {
24 .name = "exynos-drm",
25 .dev = {
26 .dma_mask = &exynos_drm_dma_mask,
27 .coherent_dma_mask = DMA_BIT_MASK(32),
28 }
29};
diff --git a/arch/arm/mach-exynos/dev-dwmci.c b/arch/arm/mach-exynos/dev-dwmci.c
deleted file mode 100644
index 79035018fb74..000000000000
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * linux/arch/arm/mach-exynos4/dev-dwmci.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Platform device for Synopsys DesignWare Mobile Storage IP
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/dma-mapping.h>
17#include <linux/platform_device.h>
18#include <linux/interrupt.h>
19#include <linux/ioport.h>
20#include <linux/mmc/dw_mmc.h>
21
22#include <plat/devs.h>
23
24#include <mach/map.h>
25
26static int exynos4_dwmci_get_bus_wd(u32 slot_id)
27{
28 return 4;
29}
30
31static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data)
32{
33 return 0;
34}
35
36static struct resource exynos4_dwmci_resource[] = {
37 [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
38 [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
39};
40
41static struct dw_mci_board exynos4_dwci_pdata = {
42 .num_slots = 1,
43 .quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
44 .bus_hz = 80 * 1000 * 1000,
45 .detect_delay_ms = 200,
46 .init = exynos4_dwmci_init,
47 .get_bus_wd = exynos4_dwmci_get_bus_wd,
48};
49
50static u64 exynos4_dwmci_dmamask = DMA_BIT_MASK(32);
51
52struct platform_device exynos4_device_dwmci = {
53 .name = "dw_mmc",
54 .id = -1,
55 .num_resources = ARRAY_SIZE(exynos4_dwmci_resource),
56 .resource = exynos4_dwmci_resource,
57 .dev = {
58 .dma_mask = &exynos4_dwmci_dmamask,
59 .coherent_dma_mask = DMA_BIT_MASK(32),
60 .platform_data = &exynos4_dwci_pdata,
61 },
62};
63
64void __init exynos4_dwmci_set_platdata(struct dw_mci_board *pd)
65{
66 struct dw_mci_board *npd;
67
68 npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
69 &exynos4_device_dwmci);
70
71 if (!npd->init)
72 npd->init = exynos4_dwmci_init;
73 if (!npd->get_bus_wd)
74 npd->get_bus_wd = exynos4_dwmci_get_bus_wd;
75}
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c
index 14ed7951a2c6..4244d02dafbd 100644
--- a/arch/arm/mach-exynos/dev-ohci.c
+++ b/arch/arm/mach-exynos/dev-ohci.c
@@ -12,10 +12,10 @@
12 12
13#include <linux/dma-mapping.h> 13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/platform_data/usb-exynos.h>
15 16
16#include <mach/irqs.h> 17#include <mach/irqs.h>
17#include <mach/map.h> 18#include <mach/map.h>
18#include <linux/platform_data/usb-exynos.h>
19 19
20#include <plat/devs.h> 20#include <plat/devs.h>
21#include <plat/usb-phy.h> 21#include <plat/usb-phy.h>
diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c
index 2e85c022fd16..7c42f4b7c8be 100644
--- a/arch/arm/mach-exynos/dev-uart.c
+++ b/arch/arm/mach-exynos/dev-uart.c
@@ -52,27 +52,3 @@ struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = {
52 .nr_resources = ARRAY_SIZE(exynos4_uart3_resource), 52 .nr_resources = ARRAY_SIZE(exynos4_uart3_resource),
53 }, 53 },
54}; 54};
55
56EXYNOS_UART_RESOURCE(5, 0)
57EXYNOS_UART_RESOURCE(5, 1)
58EXYNOS_UART_RESOURCE(5, 2)
59EXYNOS_UART_RESOURCE(5, 3)
60
61struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = {
62 [0] = {
63 .resources = exynos5_uart0_resource,
64 .nr_resources = ARRAY_SIZE(exynos5_uart0_resource),
65 },
66 [1] = {
67 .resources = exynos5_uart1_resource,
68 .nr_resources = ARRAY_SIZE(exynos5_uart0_resource),
69 },
70 [2] = {
71 .resources = exynos5_uart2_resource,
72 .nr_resources = ARRAY_SIZE(exynos5_uart2_resource),
73 },
74 [3] = {
75 .resources = exynos5_uart3_resource,
76 .nr_resources = ARRAY_SIZE(exynos5_uart3_resource),
77 },
78};
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 21d568b3b149..87e07d6fc615 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -275,6 +275,9 @@ static int __init exynos_dma_init(void)
275 exynos_pdma1_pdata.nr_valid_peri = 275 exynos_pdma1_pdata.nr_valid_peri =
276 ARRAY_SIZE(exynos4210_pdma1_peri); 276 ARRAY_SIZE(exynos4210_pdma1_peri);
277 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri; 277 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
278
279 if (samsung_rev() == EXYNOS4210_REV_0)
280 exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
278 } else if (soc_is_exynos4212() || soc_is_exynos4412()) { 281 } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
279 exynos_pdma0_pdata.nr_valid_peri = 282 exynos_pdma0_pdata.nr_valid_peri =
280 ARRAY_SIZE(exynos4212_pdma0_peri); 283 ARRAY_SIZE(exynos4212_pdma0_peri);
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index f4d7dd20cdac..c3f825b27947 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -20,10 +20,11 @@
20#include <asm/smp_plat.h> 20#include <asm/smp_plat.h>
21 21
22#include <mach/regs-pmu.h> 22#include <mach/regs-pmu.h>
23#include <plat/cpu.h>
23 24
24#include "common.h" 25#include "common.h"
25 26
26static inline void cpu_enter_lowpower(void) 27static inline void cpu_enter_lowpower_a9(void)
27{ 28{
28 unsigned int v; 29 unsigned int v;
29 30
@@ -45,6 +46,35 @@ static inline void cpu_enter_lowpower(void)
45 : "cc"); 46 : "cc");
46} 47}
47 48
49static inline void cpu_enter_lowpower_a15(void)
50{
51 unsigned int v;
52
53 asm volatile(
54 " mrc p15, 0, %0, c1, c0, 0\n"
55 " bic %0, %0, %1\n"
56 " mcr p15, 0, %0, c1, c0, 0\n"
57 : "=&r" (v)
58 : "Ir" (CR_C)
59 : "cc");
60
61 flush_cache_louis();
62
63 asm volatile(
64 /*
65 * Turn off coherency
66 */
67 " mrc p15, 0, %0, c1, c0, 1\n"
68 " bic %0, %0, %1\n"
69 " mcr p15, 0, %0, c1, c0, 1\n"
70 : "=&r" (v)
71 : "Ir" (0x40)
72 : "cc");
73
74 isb();
75 dsb();
76}
77
48static inline void cpu_leave_lowpower(void) 78static inline void cpu_leave_lowpower(void)
49{ 79{
50 unsigned int v; 80 unsigned int v;
@@ -103,11 +133,20 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
103void __ref exynos_cpu_die(unsigned int cpu) 133void __ref exynos_cpu_die(unsigned int cpu)
104{ 134{
105 int spurious = 0; 135 int spurious = 0;
136 int primary_part = 0;
106 137
107 /* 138 /*
108 * we're ready for shutdown now, so do it 139 * we're ready for shutdown now, so do it.
140 * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
141 * number by reading the Main ID register and then perform the
142 * appropriate sequence for entering low power.
109 */ 143 */
110 cpu_enter_lowpower(); 144 asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
145 if ((primary_part & 0xfff0) == 0xc0f0)
146 cpu_enter_lowpower_a15();
147 else
148 cpu_enter_lowpower_a9();
149
111 platform_do_lowpower(cpu, &spurious); 150 platform_do_lowpower(cpu, &spurious);
112 151
113 /* 152 /*
diff --git a/arch/arm/mach-exynos/include/mach/dwmci.h b/arch/arm/mach-exynos/include/mach/dwmci.h
deleted file mode 100644
index 7ce657459cc0..000000000000
--- a/arch/arm/mach-exynos/include/mach/dwmci.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* linux/arch/arm/mach-exynos4/include/mach/dwmci.h
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Synopsys DesignWare Mobile Storage for EXYNOS4210
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARM_ARCH_DWMCI_H
14#define __ASM_ARM_ARCH_DWMCI_H __FILE__
15
16#include <linux/mmc/dw_mmc.h>
17
18extern void exynos4_dwmci_set_platdata(struct dw_mci_board *pd);
19
20#endif /* __ASM_ARM_ARCH_DWMCI_H */
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 35bced6f9092..1f4dc35cd4b9 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -136,6 +136,9 @@
136#define EXYNOS4_IRQ_TSI IRQ_SPI(115) 136#define EXYNOS4_IRQ_TSI IRQ_SPI(115)
137#define EXYNOS4_IRQ_SATA IRQ_SPI(116) 137#define EXYNOS4_IRQ_SATA IRQ_SPI(116)
138 138
139#define EXYNOS4_IRQ_TMU_TRIG0 COMBINER_IRQ(2, 4)
140#define EXYNOS4_IRQ_TMU_TRIG1 COMBINER_IRQ(3, 4)
141
139#define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0) 142#define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
140#define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1) 143#define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1)
141#define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2) 144#define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
@@ -259,11 +262,6 @@
259#define EXYNOS5_IRQ_IEM_IEC IRQ_SPI(48) 262#define EXYNOS5_IRQ_IEM_IEC IRQ_SPI(48)
260#define EXYNOS5_IRQ_IEM_APC IRQ_SPI(49) 263#define EXYNOS5_IRQ_IEM_APC IRQ_SPI(49)
261#define EXYNOS5_IRQ_GPIO_C2C IRQ_SPI(50) 264#define EXYNOS5_IRQ_GPIO_C2C IRQ_SPI(50)
262#define EXYNOS5_IRQ_UART0 IRQ_SPI(51)
263#define EXYNOS5_IRQ_UART1 IRQ_SPI(52)
264#define EXYNOS5_IRQ_UART2 IRQ_SPI(53)
265#define EXYNOS5_IRQ_UART3 IRQ_SPI(54)
266#define EXYNOS5_IRQ_UART4 IRQ_SPI(55)
267#define EXYNOS5_IRQ_IIC IRQ_SPI(56) 265#define EXYNOS5_IRQ_IIC IRQ_SPI(56)
268#define EXYNOS5_IRQ_IIC1 IRQ_SPI(57) 266#define EXYNOS5_IRQ_IIC1 IRQ_SPI(57)
269#define EXYNOS5_IRQ_IIC2 IRQ_SPI(58) 267#define EXYNOS5_IRQ_IIC2 IRQ_SPI(58)
@@ -333,6 +331,11 @@
333#define EXYNOS5_IRQ_FIMC_LITE1 IRQ_SPI(126) 331#define EXYNOS5_IRQ_FIMC_LITE1 IRQ_SPI(126)
334#define EXYNOS5_IRQ_RP_TIMER IRQ_SPI(127) 332#define EXYNOS5_IRQ_RP_TIMER IRQ_SPI(127)
335 333
334/* EXYNOS5440 */
335
336#define EXYNOS5440_IRQ_UART0 IRQ_SPI(2)
337#define EXYNOS5440_IRQ_UART1 IRQ_SPI(3)
338
336#define EXYNOS5_IRQ_PMU COMBINER_IRQ(1, 2) 339#define EXYNOS5_IRQ_PMU COMBINER_IRQ(1, 2)
337 340
338#define EXYNOS5_IRQ_SYSMMU_GSC0_0 COMBINER_IRQ(2, 0) 341#define EXYNOS5_IRQ_SYSMMU_GSC0_0 COMBINER_IRQ(2, 0)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 8480849affb9..1df6abbf53b8 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -53,6 +53,7 @@
53#define EXYNOS4_PA_ONENAND_DMA 0x0C600000 53#define EXYNOS4_PA_ONENAND_DMA 0x0C600000
54 54
55#define EXYNOS_PA_CHIPID 0x10000000 55#define EXYNOS_PA_CHIPID 0x10000000
56#define EXYNOS5440_PA_CHIPID 0x00160000
56 57
57#define EXYNOS4_PA_SYSCON 0x10010000 58#define EXYNOS4_PA_SYSCON 0x10010000
58#define EXYNOS5_PA_SYSCON 0x10050100 59#define EXYNOS5_PA_SYSCON 0x10050100
@@ -88,8 +89,11 @@
88#define EXYNOS4_PA_TWD 0x10500600 89#define EXYNOS4_PA_TWD 0x10500600
89#define EXYNOS4_PA_L2CC 0x10502000 90#define EXYNOS4_PA_L2CC 0x10502000
90 91
92#define EXYNOS4_PA_TMU 0x100C0000
93
91#define EXYNOS4_PA_MDMA0 0x10810000 94#define EXYNOS4_PA_MDMA0 0x10810000
92#define EXYNOS4_PA_MDMA1 0x12850000 95#define EXYNOS4_PA_MDMA1 0x12850000
96#define EXYNOS4_PA_S_MDMA1 0x12840000
93#define EXYNOS4_PA_PDMA0 0x12680000 97#define EXYNOS4_PA_PDMA0 0x12680000
94#define EXYNOS4_PA_PDMA1 0x12690000 98#define EXYNOS4_PA_PDMA1 0x12690000
95#define EXYNOS5_PA_MDMA0 0x10800000 99#define EXYNOS5_PA_MDMA0 0x10800000
@@ -279,7 +283,10 @@
279#define EXYNOS5_PA_UART1 0x12C10000 283#define EXYNOS5_PA_UART1 0x12C10000
280#define EXYNOS5_PA_UART2 0x12C20000 284#define EXYNOS5_PA_UART2 0x12C20000
281#define EXYNOS5_PA_UART3 0x12C30000 285#define EXYNOS5_PA_UART3 0x12C30000
282#define EXYNOS5_SZ_UART SZ_256 286
287#define EXYNOS5440_PA_UART0 0x000B0000
288#define EXYNOS5440_PA_UART1 0x000C0000
289#define EXYNOS5440_SZ_UART SZ_256
283 290
284#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) 291#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
285 292
diff --git a/arch/arm/mach-exynos/include/mach/regs-mem.h b/arch/arm/mach-exynos/include/mach/regs-mem.h
deleted file mode 100644
index 0368b5a27252..000000000000
--- a/arch/arm/mach-exynos/include/mach/regs-mem.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* linux/arch/arm/mach-exynos4/include/mach/regs-mem.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * EXYNOS4 - SROMC and DMC register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_MEM_H
14#define __ASM_ARCH_REGS_MEM_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_DMC0_MEMCON_OFFSET 0x04
19
20#define S5P_DMC0_MEMTYPE_SHIFT 8
21#define S5P_DMC0_MEMTYPE_MASK 0xF
22
23#endif /* __ASM_ARCH_REGS_MEM_H */
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index d4e392b811a3..84428e72cf5e 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -31,6 +31,7 @@
31 31
32#define S5P_SWRESET S5P_PMUREG(0x0400) 32#define S5P_SWRESET S5P_PMUREG(0x0400)
33#define EXYNOS_SWRESET S5P_PMUREG(0x0400) 33#define EXYNOS_SWRESET S5P_PMUREG(0x0400)
34#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4)
34 35
35#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600) 36#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
36#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) 37#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
@@ -230,8 +231,6 @@
230 231
231/* For EXYNOS5 */ 232/* For EXYNOS5 */
232 233
233#define EXYNOS5_USB_CFG S5P_PMUREG(0x0230)
234
235#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408) 234#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
236#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C) 235#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
237 236
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index eadf4b59e7d2..92757ff817ae 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -77,6 +77,9 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = {
77 "exynos4210-spi.2", NULL), 77 "exynos4210-spi.2", NULL),
78 OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL), 78 OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL),
79 OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL), 79 OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL),
80 OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_MDMA1, "dma-pl330.2", NULL),
81 OF_DEV_AUXDATA("samsung,exynos4210-tmu", EXYNOS4_PA_TMU,
82 "exynos-tmu", NULL),
80 {}, 83 {},
81}; 84};
82 85
@@ -94,6 +97,8 @@ static void __init exynos4_dt_machine_init(void)
94 97
95static char const *exynos4_dt_compat[] __initdata = { 98static char const *exynos4_dt_compat[] __initdata = {
96 "samsung,exynos4210", 99 "samsung,exynos4210",
100 "samsung,exynos4212",
101 "samsung,exynos4412",
97 NULL 102 NULL
98}; 103};
99 104
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index db1cd8eacf28..929de766d490 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -10,7 +10,10 @@
10*/ 10*/
11 11
12#include <linux/of_platform.h> 12#include <linux/of_platform.h>
13#include <linux/of_fdt.h>
13#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/memblock.h>
16#include <linux/of_fdt.h>
14 17
15#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
16#include <asm/hardware/gic.h> 19#include <asm/hardware/gic.h>
@@ -18,6 +21,7 @@
18 21
19#include <plat/cpu.h> 22#include <plat/cpu.h>
20#include <plat/regs-serial.h> 23#include <plat/regs-serial.h>
24#include <plat/mfc.h>
21 25
22#include "common.h" 26#include "common.h"
23 27
@@ -47,6 +51,20 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
47 "s3c2440-i2c.0", NULL), 51 "s3c2440-i2c.0", NULL),
48 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1), 52 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
49 "s3c2440-i2c.1", NULL), 53 "s3c2440-i2c.1", NULL),
54 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
55 "s3c2440-i2c.2", NULL),
56 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3),
57 "s3c2440-i2c.3", NULL),
58 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4),
59 "s3c2440-i2c.4", NULL),
60 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5),
61 "s3c2440-i2c.5", NULL),
62 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6),
63 "s3c2440-i2c.6", NULL),
64 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7),
65 "s3c2440-i2c.7", NULL),
66 OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
67 "s3c2440-hdmiphy-i2c", NULL),
50 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0, 68 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
51 "dw_mmc.0", NULL), 69 "dw_mmc.0", NULL),
52 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1, 70 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
@@ -61,6 +79,12 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
61 "exynos4210-spi.1", NULL), 79 "exynos4210-spi.1", NULL),
62 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2, 80 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
63 "exynos4210-spi.2", NULL), 81 "exynos4210-spi.2", NULL),
82 OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
83 "exynos5-sata", NULL),
84 OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000,
85 "exynos5-sata-phy", NULL),
86 OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
87 "exynos5-sata-phy-i2c", NULL),
64 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL), 88 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
65 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL), 89 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
66 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL), 90 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
@@ -72,35 +96,69 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
72 "exynos-gsc.2", NULL), 96 "exynos-gsc.2", NULL),
73 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3, 97 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
74 "exynos-gsc.3", NULL), 98 "exynos-gsc.3", NULL),
99 OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
100 "exynos5-hdmi", NULL),
101 OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
102 "exynos5-mixer", NULL),
103 OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
104 OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000,
105 "exynos-tmu", NULL),
75 {}, 106 {},
76}; 107};
77 108
78static void __init exynos5250_dt_map_io(void) 109static const struct of_dev_auxdata exynos5440_auxdata_lookup[] __initconst = {
110 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5440_PA_UART0,
111 "exynos4210-uart.0", NULL),
112 {},
113};
114
115static void __init exynos5_dt_map_io(void)
79{ 116{
117 unsigned long root = of_get_flat_dt_root();
118
80 exynos_init_io(NULL, 0); 119 exynos_init_io(NULL, 0);
81 s3c24xx_init_clocks(24000000); 120
121 if (of_flat_dt_is_compatible(root, "samsung,exynos5250"))
122 s3c24xx_init_clocks(24000000);
82} 123}
83 124
84static void __init exynos5250_dt_machine_init(void) 125static void __init exynos5_dt_machine_init(void)
85{ 126{
86 of_platform_populate(NULL, of_default_bus_match_table, 127 if (of_machine_is_compatible("samsung,exynos5250"))
87 exynos5250_auxdata_lookup, NULL); 128 of_platform_populate(NULL, of_default_bus_match_table,
129 exynos5250_auxdata_lookup, NULL);
130 else if (of_machine_is_compatible("samsung,exynos5440"))
131 of_platform_populate(NULL, of_default_bus_match_table,
132 exynos5440_auxdata_lookup, NULL);
88} 133}
89 134
90static char const *exynos5250_dt_compat[] __initdata = { 135static char const *exynos5_dt_compat[] __initdata = {
91 "samsung,exynos5250", 136 "samsung,exynos5250",
137 "samsung,exynos5440",
92 NULL 138 NULL
93}; 139};
94 140
141static void __init exynos5_reserve(void)
142{
143 struct s5p_mfc_dt_meminfo mfc_mem;
144
145 /* Reserve memory for MFC only if it's available */
146 mfc_mem.compatible = "samsung,mfc-v6";
147 if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
148 s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
149 mfc_mem.lsize);
150}
151
95DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") 152DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
96 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 153 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
97 .init_irq = exynos5_init_irq, 154 .init_irq = exynos5_init_irq,
98 .smp = smp_ops(exynos_smp_ops), 155 .smp = smp_ops(exynos_smp_ops),
99 .map_io = exynos5250_dt_map_io, 156 .map_io = exynos5_dt_map_io,
100 .handle_irq = gic_handle_irq, 157 .handle_irq = gic_handle_irq,
101 .init_machine = exynos5250_dt_machine_init, 158 .init_machine = exynos5_dt_machine_init,
102 .init_late = exynos_init_late, 159 .init_late = exynos_init_late,
103 .timer = &exynos4_timer, 160 .timer = &exynos4_timer,
104 .dt_compat = exynos5250_dt_compat, 161 .dt_compat = exynos5_dt_compat,
105 .restart = exynos5_restart, 162 .restart = exynos5_restart,
163 .reserve = exynos5_reserve,
106MACHINE_END 164MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index c05d7aa84031..27d4ed8b116e 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -25,7 +25,10 @@
25#include <linux/mmc/host.h> 25#include <linux/mmc/host.h>
26#include <linux/fb.h> 26#include <linux/fb.h>
27#include <linux/pwm_backlight.h> 27#include <linux/pwm_backlight.h>
28#include <linux/platform_data/i2c-s3c2410.h>
29#include <linux/platform_data/mipi-csis.h>
28#include <linux/platform_data/s3c-hsotg.h> 30#include <linux/platform_data/s3c-hsotg.h>
31#include <linux/platform_data/usb-ehci-s5p.h>
29#include <drm/exynos_drm.h> 32#include <drm/exynos_drm.h>
30 33
31#include <video/platform_lcd.h> 34#include <video/platform_lcd.h>
@@ -45,14 +48,11 @@
45#include <plat/devs.h> 48#include <plat/devs.h>
46#include <plat/fb.h> 49#include <plat/fb.h>
47#include <plat/sdhci.h> 50#include <plat/sdhci.h>
48#include <linux/platform_data/usb-ehci-s5p.h>
49#include <plat/clock.h> 51#include <plat/clock.h>
50#include <plat/gpio-cfg.h> 52#include <plat/gpio-cfg.h>
51#include <linux/platform_data/i2c-s3c2410.h>
52#include <plat/mfc.h> 53#include <plat/mfc.h>
53#include <plat/fimc-core.h> 54#include <plat/fimc-core.h>
54#include <plat/camport.h> 55#include <plat/camport.h>
55#include <linux/platform_data/mipi-csis.h>
56 56
57#include <mach/map.h> 57#include <mach/map.h>
58 58
@@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
113 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | 113 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
114 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 114 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
115 MMC_CAP_ERASE), 115 MMC_CAP_ERASE),
116 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
117 .cd_type = S3C_SDHCI_CD_PERMANENT, 116 .cd_type = S3C_SDHCI_CD_PERMANENT,
118}; 117};
119 118
@@ -1327,9 +1326,6 @@ static struct platform_device *nuri_devices[] __initdata = {
1327 &cam_vdda_fixed_rdev, 1326 &cam_vdda_fixed_rdev,
1328 &cam_8m_12v_fixed_rdev, 1327 &cam_8m_12v_fixed_rdev,
1329 &exynos4_bus_devfreq, 1328 &exynos4_bus_devfreq,
1330#ifdef CONFIG_DRM_EXYNOS
1331 &exynos_device_drm,
1332#endif
1333}; 1329};
1334 1330
1335static void __init nuri_map_io(void) 1331static void __init nuri_map_io(void)
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 9adf491674ea..e6f4191cd14c 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -23,7 +23,10 @@
23#include <linux/mfd/max8997.h> 23#include <linux/mfd/max8997.h>
24#include <linux/lcd.h> 24#include <linux/lcd.h>
25#include <linux/rfkill-gpio.h> 25#include <linux/rfkill-gpio.h>
26#include <linux/platform_data/i2c-s3c2410.h>
26#include <linux/platform_data/s3c-hsotg.h> 27#include <linux/platform_data/s3c-hsotg.h>
28#include <linux/platform_data/usb-ehci-s5p.h>
29#include <linux/platform_data/usb-exynos.h>
27 30
28#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
29#include <asm/hardware/gic.h> 32#include <asm/hardware/gic.h>
@@ -36,8 +39,6 @@
36#include <plat/cpu.h> 39#include <plat/cpu.h>
37#include <plat/devs.h> 40#include <plat/devs.h>
38#include <plat/sdhci.h> 41#include <plat/sdhci.h>
39#include <linux/platform_data/i2c-s3c2410.h>
40#include <linux/platform_data/usb-ehci-s5p.h>
41#include <plat/clock.h> 42#include <plat/clock.h>
42#include <plat/gpio-cfg.h> 43#include <plat/gpio-cfg.h>
43#include <plat/backlight.h> 44#include <plat/backlight.h>
@@ -45,7 +46,6 @@
45#include <plat/mfc.h> 46#include <plat/mfc.h>
46#include <plat/hdmi.h> 47#include <plat/hdmi.h>
47 48
48#include <linux/platform_data/usb-exynos.h>
49#include <mach/map.h> 49#include <mach/map.h>
50 50
51#include <drm/exynos_drm.h> 51#include <drm/exynos_drm.h>
@@ -100,6 +100,7 @@ static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
100 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */ 100 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
101 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */ 101 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
102 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */ 102 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
103 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* OTG */
103}; 104};
104static struct regulator_consumer_supply __initdata ldo6_consumer[] = { 105static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
105 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */ 106 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
@@ -110,6 +111,7 @@ static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
110static struct regulator_consumer_supply __initdata ldo8_consumer[] = { 111static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
111 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */ 112 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
112 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */ 113 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
114 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* OTG */
113}; 115};
114static struct regulator_consumer_supply __initdata ldo9_consumer[] = { 116static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
115 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */ 117 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
@@ -709,9 +711,6 @@ static struct platform_device *origen_devices[] __initdata = {
709 &s5p_device_mfc_l, 711 &s5p_device_mfc_l,
710 &s5p_device_mfc_r, 712 &s5p_device_mfc_r,
711 &s5p_device_mixer, 713 &s5p_device_mixer,
712#ifdef CONFIG_DRM_EXYNOS
713 &exynos_device_drm,
714#endif
715 &exynos4_device_ohci, 714 &exynos4_device_ohci,
716 &origen_device_gpiokeys, 715 &origen_device_gpiokeys,
717 &origen_lcd_hv070wsa, 716 &origen_lcd_hv070wsa,
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 730f1ac65928..a1555a73c7af 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,6 +21,7 @@
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22#include <linux/regulator/machine.h> 22#include <linux/regulator/machine.h>
23#include <linux/serial_core.h> 23#include <linux/serial_core.h>
24#include <linux/platform_data/i2c-s3c2410.h>
24#include <linux/platform_data/s3c-hsotg.h> 25#include <linux/platform_data/s3c-hsotg.h>
25 26
26#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -34,7 +35,6 @@
34#include <plat/devs.h> 35#include <plat/devs.h>
35#include <plat/fb.h> 36#include <plat/fb.h>
36#include <plat/gpio-cfg.h> 37#include <plat/gpio-cfg.h>
37#include <linux/platform_data/i2c-s3c2410.h>
38#include <plat/keypad.h> 38#include <plat/keypad.h>
39#include <plat/mfc.h> 39#include <plat/mfc.h>
40#include <plat/regs-serial.h> 40#include <plat/regs-serial.h>
@@ -317,9 +317,6 @@ static struct platform_device *smdk4x12_devices[] __initdata = {
317 &s5p_device_mfc, 317 &s5p_device_mfc,
318 &s5p_device_mfc_l, 318 &s5p_device_mfc_l,
319 &s5p_device_mfc_r, 319 &s5p_device_mfc_r,
320#ifdef CONFIG_DRM_EXYNOS
321 &exynos_device_drm,
322#endif
323 &samsung_device_keypad, 320 &samsung_device_keypad,
324}; 321};
325 322
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index ee4fb1a9cb72..063cb94b934d 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -20,7 +20,10 @@
20#include <linux/input.h> 20#include <linux/input.h>
21#include <linux/pwm.h> 21#include <linux/pwm.h>
22#include <linux/pwm_backlight.h> 22#include <linux/pwm_backlight.h>
23#include <linux/platform_data/i2c-s3c2410.h>
23#include <linux/platform_data/s3c-hsotg.h> 24#include <linux/platform_data/s3c-hsotg.h>
25#include <linux/platform_data/usb-ehci-s5p.h>
26#include <linux/platform_data/usb-exynos.h>
24 27
25#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
26#include <asm/hardware/gic.h> 29#include <asm/hardware/gic.h>
@@ -35,16 +38,13 @@
35#include <plat/fb.h> 38#include <plat/fb.h>
36#include <plat/keypad.h> 39#include <plat/keypad.h>
37#include <plat/sdhci.h> 40#include <plat/sdhci.h>
38#include <linux/platform_data/i2c-s3c2410.h>
39#include <plat/gpio-cfg.h> 41#include <plat/gpio-cfg.h>
40#include <plat/backlight.h> 42#include <plat/backlight.h>
41#include <plat/mfc.h> 43#include <plat/mfc.h>
42#include <linux/platform_data/usb-ehci-s5p.h>
43#include <plat/clock.h> 44#include <plat/clock.h>
44#include <plat/hdmi.h> 45#include <plat/hdmi.h>
45 46
46#include <mach/map.h> 47#include <mach/map.h>
47#include <linux/platform_data/usb-exynos.h>
48 48
49#include <drm/exynos_drm.h> 49#include <drm/exynos_drm.h>
50#include "common.h" 50#include "common.h"
@@ -300,9 +300,6 @@ static struct platform_device *smdkv310_devices[] __initdata = {
300 &s5p_device_fimc_md, 300 &s5p_device_fimc_md,
301 &s5p_device_g2d, 301 &s5p_device_g2d,
302 &s5p_device_jpeg, 302 &s5p_device_jpeg,
303#ifdef CONFIG_DRM_EXYNOS
304 &exynos_device_drm,
305#endif
306 &exynos4_device_ac97, 303 &exynos4_device_ac97,
307 &exynos4_device_i2s0, 304 &exynos4_device_i2s0,
308 &exynos4_device_ohci, 305 &exynos4_device_ohci,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index ebc9dd339a38..9e3340f18950 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -23,6 +23,8 @@
23#include <linux/i2c-gpio.h> 23#include <linux/i2c-gpio.h>
24#include <linux/i2c/mcs.h> 24#include <linux/i2c/mcs.h>
25#include <linux/i2c/atmel_mxt_ts.h> 25#include <linux/i2c/atmel_mxt_ts.h>
26#include <linux/platform_data/i2c-s3c2410.h>
27#include <linux/platform_data/mipi-csis.h>
26#include <linux/platform_data/s3c-hsotg.h> 28#include <linux/platform_data/s3c-hsotg.h>
27#include <drm/exynos_drm.h> 29#include <drm/exynos_drm.h>
28 30
@@ -35,7 +37,6 @@
35#include <plat/clock.h> 37#include <plat/clock.h>
36#include <plat/cpu.h> 38#include <plat/cpu.h>
37#include <plat/devs.h> 39#include <plat/devs.h>
38#include <linux/platform_data/i2c-s3c2410.h>
39#include <plat/gpio-cfg.h> 40#include <plat/gpio-cfg.h>
40#include <plat/fb.h> 41#include <plat/fb.h>
41#include <plat/mfc.h> 42#include <plat/mfc.h>
@@ -43,7 +44,6 @@
43#include <plat/fimc-core.h> 44#include <plat/fimc-core.h>
44#include <plat/s5p-time.h> 45#include <plat/s5p-time.h>
45#include <plat/camport.h> 46#include <plat/camport.h>
46#include <linux/platform_data/mipi-csis.h>
47 47
48#include <mach/map.h> 48#include <mach/map.h>
49 49
@@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
754 .max_width = 8, 754 .max_width = 8,
755 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | 755 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
756 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), 756 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
757 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
758 .cd_type = S3C_SDHCI_CD_PERMANENT, 757 .cd_type = S3C_SDHCI_CD_PERMANENT,
759}; 758};
760 759
@@ -1081,9 +1080,6 @@ static struct platform_device *universal_devices[] __initdata = {
1081 &s5p_device_onenand, 1080 &s5p_device_onenand,
1082 &s5p_device_fimd0, 1081 &s5p_device_fimd0,
1083 &s5p_device_jpeg, 1082 &s5p_device_jpeg,
1084#ifdef CONFIG_DRM_EXYNOS
1085 &exynos_device_drm,
1086#endif
1087 &s3c_device_usb_hsotg, 1083 &s3c_device_usb_hsotg,
1088 &s5p_device_mfc, 1084 &s5p_device_mfc,
1089 &s5p_device_mfc_l, 1085 &s5p_device_mfc_l,
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index b601fb8a408b..57668eb68e75 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -19,7 +19,9 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/percpu.h> 21#include <linux/percpu.h>
22#include <linux/of.h>
22 23
24#include <asm/arch_timer.h>
23#include <asm/hardware/gic.h> 25#include <asm/hardware/gic.h>
24#include <asm/localtimer.h> 26#include <asm/localtimer.h>
25 27
@@ -476,8 +478,13 @@ static void __init exynos4_timer_resources(void)
476#endif /* CONFIG_LOCAL_TIMERS */ 478#endif /* CONFIG_LOCAL_TIMERS */
477} 479}
478 480
479static void __init exynos4_timer_init(void) 481static void __init exynos_timer_init(void)
480{ 482{
483 if (soc_is_exynos5440()) {
484 arch_timer_of_register();
485 return;
486 }
487
481 if ((soc_is_exynos4210()) || (soc_is_exynos5250())) 488 if ((soc_is_exynos4210()) || (soc_is_exynos5250()))
482 mct_int_type = MCT_INT_SPI; 489 mct_int_type = MCT_INT_SPI;
483 else 490 else
@@ -489,5 +496,5 @@ static void __init exynos4_timer_init(void)
489} 496}
490 497
491struct sys_timer exynos4_timer = { 498struct sys_timer exynos4_timer = {
492 .init = exynos4_timer_init, 499 .init = exynos_timer_init,
493}; 500};
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index f93d820ecab5..4ca8ff14a5bf 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -36,8 +36,22 @@
36 36
37extern void exynos4_secondary_startup(void); 37extern void exynos4_secondary_startup(void);
38 38
39#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ 39static inline void __iomem *cpu_boot_reg_base(void)
40 S5P_INFORM5 : S5P_VA_SYSRAM) 40{
41 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
42 return S5P_INFORM5;
43 return S5P_VA_SYSRAM;
44}
45
46static inline void __iomem *cpu_boot_reg(int cpu)
47{
48 void __iomem *boot_reg;
49
50 boot_reg = cpu_boot_reg_base();
51 if (soc_is_exynos4412())
52 boot_reg += 4*cpu;
53 return boot_reg;
54}
41 55
42/* 56/*
43 * Write pen_release in a way that is guaranteed to be visible to all 57 * Write pen_release in a way that is guaranteed to be visible to all
@@ -84,6 +98,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
84static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) 98static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
85{ 99{
86 unsigned long timeout; 100 unsigned long timeout;
101 unsigned long phys_cpu = cpu_logical_map(cpu);
87 102
88 /* 103 /*
89 * Set synchronisation state between this boot processor 104 * Set synchronisation state between this boot processor
@@ -99,7 +114,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
99 * Note that "pen_release" is the hardware CPU ID, whereas 114 * Note that "pen_release" is the hardware CPU ID, whereas
100 * "cpu" is Linux's internal ID. 115 * "cpu" is Linux's internal ID.
101 */ 116 */
102 write_pen_release(cpu_logical_map(cpu)); 117 write_pen_release(phys_cpu);
103 118
104 if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) { 119 if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
105 __raw_writel(S5P_CORE_LOCAL_PWR_EN, 120 __raw_writel(S5P_CORE_LOCAL_PWR_EN,
@@ -133,7 +148,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
133 smp_rmb(); 148 smp_rmb();
134 149
135 __raw_writel(virt_to_phys(exynos4_secondary_startup), 150 __raw_writel(virt_to_phys(exynos4_secondary_startup),
136 CPU1_BOOT_REG); 151 cpu_boot_reg(phys_cpu));
137 gic_raise_softirq(cpumask_of(cpu), 0); 152 gic_raise_softirq(cpumask_of(cpu), 0);
138 153
139 if (pen_release == -1) 154 if (pen_release == -1)
@@ -181,6 +196,8 @@ static void __init exynos_smp_init_cpus(void)
181 196
182static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) 197static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
183{ 198{
199 int i;
200
184 if (!soc_is_exynos5250()) 201 if (!soc_is_exynos5250())
185 scu_enable(scu_base_addr()); 202 scu_enable(scu_base_addr());
186 203
@@ -190,8 +207,9 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
190 * until it receives a soft interrupt, and then the 207 * until it receives a soft interrupt, and then the
191 * secondary CPU branches to this address. 208 * secondary CPU branches to this address.
192 */ 209 */
193 __raw_writel(virt_to_phys(exynos4_secondary_startup), 210 for (i = 1; i < max_cpus; ++i)
194 CPU1_BOOT_REG); 211 __raw_writel(virt_to_phys(exynos4_secondary_startup),
212 cpu_boot_reg(cpu_logical_map(i)));
195} 213}
196 214
197struct smp_operations exynos_smp_ops __initdata = { 215struct smp_operations exynos_smp_ops __initdata = {
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index c06c992943a1..8df6ec547f78 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -81,6 +81,9 @@ static int exynos_cpu_suspend(unsigned long arg)
81 outer_flush_all(); 81 outer_flush_all();
82#endif 82#endif
83 83
84 if (soc_is_exynos5250())
85 flush_cache_all();
86
84 /* issue the standby signal into the pm unit. */ 87 /* issue the standby signal into the pm unit. */
85 cpu_do_idle(); 88 cpu_do_idle();
86 89
@@ -312,6 +315,10 @@ static void exynos_pm_resume(void)
312 } 315 }
313 316
314early_wakeup: 317early_wakeup:
318
319 /* Clear SLEEP mode set in INFORM1 */
320 __raw_writel(0x0, S5P_INFORM1);
321
315 return; 322 return;
316} 323}
317 324
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index c0bc83a7663e..9f1351de52f7 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -19,6 +19,8 @@
19#include <linux/pm_domain.h> 19#include <linux/pm_domain.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/of_address.h> 21#include <linux/of_address.h>
22#include <linux/of_platform.h>
23#include <linux/sched.h>
22 24
23#include <mach/regs-pmu.h> 25#include <mach/regs-pmu.h>
24#include <plat/devs.h> 26#include <plat/devs.h>
@@ -83,12 +85,88 @@ static struct exynos_pm_domain PD = { \
83} 85}
84 86
85#ifdef CONFIG_OF 87#ifdef CONFIG_OF
88static void exynos_add_device_to_domain(struct exynos_pm_domain *pd,
89 struct device *dev)
90{
91 int ret;
92
93 dev_dbg(dev, "adding to power domain %s\n", pd->pd.name);
94
95 while (1) {
96 ret = pm_genpd_add_device(&pd->pd, dev);
97 if (ret != -EAGAIN)
98 break;
99 cond_resched();
100 }
101
102 pm_genpd_dev_need_restore(dev, true);
103}
104
105static void exynos_remove_device_from_domain(struct device *dev)
106{
107 struct generic_pm_domain *genpd = dev_to_genpd(dev);
108 int ret;
109
110 dev_dbg(dev, "removing from power domain %s\n", genpd->name);
111
112 while (1) {
113 ret = pm_genpd_remove_device(genpd, dev);
114 if (ret != -EAGAIN)
115 break;
116 cond_resched();
117 }
118}
119
120static void exynos_read_domain_from_dt(struct device *dev)
121{
122 struct platform_device *pd_pdev;
123 struct exynos_pm_domain *pd;
124 struct device_node *node;
125
126 node = of_parse_phandle(dev->of_node, "samsung,power-domain", 0);
127 if (!node)
128 return;
129 pd_pdev = of_find_device_by_node(node);
130 if (!pd_pdev)
131 return;
132 pd = platform_get_drvdata(pd_pdev);
133 exynos_add_device_to_domain(pd, dev);
134}
135
136static int exynos_pm_notifier_call(struct notifier_block *nb,
137 unsigned long event, void *data)
138{
139 struct device *dev = data;
140
141 switch (event) {
142 case BUS_NOTIFY_BIND_DRIVER:
143 if (dev->of_node)
144 exynos_read_domain_from_dt(dev);
145
146 break;
147
148 case BUS_NOTIFY_UNBOUND_DRIVER:
149 exynos_remove_device_from_domain(dev);
150
151 break;
152 }
153 return NOTIFY_DONE;
154}
155
156static struct notifier_block platform_nb = {
157 .notifier_call = exynos_pm_notifier_call,
158};
159
86static __init int exynos_pm_dt_parse_domains(void) 160static __init int exynos_pm_dt_parse_domains(void)
87{ 161{
162 struct platform_device *pdev;
88 struct device_node *np; 163 struct device_node *np;
89 164
90 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { 165 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
91 struct exynos_pm_domain *pd; 166 struct exynos_pm_domain *pd;
167 int on;
168
169 pdev = of_find_device_by_node(np);
92 170
93 pd = kzalloc(sizeof(*pd), GFP_KERNEL); 171 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
94 if (!pd) { 172 if (!pd) {
@@ -97,15 +175,22 @@ static __init int exynos_pm_dt_parse_domains(void)
97 return -ENOMEM; 175 return -ENOMEM;
98 } 176 }
99 177
100 if (of_get_property(np, "samsung,exynos4210-pd-off", NULL)) 178 pd->pd.name = kstrdup(np->name, GFP_KERNEL);
101 pd->is_off = true; 179 pd->name = pd->pd.name;
102 pd->name = np->name;
103 pd->base = of_iomap(np, 0); 180 pd->base = of_iomap(np, 0);
104 pd->pd.power_off = exynos_pd_power_off; 181 pd->pd.power_off = exynos_pd_power_off;
105 pd->pd.power_on = exynos_pd_power_on; 182 pd->pd.power_on = exynos_pd_power_on;
106 pd->pd.of_node = np; 183 pd->pd.of_node = np;
107 pm_genpd_init(&pd->pd, NULL, false); 184
185 platform_set_drvdata(pdev, pd);
186
187 on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN;
188
189 pm_genpd_init(&pd->pd, NULL, !on);
108 } 190 }
191
192 bus_register_notifier(&platform_bus_type, &platform_nb);
193
109 return 0; 194 return 0;
110} 195}
111#else 196#else
diff --git a/arch/arm/mach-exynos/setup-i2c0.c b/arch/arm/mach-exynos/setup-i2c0.c
index 5700f23629f7..e2d9dfbf102c 100644
--- a/arch/arm/mach-exynos/setup-i2c0.c
+++ b/arch/arm/mach-exynos/setup-i2c0.c
@@ -20,7 +20,7 @@ struct platform_device; /* don't need the contents */
20 20
21void s3c_i2c0_cfg_gpio(struct platform_device *dev) 21void s3c_i2c0_cfg_gpio(struct platform_device *dev)
22{ 22{
23 if (soc_is_exynos5250()) 23 if (soc_is_exynos5250() || soc_is_exynos5440())
24 /* will be implemented with gpio function */ 24 /* will be implemented with gpio function */
25 return; 25 return;
26 26
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 09:27:07 -0500