10 files changed, 45 insertions, 19 deletions

diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 851dea018578..86964d2e9e1b 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -520,7 +520,7 @@ static struct clk init_clocks_off[] = {
                 .ctrlbit        = (1 << 21),
         }, {
                 .name           = "ac97",
-                .id             = -1,
+                .devname        = "samsung-ac97",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 27),
         }, {
@@ -899,8 +899,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 28, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_cam",
-                        .devname        = "exynos4-fimc.0",
+                        .name           = "sclk_cam0",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 16),
                 },
@@ -909,8 +908,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 16, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_cam",
-                        .devname        = "exynos4-fimc.1",
+                        .name           = "sclk_cam1",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 20),
                 },
@@ -1160,7 +1158,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
 
         vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
         vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
-                                __raw_readl(S5P_VPLL_CON1), pll_4650);
+                                __raw_readl(S5P_VPLL_CON1), pll_4650c);
 
         clk_fout_apll.ops = &exynos4_fout_apll_ops;
         clk_fout_mpll.rate = mpll;
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 2d8a40c9e6e5..746d6fc6d397 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -24,12 +24,13 @@
 #include <plat/exynos4.h>
 #include <plat/adc-core.h>
 #include <plat/sdhci.h>
-#include <plat/devs.h>
 #include <plat/fb-core.h>
 #include <plat/fimc-core.h>
 #include <plat/iic-core.h>
+#include <plat/reset.h>
 
 #include <mach/regs-irq.h>
+#include <mach/regs-pmu.h>
 
 extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
                          unsigned int irq_start);
@@ -128,6 +129,11 @@ static void exynos4_idle(void)
         local_irq_enable();
 }
 
+static void exynos4_sw_reset(void)
+{
+        __raw_writel(0x1, S5P_SWRESET);
+}
+
 /*
  * exynos4_map_io
  *
@@ -241,5 +247,8 @@ int __init exynos4_init(void)
         /* set idle function */
         pm_idle = exynos4_idle;
 
+        /* set sw_reset function */
+        s5p_reset_hook = exynos4_sw_reset;
+
         return sysdev_register(&exynos4_sysdev);
 }
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
index 934d2a493982..f8952f8f3757 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -80,9 +80,8 @@
 #define IRQ_HSMMC3              IRQ_SPI(76)
 #define IRQ_DWMCI               IRQ_SPI(77)
 
-#define IRQ_MIPICSI0            IRQ_SPI(78)
-
-#define IRQ_MIPICSI1            IRQ_SPI(80)
+#define IRQ_MIPI_CSIS0          IRQ_SPI(78)
+#define IRQ_MIPI_CSIS1          IRQ_SPI(80)
 
 #define IRQ_ONENAND_AUDI        IRQ_SPI(82)
 #define IRQ_ROTATOR             IRQ_SPI(83)
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index fa49bbb8e7b0..cdf9b47c303c 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -29,6 +29,8 @@
 #define S5P_USE_STANDBY_WFE1                    (1 << 25)
 #define S5P_USE_MASK                            ((0x3 << 16) | (0x3 << 24))
 
+#define S5P_SWRESET                             S5P_PMUREG(0x0400)
+
 #define S5P_WAKEUP_STAT                         S5P_PMUREG(0x0600)
 #define S5P_EINT_WAKEUP_MASK                    S5P_PMUREG(0x0604)
 #define S5P_WAKEUP_MASK                         S5P_PMUREG(0x0608)
diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c
index 9d87d2ac7f68..badb8c66fc9b 100644
--- a/arch/arm/mach-exynos4/irq-eint.c
+++ b/arch/arm/mach-exynos4/irq-eint.c
@@ -23,6 +23,8 @@
 
 #include <mach/regs-gpio.h>
 
+#include <asm/mach/irq.h>
+
 static DEFINE_SPINLOCK(eint_lock);
 
 static unsigned int eint0_15_data[16];
@@ -184,8 +186,11 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
 
 static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_get_chip(irq);
+        chained_irq_enter(chip, desc);
         exynos4_irq_demux_eint(IRQ_EINT(16));
         exynos4_irq_demux_eint(IRQ_EINT(24));
+        chained_irq_exit(chip, desc);
 }
 
 static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
@@ -193,6 +198,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
         u32 *irq_data = irq_get_handler_data(irq);
         struct irq_chip *chip = irq_get_chip(irq);
 
+        chained_irq_enter(chip, desc);
         chip->irq_mask(&desc->irq_data);
 
         if (chip->irq_ack)
@@ -201,6 +207,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
         generic_handle_irq(*irq_data);
 
         chip->irq_unmask(&desc->irq_data);
+        chained_irq_exit(chip, desc);
 }
 
 int __init exynos4_init_irq_eint(void)
diff --git a/arch/arm/mach-exynos4/mach-universal_c210.c b/arch/arm/mach-exynos4/mach-universal_c210.c
index 0e280d12301e..b3b5d8911004 100644
--- a/arch/arm/mach-exynos4/mach-universal_c210.c
+++ b/arch/arm/mach-exynos4/mach-universal_c210.c
@@ -79,7 +79,7 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
 };
 
 static struct regulator_consumer_supply max8952_consumer =
-        REGULATOR_SUPPLY("vddarm", NULL);
+        REGULATOR_SUPPLY("vdd_arm", NULL);
 
 static struct max8952_platform_data universal_max8952_pdata __initdata = {
         .gpio_vid0      = EXYNOS4_GPX0(3),
@@ -105,7 +105,7 @@ static struct max8952_platform_data universal_max8952_pdata __initdata = {
 };
 
 static struct regulator_consumer_supply lp3974_buck1_consumer =
-        REGULATOR_SUPPLY("vddint", NULL);
+        REGULATOR_SUPPLY("vdd_int", NULL);
 
 static struct regulator_consumer_supply lp3974_buck2_consumer =
         REGULATOR_SUPPLY("vddg3d", NULL);
diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c
index 1ae059b7ad7b..ddd86864fb83 100644
--- a/arch/arm/mach-exynos4/mct.c
+++ b/arch/arm/mach-exynos4/mct.c
@@ -132,12 +132,18 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
         return ((cycle_t)hi << 32) | lo;
 }
 
+static void exynos4_frc_resume(struct clocksource *cs)
+{
+        exynos4_mct_frc_start(0, 0);
+}
+
 struct clocksource mct_frc = {
         .name           = "mct-frc",
         .rating         = 400,
         .read           = exynos4_frc_read,
         .mask           = CLOCKSOURCE_MASK(64),
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+        .resume         = exynos4_frc_resume,
 };
 
 static void __init exynos4_clocksource_init(void)
@@ -389,9 +395,11 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt)
 }
 
 /* Setup the local clock events for a CPU */
-void __cpuinit local_timer_setup(struct clock_event_device *evt)
+int __cpuinit local_timer_setup(struct clock_event_device *evt)
 {
         exynos4_mct_tick_init(evt);
+
+        return 0;
 }
 
 int local_timer_ack(void)
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index 7c2282c6ba81..df6ef1b2f98b 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -106,6 +106,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
          */
         spin_lock(&boot_lock);
         spin_unlock(&boot_lock);
+
+        set_cpu_online(cpu, true);
 }
 
 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
diff --git a/arch/arm/mach-exynos4/setup-keypad.c b/arch/arm/mach-exynos4/setup-keypad.c
index 1ee0ebff111f..7862bfb5933d 100644
--- a/arch/arm/mach-exynos4/setup-keypad.c
+++ b/arch/arm/mach-exynos4/setup-keypad.c
@@ -19,15 +19,16 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
 
         if (rows > 8) {
                 /* Set all the necessary GPX2 pins: KP_ROW[0~7] */
-                s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3));
+                s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3),
+                                        S3C_GPIO_PULL_UP);
 
                 /* Set all the necessary GPX3 pins: KP_ROW[8~] */
-                s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8),
-                                         S3C_GPIO_SFN(3));
+                s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
+                                         S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
         } else {
                 /* Set all the necessary GPX2 pins: KP_ROW[x] */
-                s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows,
-                                         S3C_GPIO_SFN(3));
+                s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3),
+                                        S3C_GPIO_PULL_UP);
         }
 
         /* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
diff --git a/arch/arm/mach-exynos4/setup-usb-phy.c b/arch/arm/mach-exynos4/setup-usb-phy.c
index 0883c1b824b9..39aca045f660 100644
--- a/arch/arm/mach-exynos4/setup-usb-phy.c
+++ b/arch/arm/mach-exynos4/setup-usb-phy.c
@@ -82,7 +82,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
 
         rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK);
         writel(rstcon, EXYNOS4_RSTCON);
-        udelay(50);
+        udelay(80);
 
         clk_disable(otg_clk);
         clk_put(otg_clk);