diff options
Diffstat (limited to 'arch/arm/mach-exynos4/clock.c')
-rw-r--r-- | arch/arm/mach-exynos4/clock.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c index 851dea018578..79d6cd0c8e7b 100644 --- a/arch/arm/mach-exynos4/clock.c +++ b/arch/arm/mach-exynos4/clock.c | |||
@@ -520,7 +520,7 @@ static struct clk init_clocks_off[] = { | |||
520 | .ctrlbit = (1 << 21), | 520 | .ctrlbit = (1 << 21), |
521 | }, { | 521 | }, { |
522 | .name = "ac97", | 522 | .name = "ac97", |
523 | .id = -1, | 523 | .devname = "samsung-ac97", |
524 | .enable = exynos4_clk_ip_peril_ctrl, | 524 | .enable = exynos4_clk_ip_peril_ctrl, |
525 | .ctrlbit = (1 << 27), | 525 | .ctrlbit = (1 << 27), |
526 | }, { | 526 | }, { |
@@ -1160,7 +1160,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void) | |||
1160 | 1160 | ||
1161 | vpllsrc = clk_get_rate(&clk_vpllsrc.clk); | 1161 | vpllsrc = clk_get_rate(&clk_vpllsrc.clk); |
1162 | vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), | 1162 | vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), |
1163 | __raw_readl(S5P_VPLL_CON1), pll_4650); | 1163 | __raw_readl(S5P_VPLL_CON1), pll_4650c); |
1164 | 1164 | ||
1165 | clk_fout_apll.ops = &exynos4_fout_apll_ops; | 1165 | clk_fout_apll.ops = &exynos4_fout_apll_ops; |
1166 | clk_fout_mpll.rate = mpll; | 1166 | clk_fout_mpll.rate = mpll; |