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Diffstat (limited to 'arch/arm/mach-exynos4/clock-exynos4210.c')
-rw-r--r--arch/arm/mach-exynos4/clock-exynos4210.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos4/clock-exynos4210.c b/arch/arm/mach-exynos4/clock-exynos4210.c
index fe74b9179fec..b9d5ef670eb4 100644
--- a/arch/arm/mach-exynos4/clock-exynos4210.c
+++ b/arch/arm/mach-exynos4/clock-exynos4210.c
@@ -15,6 +15,7 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/syscore_ops.h>
18 19
19#include <plat/cpu-freq.h> 20#include <plat/cpu-freq.h>
20#include <plat/clock.h> 21#include <plat/clock.h>
@@ -23,12 +24,24 @@
23#include <plat/s5p-clock.h> 24#include <plat/s5p-clock.h>
24#include <plat/clock-clksrc.h> 25#include <plat/clock-clksrc.h>
25#include <plat/exynos4.h> 26#include <plat/exynos4.h>
27#include <plat/pm.h>
26 28
27#include <mach/hardware.h> 29#include <mach/hardware.h>
28#include <mach/map.h> 30#include <mach/map.h>
29#include <mach/regs-clock.h> 31#include <mach/regs-clock.h>
30#include <mach/exynos4-clock.h> 32#include <mach/exynos4-clock.h>
31 33
34static struct sleep_save exynos4210_clock_save[] = {
35 SAVE_ITEM(S5P_CLKSRC_IMAGE),
36 SAVE_ITEM(S5P_CLKSRC_LCD1),
37 SAVE_ITEM(S5P_CLKDIV_IMAGE),
38 SAVE_ITEM(S5P_CLKDIV_LCD1),
39 SAVE_ITEM(S5P_CLKSRC_MASK_LCD1),
40 SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4210),
41 SAVE_ITEM(S5P_CLKGATE_IP_LCD1),
42 SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210),
43};
44
32static struct clksrc_clk *sysclks[] = { 45static struct clksrc_clk *sysclks[] = {
33 /* nothing here yet */ 46 /* nothing here yet */
34}; 47};
@@ -83,6 +96,29 @@ static struct clk init_clocks_off[] = {
83 }, 96 },
84}; 97};
85 98
99#ifdef CONFIG_PM_SLEEP
100static int exynos4210_clock_suspend(void)
101{
102 s3c_pm_do_save(exynos4210_clock_save, ARRAY_SIZE(exynos4210_clock_save));
103
104 return 0;
105}
106
107static void exynos4210_clock_resume(void)
108{
109 s3c_pm_do_restore_core(exynos4210_clock_save, ARRAY_SIZE(exynos4210_clock_save));
110}
111
112#else
113#define exynos4210_clock_suspend NULL
114#define exynos4210_clock_resume NULL
115#endif
116
117struct syscore_ops exynos4210_clock_syscore_ops = {
118 .suspend = exynos4210_clock_suspend,
119 .resume = exynos4210_clock_resume,
120};
121
86void __init exynos4210_register_clocks(void) 122void __init exynos4210_register_clocks(void)
87{ 123{
88 int ptr; 124 int ptr;
@@ -98,4 +134,6 @@ void __init exynos4210_register_clocks(void)
98 134
99 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 135 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
100 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 136 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
137
138 register_syscore_ops(&exynos4210_clock_syscore_ops);
101} 139}