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-rw-r--r--arch/arm/mach-exynos/platsmp.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 60bc45e3e709..683aec786b78 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -24,7 +24,6 @@
24#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
25#include <asm/hardware/gic.h> 25#include <asm/hardware/gic.h>
26#include <asm/smp_scu.h> 26#include <asm/smp_scu.h>
27#include <asm/unified.h>
28 27
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/regs-clock.h> 29#include <mach/regs-clock.h>
@@ -137,7 +136,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
137 while (time_before(jiffies, timeout)) { 136 while (time_before(jiffies, timeout)) {
138 smp_rmb(); 137 smp_rmb();
139 138
140 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), 139 __raw_writel(virt_to_phys(exynos4_secondary_startup),
141 CPU1_BOOT_REG); 140 CPU1_BOOT_REG);
142 gic_raise_softirq(cpumask_of(cpu), 1); 141 gic_raise_softirq(cpumask_of(cpu), 1);
143 142
@@ -192,6 +191,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
192 * until it receives a soft interrupt, and then the 191 * until it receives a soft interrupt, and then the
193 * secondary CPU branches to this address. 192 * secondary CPU branches to this address.
194 */ 193 */
195 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), 194 __raw_writel(virt_to_phys(exynos4_secondary_startup),
196 CPU1_BOOT_REG); 195 CPU1_BOOT_REG);
197} 196}