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-rw-r--r--arch/arm/mach-exynos/platsmp.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 60bc45e3e709..0f2035a1eb6e 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -23,8 +23,8 @@
23 23
24#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
25#include <asm/hardware/gic.h> 25#include <asm/hardware/gic.h>
26#include <asm/smp_plat.h>
26#include <asm/smp_scu.h> 27#include <asm/smp_scu.h>
27#include <asm/unified.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
@@ -137,7 +137,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
137 while (time_before(jiffies, timeout)) { 137 while (time_before(jiffies, timeout)) {
138 smp_rmb(); 138 smp_rmb();
139 139
140 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), 140 __raw_writel(virt_to_phys(exynos4_secondary_startup),
141 CPU1_BOOT_REG); 141 CPU1_BOOT_REG);
142 gic_raise_softirq(cpumask_of(cpu), 1); 142 gic_raise_softirq(cpumask_of(cpu), 1);
143 143
@@ -192,6 +192,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
192 * until it receives a soft interrupt, and then the 192 * until it receives a soft interrupt, and then the
193 * secondary CPU branches to this address. 193 * secondary CPU branches to this address.
194 */ 194 */
195 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), 195 __raw_writel(virt_to_phys(exynos4_secondary_startup),
196 CPU1_BOOT_REG); 196 CPU1_BOOT_REG);
197} 197}