diff options
Diffstat (limited to 'arch/arm/mach-exynos/mct.c')
-rw-r--r-- | arch/arm/mach-exynos/mct.c | 25 |
1 files changed, 5 insertions, 20 deletions
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c index 57668eb68e75..c9d6650f9b5d 100644 --- a/arch/arm/mach-exynos/mct.c +++ b/arch/arm/mach-exynos/mct.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/of.h> | 22 | #include <linux/of.h> |
23 | 23 | ||
24 | #include <asm/arch_timer.h> | 24 | #include <asm/arch_timer.h> |
25 | #include <asm/hardware/gic.h> | ||
26 | #include <asm/localtimer.h> | 25 | #include <asm/localtimer.h> |
27 | 26 | ||
28 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
@@ -255,13 +254,9 @@ static struct irqaction mct_comp_event_irq = { | |||
255 | 254 | ||
256 | static void exynos4_clockevent_init(void) | 255 | static void exynos4_clockevent_init(void) |
257 | { | 256 | { |
258 | clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5); | ||
259 | mct_comp_device.max_delta_ns = | ||
260 | clockevent_delta2ns(0xffffffff, &mct_comp_device); | ||
261 | mct_comp_device.min_delta_ns = | ||
262 | clockevent_delta2ns(0xf, &mct_comp_device); | ||
263 | mct_comp_device.cpumask = cpumask_of(0); | 257 | mct_comp_device.cpumask = cpumask_of(0); |
264 | clockevents_register_device(&mct_comp_device); | 258 | clockevents_config_and_register(&mct_comp_device, clk_rate, |
259 | 0xf, 0xffffffff); | ||
265 | 260 | ||
266 | if (soc_is_exynos5250()) | 261 | if (soc_is_exynos5250()) |
267 | setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq); | 262 | setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq); |
@@ -404,14 +399,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) | |||
404 | evt->set_mode = exynos4_tick_set_mode; | 399 | evt->set_mode = exynos4_tick_set_mode; |
405 | evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; | 400 | evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; |
406 | evt->rating = 450; | 401 | evt->rating = 450; |
407 | 402 | clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1), | |
408 | clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5); | 403 | 0xf, 0x7fffffff); |
409 | evt->max_delta_ns = | ||
410 | clockevent_delta2ns(0x7fffffff, evt); | ||
411 | evt->min_delta_ns = | ||
412 | clockevent_delta2ns(0xf, evt); | ||
413 | |||
414 | clockevents_register_device(evt); | ||
415 | 404 | ||
416 | exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); | 405 | exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); |
417 | 406 | ||
@@ -478,7 +467,7 @@ static void __init exynos4_timer_resources(void) | |||
478 | #endif /* CONFIG_LOCAL_TIMERS */ | 467 | #endif /* CONFIG_LOCAL_TIMERS */ |
479 | } | 468 | } |
480 | 469 | ||
481 | static void __init exynos_timer_init(void) | 470 | void __init exynos4_timer_init(void) |
482 | { | 471 | { |
483 | if (soc_is_exynos5440()) { | 472 | if (soc_is_exynos5440()) { |
484 | arch_timer_of_register(); | 473 | arch_timer_of_register(); |
@@ -494,7 +483,3 @@ static void __init exynos_timer_init(void) | |||
494 | exynos4_clocksource_init(); | 483 | exynos4_clocksource_init(); |
495 | exynos4_clockevent_init(); | 484 | exynos4_clockevent_init(); |
496 | } | 485 | } |
497 | |||
498 | struct sys_timer exynos4_timer = { | ||
499 | .init = exynos_timer_init, | ||
500 | }; | ||