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Diffstat (limited to 'arch/arm/mach-exynos/mach-smdk4x12.c')
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c396
1 files changed, 0 insertions, 396 deletions
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
deleted file mode 100644
index 2c8af9617920..000000000000
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ /dev/null
@@ -1,396 +0,0 @@
1/*
2 * linux/arch/arm/mach-exynos4/mach-smdk4x12.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/gpio.h>
13#include <linux/i2c.h>
14#include <linux/input.h>
15#include <linux/io.h>
16#include <linux/lcd.h>
17#include <linux/mfd/max8997.h>
18#include <linux/mmc/host.h>
19#include <linux/platform_device.h>
20#include <linux/pwm.h>
21#include <linux/pwm_backlight.h>
22#include <linux/regulator/machine.h>
23#include <linux/serial_core.h>
24#include <linux/platform_data/i2c-s3c2410.h>
25#include <linux/platform_data/s3c-hsotg.h>
26
27#include <asm/mach/arch.h>
28#include <asm/mach-types.h>
29
30#include <video/samsung_fimd.h>
31#include <plat/backlight.h>
32#include <plat/clock.h>
33#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/fb.h>
36#include <plat/gpio-cfg.h>
37#include <plat/keypad.h>
38#include <plat/mfc.h>
39#include <plat/regs-serial.h>
40#include <plat/sdhci.h>
41
42#include <mach/irqs.h>
43#include <mach/map.h>
44
45#include <drm/exynos_drm.h>
46#include "common.h"
47
48/* Following are default values for UCON, ULCON and UFCON UART registers */
49#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
50 S3C2410_UCON_RXILEVEL | \
51 S3C2410_UCON_TXIRQMODE | \
52 S3C2410_UCON_RXIRQMODE | \
53 S3C2410_UCON_RXFIFO_TOI | \
54 S3C2443_UCON_RXERR_IRQEN)
55
56#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8
57
58#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
59 S5PV210_UFCON_TXTRIG4 | \
60 S5PV210_UFCON_RXTRIG4)
61
62static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
63 [0] = {
64 .hwport = 0,
65 .flags = 0,
66 .ucon = SMDK4X12_UCON_DEFAULT,
67 .ulcon = SMDK4X12_ULCON_DEFAULT,
68 .ufcon = SMDK4X12_UFCON_DEFAULT,
69 },
70 [1] = {
71 .hwport = 1,
72 .flags = 0,
73 .ucon = SMDK4X12_UCON_DEFAULT,
74 .ulcon = SMDK4X12_ULCON_DEFAULT,
75 .ufcon = SMDK4X12_UFCON_DEFAULT,
76 },
77 [2] = {
78 .hwport = 2,
79 .flags = 0,
80 .ucon = SMDK4X12_UCON_DEFAULT,
81 .ulcon = SMDK4X12_ULCON_DEFAULT,
82 .ufcon = SMDK4X12_UFCON_DEFAULT,
83 },
84 [3] = {
85 .hwport = 3,
86 .flags = 0,
87 .ucon = SMDK4X12_UCON_DEFAULT,
88 .ulcon = SMDK4X12_ULCON_DEFAULT,
89 .ufcon = SMDK4X12_UFCON_DEFAULT,
90 },
91};
92
93static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
94 .cd_type = S3C_SDHCI_CD_INTERNAL,
95#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
96 .max_width = 8,
97 .host_caps = MMC_CAP_8_BIT_DATA,
98#endif
99};
100
101static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
102 .cd_type = S3C_SDHCI_CD_INTERNAL,
103};
104
105static struct regulator_consumer_supply max8997_buck1 =
106 REGULATOR_SUPPLY("vdd_arm", NULL);
107
108static struct regulator_consumer_supply max8997_buck2 =
109 REGULATOR_SUPPLY("vdd_int", NULL);
110
111static struct regulator_consumer_supply max8997_buck3 =
112 REGULATOR_SUPPLY("vdd_g3d", NULL);
113
114static struct regulator_init_data max8997_buck1_data = {
115 .constraints = {
116 .name = "VDD_ARM_SMDK4X12",
117 .min_uV = 925000,
118 .max_uV = 1350000,
119 .always_on = 1,
120 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
121 .state_mem = {
122 .disabled = 1,
123 },
124 },
125 .num_consumer_supplies = 1,
126 .consumer_supplies = &max8997_buck1,
127};
128
129static struct regulator_init_data max8997_buck2_data = {
130 .constraints = {
131 .name = "VDD_INT_SMDK4X12",
132 .min_uV = 950000,
133 .max_uV = 1150000,
134 .always_on = 1,
135 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
136 .state_mem = {
137 .disabled = 1,
138 },
139 },
140 .num_consumer_supplies = 1,
141 .consumer_supplies = &max8997_buck2,
142};
143
144static struct regulator_init_data max8997_buck3_data = {
145 .constraints = {
146 .name = "VDD_G3D_SMDK4X12",
147 .min_uV = 950000,
148 .max_uV = 1150000,
149 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
150 REGULATOR_CHANGE_STATUS,
151 .state_mem = {
152 .disabled = 1,
153 },
154 },
155 .num_consumer_supplies = 1,
156 .consumer_supplies = &max8997_buck3,
157};
158
159static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
160 { MAX8997_BUCK1, &max8997_buck1_data },
161 { MAX8997_BUCK2, &max8997_buck2_data },
162 { MAX8997_BUCK3, &max8997_buck3_data },
163};
164
165static struct max8997_platform_data smdk4x12_max8997_pdata = {
166 .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
167 .regulators = smdk4x12_max8997_regulators,
168
169 .buck1_voltage[0] = 1100000, /* 1.1V */
170 .buck1_voltage[1] = 1100000, /* 1.1V */
171 .buck1_voltage[2] = 1100000, /* 1.1V */
172 .buck1_voltage[3] = 1100000, /* 1.1V */
173 .buck1_voltage[4] = 1100000, /* 1.1V */
174 .buck1_voltage[5] = 1100000, /* 1.1V */
175 .buck1_voltage[6] = 1000000, /* 1.0V */
176 .buck1_voltage[7] = 950000, /* 0.95V */
177
178 .buck2_voltage[0] = 1100000, /* 1.1V */
179 .buck2_voltage[1] = 1000000, /* 1.0V */
180 .buck2_voltage[2] = 950000, /* 0.95V */
181 .buck2_voltage[3] = 900000, /* 0.9V */
182 .buck2_voltage[4] = 1100000, /* 1.1V */
183 .buck2_voltage[5] = 1000000, /* 1.0V */
184 .buck2_voltage[6] = 950000, /* 0.95V */
185 .buck2_voltage[7] = 900000, /* 0.9V */
186
187 .buck5_voltage[0] = 1100000, /* 1.1V */
188 .buck5_voltage[1] = 1100000, /* 1.1V */
189 .buck5_voltage[2] = 1100000, /* 1.1V */
190 .buck5_voltage[3] = 1100000, /* 1.1V */
191 .buck5_voltage[4] = 1100000, /* 1.1V */
192 .buck5_voltage[5] = 1100000, /* 1.1V */
193 .buck5_voltage[6] = 1100000, /* 1.1V */
194 .buck5_voltage[7] = 1100000, /* 1.1V */
195};
196
197static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
198 {
199 I2C_BOARD_INFO("max8997", 0x66),
200 .platform_data = &smdk4x12_max8997_pdata,
201 }
202};
203
204static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
205 { I2C_BOARD_INFO("wm8994", 0x1a), }
206};
207
208static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
209 /* nothing here yet */
210};
211
212static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
213 /* nothing here yet */
214};
215
216static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
217 .no = EXYNOS4_GPD0(1),
218 .func = S3C_GPIO_SFN(2),
219};
220
221static struct platform_pwm_backlight_data smdk4x12_bl_data = {
222 .pwm_id = 1,
223 .pwm_period_ns = 1000,
224};
225
226static struct pwm_lookup smdk4x12_pwm_lookup[] = {
227 PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
228};
229
230static uint32_t smdk4x12_keymap[] __initdata = {
231 /* KEY(row, col, keycode) */
232 KEY(1, 3, KEY_1), KEY(1, 4, KEY_2), KEY(1, 5, KEY_3),
233 KEY(1, 6, KEY_4), KEY(1, 7, KEY_5),
234 KEY(2, 5, KEY_D), KEY(2, 6, KEY_A), KEY(2, 7, KEY_B),
235 KEY(0, 7, KEY_E), KEY(0, 5, KEY_C)
236};
237
238static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
239 .keymap = smdk4x12_keymap,
240 .keymap_size = ARRAY_SIZE(smdk4x12_keymap),
241};
242
243static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
244 .keymap_data = &smdk4x12_keymap_data,
245 .rows = 3,
246 .cols = 8,
247};
248
249#ifdef CONFIG_DRM_EXYNOS_FIMD
250static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
251 .panel = {
252 .timing = {
253 .left_margin = 8,
254 .right_margin = 8,
255 .upper_margin = 6,
256 .lower_margin = 6,
257 .hsync_len = 6,
258 .vsync_len = 4,
259 .xres = 480,
260 .yres = 800,
261 },
262 },
263 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
264 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
265 .default_win = 0,
266 .bpp = 32,
267};
268#else
269static struct s3c_fb_pd_win smdk4x12_fb_win0 = {
270 .xres = 480,
271 .yres = 800,
272 .virtual_x = 480,
273 .virtual_y = 800 * 2,
274 .max_bpp = 32,
275 .default_bpp = 24,
276};
277
278static struct fb_videomode smdk4x12_lcd_timing = {
279 .left_margin = 8,
280 .right_margin = 8,
281 .upper_margin = 6,
282 .lower_margin = 6,
283 .hsync_len = 6,
284 .vsync_len = 4,
285 .xres = 480,
286 .yres = 800,
287};
288
289static struct s3c_fb_platdata smdk4x12_lcd_pdata __initdata = {
290 .win[0] = &smdk4x12_fb_win0,
291 .vtiming = &smdk4x12_lcd_timing,
292 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
293 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
294 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
295};
296#endif
297
298/* USB OTG */
299static struct s3c_hsotg_plat smdk4x12_hsotg_pdata;
300
301static struct platform_device *smdk4x12_devices[] __initdata = {
302 &s3c_device_hsmmc2,
303 &s3c_device_hsmmc3,
304 &s3c_device_i2c0,
305 &s3c_device_i2c1,
306 &s3c_device_i2c3,
307 &s3c_device_i2c7,
308 &s3c_device_rtc,
309 &s3c_device_usb_hsotg,
310 &s3c_device_wdt,
311 &s5p_device_fimc0,
312 &s5p_device_fimc1,
313 &s5p_device_fimc2,
314 &s5p_device_fimc3,
315 &s5p_device_fimc_md,
316 &s5p_device_fimd0,
317 &s5p_device_mfc,
318 &s5p_device_mfc_l,
319 &s5p_device_mfc_r,
320 &samsung_device_keypad,
321};
322
323static void __init smdk4x12_map_io(void)
324{
325 exynos_init_io(NULL, 0);
326 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
327}
328
329static void __init smdk4x12_reserve(void)
330{
331 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
332}
333
334static void __init smdk4x12_machine_init(void)
335{
336 s3c_i2c0_set_platdata(NULL);
337 i2c_register_board_info(0, smdk4x12_i2c_devs0,
338 ARRAY_SIZE(smdk4x12_i2c_devs0));
339
340 s3c_i2c1_set_platdata(NULL);
341 i2c_register_board_info(1, smdk4x12_i2c_devs1,
342 ARRAY_SIZE(smdk4x12_i2c_devs1));
343
344 s3c_i2c3_set_platdata(NULL);
345 i2c_register_board_info(3, smdk4x12_i2c_devs3,
346 ARRAY_SIZE(smdk4x12_i2c_devs3));
347
348 s3c_i2c7_set_platdata(NULL);
349 i2c_register_board_info(7, smdk4x12_i2c_devs7,
350 ARRAY_SIZE(smdk4x12_i2c_devs7));
351
352 samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
353 pwm_add_table(smdk4x12_pwm_lookup, ARRAY_SIZE(smdk4x12_pwm_lookup));
354
355 samsung_keypad_set_platdata(&smdk4x12_keypad_data);
356
357 s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
358 s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
359
360 s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
361
362#ifdef CONFIG_DRM_EXYNOS_FIMD
363 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
364 exynos4_fimd0_gpio_setup_24bpp();
365#else
366 s5p_fimd0_set_platdata(&smdk4x12_lcd_pdata);
367#endif
368
369 platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
370}
371
372MACHINE_START(SMDK4212, "SMDK4212")
373 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
374 .atag_offset = 0x100,
375 .smp = smp_ops(exynos_smp_ops),
376 .init_irq = exynos4_init_irq,
377 .map_io = smdk4x12_map_io,
378 .init_machine = smdk4x12_machine_init,
379 .init_time = exynos_init_time,
380 .restart = exynos4_restart,
381 .reserve = &smdk4x12_reserve,
382MACHINE_END
383
384MACHINE_START(SMDK4412, "SMDK4412")
385 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
386 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
387 .atag_offset = 0x100,
388 .smp = smp_ops(exynos_smp_ops),
389 .init_irq = exynos4_init_irq,
390 .map_io = smdk4x12_map_io,
391 .init_machine = smdk4x12_machine_init,
392 .init_late = exynos_init_late,
393 .init_time = exynos_init_time,
394 .restart = exynos4_restart,
395 .reserve = &smdk4x12_reserve,
396MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-11 06:06:49 -0500