diff options
Diffstat (limited to 'arch/arm/mach-exynos/mach-smdk4x12.c')
-rw-r--r-- | arch/arm/mach-exynos/mach-smdk4x12.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index fcf2e0e23d53..d00e4f016a68 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c | |||
@@ -21,13 +21,13 @@ | |||
21 | #include <linux/serial_core.h> | 21 | #include <linux/serial_core.h> |
22 | 22 | ||
23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
24 | #include <asm/hardware/gic.h> | ||
24 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
25 | 26 | ||
26 | #include <plat/backlight.h> | 27 | #include <plat/backlight.h> |
27 | #include <plat/clock.h> | 28 | #include <plat/clock.h> |
28 | #include <plat/cpu.h> | 29 | #include <plat/cpu.h> |
29 | #include <plat/devs.h> | 30 | #include <plat/devs.h> |
30 | #include <plat/exynos4.h> | ||
31 | #include <plat/gpio-cfg.h> | 31 | #include <plat/gpio-cfg.h> |
32 | #include <plat/iic.h> | 32 | #include <plat/iic.h> |
33 | #include <plat/keypad.h> | 33 | #include <plat/keypad.h> |
@@ -36,6 +36,8 @@ | |||
36 | 36 | ||
37 | #include <mach/map.h> | 37 | #include <mach/map.h> |
38 | 38 | ||
39 | #include "common.h" | ||
40 | |||
39 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 41 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
40 | #define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 42 | #define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
41 | S3C2410_UCON_RXILEVEL | \ | 43 | S3C2410_UCON_RXILEVEL | \ |
@@ -249,7 +251,7 @@ static void __init smdk4x12_map_io(void) | |||
249 | { | 251 | { |
250 | clk_xusbxti.rate = 24000000; | 252 | clk_xusbxti.rate = 24000000; |
251 | 253 | ||
252 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 254 | exynos_init_io(NULL, 0); |
253 | s3c24xx_init_clocks(clk_xusbxti.rate); | 255 | s3c24xx_init_clocks(clk_xusbxti.rate); |
254 | s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); | 256 | s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); |
255 | } | 257 | } |
@@ -287,8 +289,10 @@ MACHINE_START(SMDK4212, "SMDK4212") | |||
287 | .atag_offset = 0x100, | 289 | .atag_offset = 0x100, |
288 | .init_irq = exynos4_init_irq, | 290 | .init_irq = exynos4_init_irq, |
289 | .map_io = smdk4x12_map_io, | 291 | .map_io = smdk4x12_map_io, |
292 | .handle_irq = gic_handle_irq, | ||
290 | .init_machine = smdk4x12_machine_init, | 293 | .init_machine = smdk4x12_machine_init, |
291 | .timer = &exynos4_timer, | 294 | .timer = &exynos4_timer, |
295 | .restart = exynos4_restart, | ||
292 | MACHINE_END | 296 | MACHINE_END |
293 | 297 | ||
294 | MACHINE_START(SMDK4412, "SMDK4412") | 298 | MACHINE_START(SMDK4412, "SMDK4412") |
@@ -297,6 +301,8 @@ MACHINE_START(SMDK4412, "SMDK4412") | |||
297 | .atag_offset = 0x100, | 301 | .atag_offset = 0x100, |
298 | .init_irq = exynos4_init_irq, | 302 | .init_irq = exynos4_init_irq, |
299 | .map_io = smdk4x12_map_io, | 303 | .map_io = smdk4x12_map_io, |
304 | .handle_irq = gic_handle_irq, | ||
300 | .init_machine = smdk4x12_machine_init, | 305 | .init_machine = smdk4x12_machine_init, |
301 | .timer = &exynos4_timer, | 306 | .timer = &exynos4_timer, |
307 | .restart = exynos4_restart, | ||
302 | MACHINE_END | 308 | MACHINE_END |