diff options
Diffstat (limited to 'arch/arm/mach-exynos/mach-origen.c')
-rw-r--r-- | arch/arm/mach-exynos/mach-origen.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 5561b06c38ec..586eb995aa96 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -29,7 +29,6 @@ | |||
29 | 29 | ||
30 | #include <plat/regs-serial.h> | 30 | #include <plat/regs-serial.h> |
31 | #include <plat/regs-fb-v4.h> | 31 | #include <plat/regs-fb-v4.h> |
32 | #include <plat/exynos4.h> | ||
33 | #include <plat/cpu.h> | 32 | #include <plat/cpu.h> |
34 | #include <plat/devs.h> | 33 | #include <plat/devs.h> |
35 | #include <plat/sdhci.h> | 34 | #include <plat/sdhci.h> |
@@ -44,6 +43,8 @@ | |||
44 | 43 | ||
45 | #include <mach/map.h> | 44 | #include <mach/map.h> |
46 | 45 | ||
46 | #include "common.h" | ||
47 | |||
47 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 48 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
48 | #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 49 | #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
49 | S3C2410_UCON_RXILEVEL | \ | 50 | S3C2410_UCON_RXILEVEL | \ |
@@ -639,7 +640,7 @@ static void s5p_tv_setup(void) | |||
639 | 640 | ||
640 | static void __init origen_map_io(void) | 641 | static void __init origen_map_io(void) |
641 | { | 642 | { |
642 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 643 | exynos_init_io(NULL, 0); |
643 | s3c24xx_init_clocks(24000000); | 644 | s3c24xx_init_clocks(24000000); |
644 | s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); | 645 | s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); |
645 | } | 646 | } |
@@ -699,4 +700,5 @@ MACHINE_START(ORIGEN, "ORIGEN") | |||
699 | .init_machine = origen_machine_init, | 700 | .init_machine = origen_machine_init, |
700 | .timer = &exynos4_timer, | 701 | .timer = &exynos4_timer, |
701 | .reserve = &origen_reserve, | 702 | .reserve = &origen_reserve, |
703 | .restart = exynos4_restart, | ||
702 | MACHINE_END | 704 | MACHINE_END |