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-rw-r--r--arch/arm/mach-ep93xx/Kconfig25
-rw-r--r--arch/arm/mach-ep93xx/Makefile1
-rw-r--r--arch/arm/mach-ep93xx/clock.c6
-rw-r--r--arch/arm/mach-ep93xx/core.c115
-rw-r--r--arch/arm/mach-ep93xx/micro9.c157
5 files changed, 263 insertions, 41 deletions
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index af7904b3d0a8..575a21dabd2f 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -51,6 +51,31 @@ config MACH_GESBC9312
51 Say 'Y' here if you want your kernel to support the Glomation 51 Say 'Y' here if you want your kernel to support the Glomation
52 GESBC-9312-sx board. 52 GESBC-9312-sx board.
53 53
54config MACH_MICRO9
55 bool
56 default n
57
58config MACH_MICRO9H
59 bool "Support Contec Hypercontrol Micro9-H"
60 select MACH_MICRO9
61 help
62 Say 'Y' here if you want your kernel to support the
63 Contec Hypercontrol Micro9-H board.
64
65config MACH_MICRO9M
66 bool "Support Contec Hypercontrol Micro9-M"
67 select MACH_MICRO9
68 help
69 Say 'Y' here if you want your kernel to support the
70 Contec Hypercontrol Micro9-M board.
71
72config MACH_MICRO9L
73 bool "Support Contec Hypercontrol Micro9-L"
74 select MACH_MICRO9
75 help
76 Say 'Y' here if you want your kernel to support the
77 Contec Hypercontrol Micro9-L board.
78
54config MACH_TS72XX 79config MACH_TS72XX
55 bool "Support Technologic Systems TS-72xx SBC" 80 bool "Support Technologic Systems TS-72xx SBC"
56 help 81 help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index b06641dd450d..0d3bf932654e 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -13,4 +13,5 @@ obj-$(CONFIG_MACH_EDB9312) += edb9312.o
13obj-$(CONFIG_MACH_EDB9315) += edb9315.o 13obj-$(CONFIG_MACH_EDB9315) += edb9315.o
14obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o 14obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o
15obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o 15obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
16obj-$(CONFIG_MACH_MICRO9) += micro9.o
16obj-$(CONFIG_MACH_TS72XX) += ts72xx.o 17obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 08ad782c1649..f174d1a3b11c 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/module.h>
16#include <linux/string.h> 17#include <linux/string.h>
17#include <asm/div64.h> 18#include <asm/div64.h>
18#include <asm/hardware.h> 19#include <asm/hardware.h>
@@ -124,7 +125,7 @@ static unsigned long calc_pll_rate(u32 config_word)
124 return (unsigned long)rate; 125 return (unsigned long)rate;
125} 126}
126 127
127void ep93xx_clock_init(void) 128static int __init ep93xx_clock_init(void)
128{ 129{
129 u32 value; 130 u32 value;
130 131
@@ -153,4 +154,7 @@ void ep93xx_clock_init(void)
153 printk(KERN_INFO "ep93xx: FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n", 154 printk(KERN_INFO "ep93xx: FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n",
154 clk_f.rate / 1000000, clk_h.rate / 1000000, 155 clk_f.rate / 1000000, clk_h.rate / 1000000,
155 clk_p.rate / 1000000); 156 clk_p.rate / 1000000);
157
158 return 0;
156} 159}
160arch_initcall(ep93xx_clock_init);
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 6b26346191c0..829aed696d98 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -152,22 +152,30 @@ struct sys_timer ep93xx_timer = {
152/************************************************************************* 152/*************************************************************************
153 * GPIO handling for EP93xx 153 * GPIO handling for EP93xx
154 *************************************************************************/ 154 *************************************************************************/
155static unsigned char gpio_int_enable[2]; 155static unsigned char gpio_int_unmasked[3];
156static unsigned char gpio_int_type1[2]; 156static unsigned char gpio_int_enabled[3];
157static unsigned char gpio_int_type2[2]; 157static unsigned char gpio_int_type1[3];
158static unsigned char gpio_int_type2[3];
158 159
159static void update_gpio_ab_int_params(int port) 160static void update_gpio_int_params(int abf)
160{ 161{
161 if (port == 0) { 162 if (abf == 0) {
162 __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE); 163 __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE);
163 __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2); 164 __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2);
164 __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1); 165 __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1);
165 __raw_writeb(gpio_int_enable[0], EP93XX_GPIO_A_INT_ENABLE); 166 __raw_writeb(gpio_int_unmasked[0] & gpio_int_enabled[0], EP93XX_GPIO_A_INT_ENABLE);
166 } else if (port == 1) { 167 } else if (abf == 1) {
167 __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE); 168 __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE);
168 __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2); 169 __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2);
169 __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1); 170 __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1);
170 __raw_writeb(gpio_int_enable[1], EP93XX_GPIO_B_INT_ENABLE); 171 __raw_writeb(gpio_int_unmasked[1] & gpio_int_enabled[1], EP93XX_GPIO_B_INT_ENABLE);
172 } else if (abf == 2) {
173 __raw_writeb(0, EP93XX_GPIO_F_INT_ENABLE);
174 __raw_writeb(gpio_int_type2[2], EP93XX_GPIO_F_INT_TYPE2);
175 __raw_writeb(gpio_int_type1[2], EP93XX_GPIO_F_INT_TYPE1);
176 __raw_writeb(gpio_int_unmasked[2] & gpio_int_enabled[2], EP93XX_GPIO_F_INT_ENABLE);
177 } else {
178 BUG();
171 } 179 }
172} 180}
173 181
@@ -192,8 +200,13 @@ void gpio_line_config(int line, int direction)
192 local_irq_save(flags); 200 local_irq_save(flags);
193 if (direction == GPIO_OUT) { 201 if (direction == GPIO_OUT) {
194 if (line >= 0 && line < 16) { 202 if (line >= 0 && line < 16) {
195 gpio_int_enable[line >> 3] &= ~(1 << (line & 7)); 203 /* Port A/B. */
196 update_gpio_ab_int_params(line >> 3); 204 gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
205 update_gpio_int_params(line >> 3);
206 } else if (line >= 40 && line < 48) {
207 /* Port F. */
208 gpio_int_unmasked[2] &= ~(1 << (line & 7));
209 update_gpio_int_params(2);
197 } 210 }
198 211
199 v = __raw_readb(data_direction_register); 212 v = __raw_readb(data_direction_register);
@@ -244,8 +257,7 @@ EXPORT_SYMBOL(gpio_line_set);
244/************************************************************************* 257/*************************************************************************
245 * EP93xx IRQ handling 258 * EP93xx IRQ handling
246 *************************************************************************/ 259 *************************************************************************/
247static void ep93xx_gpio_ab_irq_handler(unsigned int irq, 260static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
248 struct irq_desc *desc)
249{ 261{
250 unsigned char status; 262 unsigned char status;
251 int i; 263 int i;
@@ -267,37 +279,46 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
267 } 279 }
268} 280}
269 281
270static void ep93xx_gpio_ab_irq_mask_ack(unsigned int irq) 282static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
283{
284 int gpio_irq = IRQ_EP93XX_GPIO(16) + (((irq + 1) & 7) ^ 4);
285
286 desc_handle_irq(gpio_irq, irq_desc + gpio_irq);
287}
288
289static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
271{ 290{
272 int line = irq - IRQ_EP93XX_GPIO(0); 291 int line = irq - IRQ_EP93XX_GPIO(0);
273 int port = line >> 3; 292 int port = line >> 3;
274 293
275 gpio_int_enable[port] &= ~(1 << (line & 7)); 294 gpio_int_unmasked[port] &= ~(1 << (line & 7));
276 update_gpio_ab_int_params(port); 295 update_gpio_int_params(port);
277 296
278 if (line >> 3) { 297 if (port == 0) {
279 __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK);
280 } else {
281 __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK); 298 __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK);
299 } else if (port == 1) {
300 __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK);
301 } else if (port == 2) {
302 __raw_writel(1 << (line & 7), EP93XX_GPIO_F_INT_ACK);
282 } 303 }
283} 304}
284 305
285static void ep93xx_gpio_ab_irq_mask(unsigned int irq) 306static void ep93xx_gpio_irq_mask(unsigned int irq)
286{ 307{
287 int line = irq - IRQ_EP93XX_GPIO(0); 308 int line = irq - IRQ_EP93XX_GPIO(0);
288 int port = line >> 3; 309 int port = line >> 3;
289 310
290 gpio_int_enable[port] &= ~(1 << (line & 7)); 311 gpio_int_unmasked[port] &= ~(1 << (line & 7));
291 update_gpio_ab_int_params(port); 312 update_gpio_int_params(port);
292} 313}
293 314
294static void ep93xx_gpio_ab_irq_unmask(unsigned int irq) 315static void ep93xx_gpio_irq_unmask(unsigned int irq)
295{ 316{
296 int line = irq - IRQ_EP93XX_GPIO(0); 317 int line = irq - IRQ_EP93XX_GPIO(0);
297 int port = line >> 3; 318 int port = line >> 3;
298 319
299 gpio_int_enable[port] |= 1 << (line & 7); 320 gpio_int_unmasked[port] |= 1 << (line & 7);
300 update_gpio_ab_int_params(port); 321 update_gpio_int_params(port);
301} 322}
302 323
303 324
@@ -306,40 +327,51 @@ static void ep93xx_gpio_ab_irq_unmask(unsigned int irq)
306 * edge (1) triggered, while gpio_int_type2 controls whether it 327 * edge (1) triggered, while gpio_int_type2 controls whether it
307 * triggers on low/falling (0) or high/rising (1). 328 * triggers on low/falling (0) or high/rising (1).
308 */ 329 */
309static int ep93xx_gpio_ab_irq_type(unsigned int irq, unsigned int type) 330static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
310{ 331{
311 int port; 332 int port;
312 int line; 333 int line;
313 334
314 line = irq - IRQ_EP93XX_GPIO(0); 335 line = irq - IRQ_EP93XX_GPIO(0);
315 gpio_line_config(line, GPIO_IN); 336 if (line >= 0 && line < 16) {
337 gpio_line_config(line, GPIO_IN);
338 } else {
339 gpio_line_config(EP93XX_GPIO_LINE_F(line), GPIO_IN);
340 }
316 341
317 port = line >> 3; 342 port = line >> 3;
318 line &= 7; 343 line &= 7;
319 344
320 if (type & IRQT_RISING) { 345 if (type & IRQT_RISING) {
346 gpio_int_enabled[port] |= 1 << line;
321 gpio_int_type1[port] |= 1 << line; 347 gpio_int_type1[port] |= 1 << line;
322 gpio_int_type2[port] |= 1 << line; 348 gpio_int_type2[port] |= 1 << line;
323 } else if (type & IRQT_FALLING) { 349 } else if (type & IRQT_FALLING) {
350 gpio_int_enabled[port] |= 1 << line;
324 gpio_int_type1[port] |= 1 << line; 351 gpio_int_type1[port] |= 1 << line;
325 gpio_int_type2[port] &= ~(1 << line); 352 gpio_int_type2[port] &= ~(1 << line);
326 } else if (type & IRQT_HIGH) { 353 } else if (type & IRQT_HIGH) {
354 gpio_int_enabled[port] |= 1 << line;
327 gpio_int_type1[port] &= ~(1 << line); 355 gpio_int_type1[port] &= ~(1 << line);
328 gpio_int_type2[port] |= 1 << line; 356 gpio_int_type2[port] |= 1 << line;
329 } else if (type & IRQT_LOW) { 357 } else if (type & IRQT_LOW) {
358 gpio_int_enabled[port] |= 1 << line;
330 gpio_int_type1[port] &= ~(1 << line); 359 gpio_int_type1[port] &= ~(1 << line);
331 gpio_int_type2[port] &= ~(1 << line); 360 gpio_int_type2[port] &= ~(1 << line);
361 } else {
362 gpio_int_enabled[port] &= ~(1 << line);
332 } 363 }
333 update_gpio_ab_int_params(port); 364 update_gpio_int_params(port);
334 365
335 return 0; 366 return 0;
336} 367}
337 368
338static struct irq_chip ep93xx_gpio_ab_irq_chip = { 369static struct irq_chip ep93xx_gpio_irq_chip = {
339 .ack = ep93xx_gpio_ab_irq_mask_ack, 370 .name = "GPIO",
340 .mask = ep93xx_gpio_ab_irq_mask, 371 .ack = ep93xx_gpio_irq_mask_ack,
341 .unmask = ep93xx_gpio_ab_irq_unmask, 372 .mask = ep93xx_gpio_irq_mask,
342 .set_type = ep93xx_gpio_ab_irq_type, 373 .unmask = ep93xx_gpio_irq_unmask,
374 .set_type = ep93xx_gpio_irq_type,
343}; 375};
344 376
345 377
@@ -350,12 +382,21 @@ void __init ep93xx_init_irq(void)
350 vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK); 382 vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
351 vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK); 383 vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
352 384
353 for (irq = IRQ_EP93XX_GPIO(0) ; irq <= IRQ_EP93XX_GPIO(15); irq++) { 385 for (irq = IRQ_EP93XX_GPIO(0); irq <= IRQ_EP93XX_GPIO(23); irq++) {
354 set_irq_chip(irq, &ep93xx_gpio_ab_irq_chip); 386 set_irq_chip(irq, &ep93xx_gpio_irq_chip);
355 set_irq_handler(irq, handle_level_irq); 387 set_irq_handler(irq, handle_level_irq);
356 set_irq_flags(irq, IRQF_VALID); 388 set_irq_flags(irq, IRQF_VALID);
357 } 389 }
390
358 set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); 391 set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler);
392 set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler);
393 set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler);
394 set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler);
395 set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler);
396 set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler);
397 set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler);
398 set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler);
399 set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler);
359} 400}
360 401
361 402
@@ -461,8 +502,6 @@ void __init ep93xx_init_devices(void)
461{ 502{
462 unsigned int v; 503 unsigned int v;
463 504
464 ep93xx_clock_init();
465
466 /* 505 /*
467 * Disallow access to MaverickCrunch initially. 506 * Disallow access to MaverickCrunch initially.
468 */ 507 */
@@ -477,8 +516,4 @@ void __init ep93xx_init_devices(void)
477 516
478 platform_device_register(&ep93xx_rtc_device); 517 platform_device_register(&ep93xx_rtc_device);
479 platform_device_register(&ep93xx_ohci_device); 518 platform_device_register(&ep93xx_ohci_device);
480
481#ifdef CONFIG_CRUNCH
482 elf_hwcap |= HWCAP_CRUNCH;
483#endif
484} 519}
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
new file mode 100644
index 000000000000..f28c1294cae1
--- /dev/null
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -0,0 +1,157 @@
1/*
2 * linux/arch/arm/mach-ep93xx/micro9.c
3 *
4 * Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH
5 * Manfred Gruber <manfred.gruber@contec.at>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/ioport.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/platform_device.h>
18#include <linux/sched.h>
19
20#include <linux/mtd/physmap.h>
21
22#include <asm/io.h>
23#include <asm/hardware.h>
24
25#include <asm/mach/arch.h>
26#include <asm/mach-types.h>
27
28static struct ep93xx_eth_data micro9_eth_data = {
29 .phy_id = 0x1f,
30};
31
32static struct resource micro9_eth_resource[] = {
33 {
34 .start = EP93XX_ETHERNET_PHYS_BASE,
35 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
36 .flags = IORESOURCE_MEM,
37 }, {
38 .start = IRQ_EP93XX_ETHERNET,
39 .end = IRQ_EP93XX_ETHERNET,
40 .flags = IORESOURCE_IRQ,
41 }
42};
43
44static struct platform_device micro9_eth_device = {
45 .name = "ep93xx-eth",
46 .id = -1,
47 .dev = {
48 .platform_data = &micro9_eth_data,
49 },
50 .num_resources = ARRAY_SIZE(micro9_eth_resource),
51 .resource = micro9_eth_resource,
52};
53
54static void __init micro9_eth_init(void)
55{
56 memcpy(micro9_eth_data.dev_addr,
57 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
58 platform_device_register(&micro9_eth_device);
59}
60
61static void __init micro9_init(void)
62{
63 micro9_eth_init();
64}
65
66/*
67 * Micro9-H
68 */
69#ifdef CONFIG_MACH_MICRO9H
70static struct physmap_flash_data micro9h_flash_data = {
71 .width = 4,
72};
73
74static struct resource micro9h_flash_resource = {
75 .start = 0x10000000,
76 .end = 0x13ffffff,
77 .flags = IORESOURCE_MEM,
78};
79
80static struct platform_device micro9h_flash = {
81 .name = "physmap-flash",
82 .id = 0,
83 .dev = {
84 .platform_data = &micro9h_flash_data,
85 },
86 .num_resources = 1,
87 .resource = &micro9h_flash_resource,
88};
89
90static void __init micro9h_init(void)
91{
92 platform_device_register(&micro9h_flash);
93}
94
95static void __init micro9h_init_machine(void)
96{
97 ep93xx_init_devices();
98 micro9_init();
99 micro9h_init();
100}
101
102MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H")
103 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
104 .phys_io = EP93XX_APB_PHYS_BASE,
105 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
106 .boot_params = 0x00000100,
107 .map_io = ep93xx_map_io,
108 .init_irq = ep93xx_init_irq,
109 .timer = &ep93xx_timer,
110 .init_machine = micro9h_init_machine,
111MACHINE_END
112#endif
113
114/*
115 * Micro9-M
116 */
117#ifdef CONFIG_MACH_MICRO9M
118static void __init micro9m_init_machine(void)
119{
120 ep93xx_init_devices();
121 micro9_init();
122}
123
124MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M")
125 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
126 .phys_io = EP93XX_APB_PHYS_BASE,
127 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
128 .boot_params = 0x00000100,
129 .map_io = ep93xx_map_io,
130 .init_irq = ep93xx_init_irq,
131 .timer = &ep93xx_timer,
132 .init_machine = micro9m_init_machine,
133MACHINE_END
134#endif
135
136/*
137 * Micro9-L
138 */
139#ifdef CONFIG_MACH_MICRO9L
140static void __init micro9l_init_machine(void)
141{
142 ep93xx_init_devices();
143 micro9_init();
144}
145
146MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L")
147 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
148 .phys_io = EP93XX_APB_PHYS_BASE,
149 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
150 .boot_params = 0x00000100,
151 .map_io = ep93xx_map_io,
152 .init_irq = ep93xx_init_irq,
153 .timer = &ep93xx_timer,
154 .init_machine = micro9l_init_machine,
155MACHINE_END
156#endif
157