diff options
Diffstat (limited to 'arch/arm/mach-ep93xx')
-rw-r--r-- | arch/arm/mach-ep93xx/Kconfig | 21 | ||||
-rw-r--r-- | arch/arm/mach-ep93xx/Makefile | 10 | ||||
-rw-r--r-- | arch/arm/mach-ep93xx/Makefile.boot | 2 | ||||
-rw-r--r-- | arch/arm/mach-ep93xx/core.c | 374 | ||||
-rw-r--r-- | arch/arm/mach-ep93xx/gesbc9312.c | 40 | ||||
-rw-r--r-- | arch/arm/mach-ep93xx/ts72xx.c | 118 |
6 files changed, 565 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig new file mode 100644 index 000000000000..cec5a21ca4e3 --- /dev/null +++ b/arch/arm/mach-ep93xx/Kconfig | |||
@@ -0,0 +1,21 @@ | |||
1 | if ARCH_EP93XX | ||
2 | |||
3 | menu "Cirrus EP93xx Implementation Options" | ||
4 | |||
5 | comment "EP93xx Platforms" | ||
6 | |||
7 | config MACH_GESBC9312 | ||
8 | bool "Support Glomation GESBC-9312-sx" | ||
9 | help | ||
10 | Say 'Y' here if you want your kernel to support the Glomation | ||
11 | GESBC-9312-sx board. | ||
12 | |||
13 | config MACH_TS72XX | ||
14 | bool "Support Technologic Systems TS-72xx SBC" | ||
15 | help | ||
16 | Say 'Y' here if you want your kernel to support the | ||
17 | Technologic Systems TS-72xx board. | ||
18 | |||
19 | endmenu | ||
20 | |||
21 | endif | ||
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile new file mode 100644 index 000000000000..5393af989e94 --- /dev/null +++ b/arch/arm/mach-ep93xx/Makefile | |||
@@ -0,0 +1,10 @@ | |||
1 | # | ||
2 | # Makefile for the linux kernel. | ||
3 | # | ||
4 | obj-y := core.o | ||
5 | obj-m := | ||
6 | obj-n := | ||
7 | obj- := | ||
8 | |||
9 | obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o | ||
10 | obj-$(CONFIG_MACH_TS72XX) += ts72xx.o | ||
diff --git a/arch/arm/mach-ep93xx/Makefile.boot b/arch/arm/mach-ep93xx/Makefile.boot new file mode 100644 index 000000000000..d5561ad15bad --- /dev/null +++ b/arch/arm/mach-ep93xx/Makefile.boot | |||
@@ -0,0 +1,2 @@ | |||
1 | zreladdr-y := 0x00008000 | ||
2 | params_phys-y := 0x00000100 | ||
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c new file mode 100644 index 000000000000..865427bfad7e --- /dev/null +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -0,0 +1,374 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/core.c | ||
3 | * Core routines for Cirrus EP93xx chips. | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * Thanks go to Michael Burian and Ray Lehtiniemi for their key | ||
8 | * role in the ep93xx linux community. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or (at | ||
13 | * your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/config.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/spinlock.h> | ||
20 | #include <linux/sched.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/serial.h> | ||
23 | #include <linux/tty.h> | ||
24 | #include <linux/bitops.h> | ||
25 | #include <linux/serial.h> | ||
26 | #include <linux/serial_8250.h> | ||
27 | #include <linux/serial_core.h> | ||
28 | #include <linux/device.h> | ||
29 | #include <linux/mm.h> | ||
30 | #include <linux/time.h> | ||
31 | #include <linux/timex.h> | ||
32 | #include <linux/delay.h> | ||
33 | #include <linux/amba/bus.h> | ||
34 | |||
35 | #include <asm/types.h> | ||
36 | #include <asm/setup.h> | ||
37 | #include <asm/memory.h> | ||
38 | #include <asm/hardware.h> | ||
39 | #include <asm/irq.h> | ||
40 | #include <asm/system.h> | ||
41 | #include <asm/tlbflush.h> | ||
42 | #include <asm/pgtable.h> | ||
43 | #include <asm/io.h> | ||
44 | |||
45 | #include <asm/mach/map.h> | ||
46 | #include <asm/mach/time.h> | ||
47 | #include <asm/mach/irq.h> | ||
48 | #include <asm/arch/gpio.h> | ||
49 | |||
50 | #include <asm/hardware/vic.h> | ||
51 | |||
52 | |||
53 | /************************************************************************* | ||
54 | * Static I/O mappings that are needed for all EP93xx platforms | ||
55 | *************************************************************************/ | ||
56 | static struct map_desc ep93xx_io_desc[] __initdata = { | ||
57 | { | ||
58 | .virtual = EP93XX_AHB_VIRT_BASE, | ||
59 | .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE), | ||
60 | .length = EP93XX_AHB_SIZE, | ||
61 | .type = MT_DEVICE, | ||
62 | }, { | ||
63 | .virtual = EP93XX_APB_VIRT_BASE, | ||
64 | .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE), | ||
65 | .length = EP93XX_APB_SIZE, | ||
66 | .type = MT_DEVICE, | ||
67 | }, | ||
68 | }; | ||
69 | |||
70 | void __init ep93xx_map_io(void) | ||
71 | { | ||
72 | iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc)); | ||
73 | } | ||
74 | |||
75 | |||
76 | /************************************************************************* | ||
77 | * Timer handling for EP93xx | ||
78 | ************************************************************************* | ||
79 | * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and | ||
80 | * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate | ||
81 | * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz, | ||
82 | * is free-running, and can't generate interrupts. | ||
83 | * | ||
84 | * The 508 kHz timers are ideal for use for the timer interrupt, as the | ||
85 | * most common values of HZ divide 508 kHz nicely. We pick one of the 16 | ||
86 | * bit timers (timer 1) since we don't need more than 16 bits of reload | ||
87 | * value as long as HZ >= 8. | ||
88 | * | ||
89 | * The higher clock rate of timer 4 makes it a better choice than the | ||
90 | * other timers for use in gettimeoffset(), while the fact that it can't | ||
91 | * generate interrupts means we don't have to worry about not being able | ||
92 | * to use this timer for something else. We also use timer 4 for keeping | ||
93 | * track of lost jiffies. | ||
94 | */ | ||
95 | static unsigned int last_jiffy_time; | ||
96 | |||
97 | #define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ) | ||
98 | |||
99 | static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
100 | { | ||
101 | write_seqlock(&xtime_lock); | ||
102 | |||
103 | __raw_writel(1, EP93XX_TIMER1_CLEAR); | ||
104 | while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time | ||
105 | >= TIMER4_TICKS_PER_JIFFY) { | ||
106 | last_jiffy_time += TIMER4_TICKS_PER_JIFFY; | ||
107 | timer_tick(regs); | ||
108 | } | ||
109 | |||
110 | write_sequnlock(&xtime_lock); | ||
111 | |||
112 | return IRQ_HANDLED; | ||
113 | } | ||
114 | |||
115 | static struct irqaction ep93xx_timer_irq = { | ||
116 | .name = "ep93xx timer", | ||
117 | .flags = SA_INTERRUPT | SA_TIMER, | ||
118 | .handler = ep93xx_timer_interrupt, | ||
119 | }; | ||
120 | |||
121 | static void __init ep93xx_timer_init(void) | ||
122 | { | ||
123 | /* Enable periodic HZ timer. */ | ||
124 | __raw_writel(0x48, EP93XX_TIMER1_CONTROL); | ||
125 | __raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD); | ||
126 | __raw_writel(0xc8, EP93XX_TIMER1_CONTROL); | ||
127 | |||
128 | /* Enable lost jiffy timer. */ | ||
129 | __raw_writel(0x100, EP93XX_TIMER4_VALUE_HIGH); | ||
130 | |||
131 | setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq); | ||
132 | } | ||
133 | |||
134 | static unsigned long ep93xx_gettimeoffset(void) | ||
135 | { | ||
136 | int offset; | ||
137 | |||
138 | offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time; | ||
139 | |||
140 | /* Calculate (1000000 / 983040) * offset. */ | ||
141 | return offset + (53 * offset / 3072); | ||
142 | } | ||
143 | |||
144 | struct sys_timer ep93xx_timer = { | ||
145 | .init = ep93xx_timer_init, | ||
146 | .offset = ep93xx_gettimeoffset, | ||
147 | }; | ||
148 | |||
149 | |||
150 | /************************************************************************* | ||
151 | * GPIO handling for EP93xx | ||
152 | *************************************************************************/ | ||
153 | static unsigned char gpio_int_enable[2]; | ||
154 | static unsigned char gpio_int_type1[2]; | ||
155 | static unsigned char gpio_int_type2[2]; | ||
156 | |||
157 | static void update_gpio_ab_int_params(int port) | ||
158 | { | ||
159 | if (port == 0) { | ||
160 | __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE); | ||
161 | __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2); | ||
162 | __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1); | ||
163 | __raw_writeb(gpio_int_enable[0], EP93XX_GPIO_A_INT_ENABLE); | ||
164 | } else if (port == 1) { | ||
165 | __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE); | ||
166 | __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2); | ||
167 | __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1); | ||
168 | __raw_writeb(gpio_int_enable[1], EP93XX_GPIO_B_INT_ENABLE); | ||
169 | } | ||
170 | } | ||
171 | |||
172 | |||
173 | static unsigned char data_register_offset[8] = { | ||
174 | 0x00, 0x04, 0x08, 0x0c, 0x20, 0x30, 0x38, 0x40, | ||
175 | }; | ||
176 | |||
177 | static unsigned char data_direction_register_offset[8] = { | ||
178 | 0x10, 0x14, 0x18, 0x1c, 0x24, 0x34, 0x3c, 0x44, | ||
179 | }; | ||
180 | |||
181 | void gpio_line_config(int line, int direction) | ||
182 | { | ||
183 | unsigned int data_direction_register; | ||
184 | unsigned long flags; | ||
185 | unsigned char v; | ||
186 | |||
187 | data_direction_register = | ||
188 | EP93XX_GPIO_REG(data_direction_register_offset[line >> 3]); | ||
189 | |||
190 | local_irq_save(flags); | ||
191 | if (direction == GPIO_OUT) { | ||
192 | if (line >= 0 && line < 16) { | ||
193 | gpio_int_enable[line >> 3] &= ~(1 << (line & 7)); | ||
194 | update_gpio_ab_int_params(line >> 3); | ||
195 | } | ||
196 | |||
197 | v = __raw_readb(data_direction_register); | ||
198 | v |= 1 << (line & 7); | ||
199 | __raw_writeb(v, data_direction_register); | ||
200 | } else if (direction == GPIO_IN) { | ||
201 | v = __raw_readb(data_direction_register); | ||
202 | v &= ~(1 << (line & 7)); | ||
203 | __raw_writeb(v, data_direction_register); | ||
204 | } | ||
205 | local_irq_restore(flags); | ||
206 | } | ||
207 | EXPORT_SYMBOL(gpio_line_config); | ||
208 | |||
209 | int gpio_line_get(int line) | ||
210 | { | ||
211 | unsigned int data_register; | ||
212 | |||
213 | data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]); | ||
214 | |||
215 | return !!(__raw_readb(data_register) & (1 << (line & 7))); | ||
216 | } | ||
217 | EXPORT_SYMBOL(gpio_line_get); | ||
218 | |||
219 | void gpio_line_set(int line, int value) | ||
220 | { | ||
221 | unsigned int data_register; | ||
222 | unsigned long flags; | ||
223 | unsigned char v; | ||
224 | |||
225 | data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]); | ||
226 | |||
227 | local_irq_save(flags); | ||
228 | if (value == EP93XX_GPIO_HIGH) { | ||
229 | v = __raw_readb(data_register); | ||
230 | v |= 1 << (line & 7); | ||
231 | __raw_writeb(v, data_register); | ||
232 | } else if (value == EP93XX_GPIO_LOW) { | ||
233 | v = __raw_readb(data_register); | ||
234 | v &= ~(1 << (line & 7)); | ||
235 | __raw_writeb(v, data_register); | ||
236 | } | ||
237 | local_irq_restore(flags); | ||
238 | } | ||
239 | EXPORT_SYMBOL(gpio_line_set); | ||
240 | |||
241 | |||
242 | /************************************************************************* | ||
243 | * EP93xx IRQ handling | ||
244 | *************************************************************************/ | ||
245 | static void ep93xx_gpio_ab_irq_handler(unsigned int irq, | ||
246 | struct irqdesc *desc, struct pt_regs *regs) | ||
247 | { | ||
248 | unsigned char status; | ||
249 | int i; | ||
250 | |||
251 | status = __raw_readb(EP93XX_GPIO_A_INT_STATUS); | ||
252 | for (i = 0; i < 8; i++) { | ||
253 | if (status & (1 << i)) { | ||
254 | desc = irq_desc + IRQ_EP93XX_GPIO(0) + i; | ||
255 | desc_handle_irq(IRQ_EP93XX_GPIO(0) + i, desc, regs); | ||
256 | } | ||
257 | } | ||
258 | |||
259 | status = __raw_readb(EP93XX_GPIO_B_INT_STATUS); | ||
260 | for (i = 0; i < 8; i++) { | ||
261 | if (status & (1 << i)) { | ||
262 | desc = irq_desc + IRQ_EP93XX_GPIO(8) + i; | ||
263 | desc_handle_irq(IRQ_EP93XX_GPIO(8) + i, desc, regs); | ||
264 | } | ||
265 | } | ||
266 | } | ||
267 | |||
268 | static void ep93xx_gpio_ab_irq_mask_ack(unsigned int irq) | ||
269 | { | ||
270 | int line = irq - IRQ_EP93XX_GPIO(0); | ||
271 | int port = line >> 3; | ||
272 | |||
273 | gpio_int_enable[port] &= ~(1 << (line & 7)); | ||
274 | update_gpio_ab_int_params(port); | ||
275 | |||
276 | if (line >> 3) { | ||
277 | __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK); | ||
278 | } else { | ||
279 | __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK); | ||
280 | } | ||
281 | } | ||
282 | |||
283 | static void ep93xx_gpio_ab_irq_mask(unsigned int irq) | ||
284 | { | ||
285 | int line = irq - IRQ_EP93XX_GPIO(0); | ||
286 | int port = line >> 3; | ||
287 | |||
288 | gpio_int_enable[port] &= ~(1 << (line & 7)); | ||
289 | update_gpio_ab_int_params(port); | ||
290 | } | ||
291 | |||
292 | static void ep93xx_gpio_ab_irq_unmask(unsigned int irq) | ||
293 | { | ||
294 | int line = irq - IRQ_EP93XX_GPIO(0); | ||
295 | int port = line >> 3; | ||
296 | |||
297 | gpio_int_enable[port] |= 1 << (line & 7); | ||
298 | update_gpio_ab_int_params(port); | ||
299 | } | ||
300 | |||
301 | |||
302 | /* | ||
303 | * gpio_int_type1 controls whether the interrupt is level (0) or | ||
304 | * edge (1) triggered, while gpio_int_type2 controls whether it | ||
305 | * triggers on low/falling (0) or high/rising (1). | ||
306 | */ | ||
307 | static int ep93xx_gpio_ab_irq_type(unsigned int irq, unsigned int type) | ||
308 | { | ||
309 | int port; | ||
310 | int line; | ||
311 | |||
312 | line = irq - IRQ_EP93XX_GPIO(0); | ||
313 | gpio_line_config(line, GPIO_IN); | ||
314 | |||
315 | port = line >> 3; | ||
316 | line &= 7; | ||
317 | |||
318 | if (type & IRQT_RISING) { | ||
319 | gpio_int_type1[port] |= 1 << line; | ||
320 | gpio_int_type2[port] |= 1 << line; | ||
321 | } else if (type & IRQT_FALLING) { | ||
322 | gpio_int_type1[port] |= 1 << line; | ||
323 | gpio_int_type2[port] &= ~(1 << line); | ||
324 | } else if (type & IRQT_HIGH) { | ||
325 | gpio_int_type1[port] &= ~(1 << line); | ||
326 | gpio_int_type2[port] |= 1 << line; | ||
327 | } else if (type & IRQT_LOW) { | ||
328 | gpio_int_type1[port] &= ~(1 << line); | ||
329 | gpio_int_type2[port] &= ~(1 << line); | ||
330 | } | ||
331 | update_gpio_ab_int_params(port); | ||
332 | |||
333 | return 0; | ||
334 | } | ||
335 | |||
336 | static struct irqchip ep93xx_gpio_ab_irq_chip = { | ||
337 | .ack = ep93xx_gpio_ab_irq_mask_ack, | ||
338 | .mask = ep93xx_gpio_ab_irq_mask, | ||
339 | .unmask = ep93xx_gpio_ab_irq_unmask, | ||
340 | .set_type = ep93xx_gpio_ab_irq_type, | ||
341 | }; | ||
342 | |||
343 | |||
344 | void __init ep93xx_init_irq(void) | ||
345 | { | ||
346 | int irq; | ||
347 | |||
348 | vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK); | ||
349 | vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK); | ||
350 | |||
351 | for (irq = IRQ_EP93XX_GPIO(0) ; irq <= IRQ_EP93XX_GPIO(15); irq++) { | ||
352 | set_irq_chip(irq, &ep93xx_gpio_ab_irq_chip); | ||
353 | set_irq_handler(irq, do_level_IRQ); | ||
354 | set_irq_flags(irq, IRQF_VALID); | ||
355 | } | ||
356 | set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); | ||
357 | } | ||
358 | |||
359 | |||
360 | /************************************************************************* | ||
361 | * EP93xx peripheral handling | ||
362 | *************************************************************************/ | ||
363 | void __init ep93xx_init_devices(void) | ||
364 | { | ||
365 | unsigned int v; | ||
366 | |||
367 | /* | ||
368 | * Disallow access to MaverickCrunch initially. | ||
369 | */ | ||
370 | v = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG); | ||
371 | v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE; | ||
372 | __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); | ||
373 | __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG); | ||
374 | } | ||
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c new file mode 100644 index 000000000000..d18fcb1a2f1b --- /dev/null +++ b/arch/arm/mach-ep93xx/gesbc9312.c | |||
@@ -0,0 +1,40 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/gesbc9312.c | ||
3 | * Glomation GESBC-9312-sx support. | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or (at | ||
10 | * your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/config.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/mtd/physmap.h> | ||
20 | #include <asm/io.h> | ||
21 | #include <asm/hardware.h> | ||
22 | #include <asm/mach-types.h> | ||
23 | #include <asm/mach/arch.h> | ||
24 | |||
25 | static void __init gesbc9312_init_machine(void) | ||
26 | { | ||
27 | ep93xx_init_devices(); | ||
28 | physmap_configure(0x60000000, 0x00800000, 4, NULL); | ||
29 | } | ||
30 | |||
31 | MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") | ||
32 | /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ | ||
33 | .phys_io = EP93XX_APB_PHYS_BASE, | ||
34 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | ||
35 | .boot_params = 0x00000100, | ||
36 | .map_io = ep93xx_map_io, | ||
37 | .init_irq = ep93xx_init_irq, | ||
38 | .timer = &ep93xx_timer, | ||
39 | .init_machine = gesbc9312_init_machine, | ||
40 | MACHINE_END | ||
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c new file mode 100644 index 000000000000..777e75daa8a5 --- /dev/null +++ b/arch/arm/mach-ep93xx/ts72xx.c | |||
@@ -0,0 +1,118 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/ts72xx.c | ||
3 | * Technologic Systems TS72xx SBC support. | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or (at | ||
10 | * your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/config.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/mtd/physmap.h> | ||
20 | #include <asm/io.h> | ||
21 | #include <asm/hardware.h> | ||
22 | #include <asm/mach-types.h> | ||
23 | #include <asm/mach/arch.h> | ||
24 | #include <asm/mach/map.h> | ||
25 | |||
26 | static struct map_desc ts72xx_io_desc[] __initdata = { | ||
27 | { | ||
28 | .virtual = TS72XX_MODEL_VIRT_BASE, | ||
29 | .pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE), | ||
30 | .length = TS72XX_MODEL_SIZE, | ||
31 | .type = MT_DEVICE, | ||
32 | }, { | ||
33 | .virtual = TS72XX_OPTIONS_VIRT_BASE, | ||
34 | .pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE), | ||
35 | .length = TS72XX_OPTIONS_SIZE, | ||
36 | .type = MT_DEVICE, | ||
37 | }, { | ||
38 | .virtual = TS72XX_OPTIONS2_VIRT_BASE, | ||
39 | .pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE), | ||
40 | .length = TS72XX_OPTIONS2_SIZE, | ||
41 | .type = MT_DEVICE, | ||
42 | } | ||
43 | }; | ||
44 | |||
45 | static struct map_desc ts72xx_nand_io_desc[] __initdata = { | ||
46 | { | ||
47 | .virtual = TS72XX_NAND_DATA_VIRT_BASE, | ||
48 | .pfn = __phys_to_pfn(TS72XX_NAND1_DATA_PHYS_BASE), | ||
49 | .length = TS72XX_NAND_DATA_SIZE, | ||
50 | .type = MT_DEVICE, | ||
51 | }, { | ||
52 | .virtual = TS72XX_NAND_CONTROL_VIRT_BASE, | ||
53 | .pfn = __phys_to_pfn(TS72XX_NAND1_CONTROL_PHYS_BASE), | ||
54 | .length = TS72XX_NAND_CONTROL_SIZE, | ||
55 | .type = MT_DEVICE, | ||
56 | }, { | ||
57 | .virtual = TS72XX_NAND_BUSY_VIRT_BASE, | ||
58 | .pfn = __phys_to_pfn(TS72XX_NAND1_BUSY_PHYS_BASE), | ||
59 | .length = TS72XX_NAND_BUSY_SIZE, | ||
60 | .type = MT_DEVICE, | ||
61 | } | ||
62 | }; | ||
63 | |||
64 | static struct map_desc ts72xx_alternate_nand_io_desc[] __initdata = { | ||
65 | { | ||
66 | .virtual = TS72XX_NAND_DATA_VIRT_BASE, | ||
67 | .pfn = __phys_to_pfn(TS72XX_NAND2_DATA_PHYS_BASE), | ||
68 | .length = TS72XX_NAND_DATA_SIZE, | ||
69 | .type = MT_DEVICE, | ||
70 | }, { | ||
71 | .virtual = TS72XX_NAND_CONTROL_VIRT_BASE, | ||
72 | .pfn = __phys_to_pfn(TS72XX_NAND2_CONTROL_PHYS_BASE), | ||
73 | .length = TS72XX_NAND_CONTROL_SIZE, | ||
74 | .type = MT_DEVICE, | ||
75 | }, { | ||
76 | .virtual = TS72XX_NAND_BUSY_VIRT_BASE, | ||
77 | .pfn = __phys_to_pfn(TS72XX_NAND2_BUSY_PHYS_BASE), | ||
78 | .length = TS72XX_NAND_BUSY_SIZE, | ||
79 | .type = MT_DEVICE, | ||
80 | } | ||
81 | }; | ||
82 | |||
83 | static void __init ts72xx_map_io(void) | ||
84 | { | ||
85 | ep93xx_map_io(); | ||
86 | iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc)); | ||
87 | |||
88 | /* | ||
89 | * The TS-7200 has NOR flash, the other models have NAND flash. | ||
90 | */ | ||
91 | if (!board_is_ts7200()) { | ||
92 | if (is_ts9420_installed()) { | ||
93 | iotable_init(ts72xx_alternate_nand_io_desc, | ||
94 | ARRAY_SIZE(ts72xx_alternate_nand_io_desc)); | ||
95 | } else { | ||
96 | iotable_init(ts72xx_nand_io_desc, | ||
97 | ARRAY_SIZE(ts72xx_nand_io_desc)); | ||
98 | } | ||
99 | } | ||
100 | } | ||
101 | |||
102 | static void __init ts72xx_init_machine(void) | ||
103 | { | ||
104 | ep93xx_init_devices(); | ||
105 | if (board_is_ts7200()) | ||
106 | physmap_configure(TS72XX_NOR_PHYS_BASE, 0x01000000, 1, NULL); | ||
107 | } | ||
108 | |||
109 | MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") | ||
110 | /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ | ||
111 | .phys_io = EP93XX_APB_PHYS_BASE, | ||
112 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | ||
113 | .boot_params = 0x00000100, | ||
114 | .map_io = ts72xx_map_io, | ||
115 | .init_irq = ep93xx_init_irq, | ||
116 | .timer = &ep93xx_timer, | ||
117 | .init_machine = ts72xx_init_machine, | ||
118 | MACHINE_END | ||