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Diffstat (limited to 'arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h')
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h22
1 files changed, 5 insertions, 17 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index d55194a4c093..93e2ecc79ceb 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -92,21 +92,6 @@
92 92
93/* APB peripherals */ 93/* APB peripherals */
94#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000) 94#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
95#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
96#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
97#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
98#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
99#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
100#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
101#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
102#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
103#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
104#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
105#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
106#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
107#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
108#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
109#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
110 95
111#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000) 96#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
112 97
@@ -167,8 +152,11 @@
167#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 (1<<16) 152#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 (1<<16)
168#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08) 153#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
169#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c) 154#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
170#define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) 155#define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20)
171#define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) 156#define EP93XX_SYSCON_CLKSET1_NBYP1 (1<<23)
157#define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24)
158#define EP93XX_SYSCON_CLKSET2_NBYP2 (1<<19)
159#define EP93XX_SYSCON_CLKSET2_PLL2_EN (1<<18)
172#define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80) 160#define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80)
173#define EP93XX_SYSCON_DEVCFG_SWRST (1<<31) 161#define EP93XX_SYSCON_DEVCFG_SWRST (1<<31)
174#define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30) 162#define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30)