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Diffstat (limited to 'arch/arm/mach-dove/irq.c')
-rw-r--r--arch/arm/mach-dove/irq.c58
1 files changed, 29 insertions, 29 deletions
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index f07fd16e0c9b..9bc97a5baaa8 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -20,22 +20,6 @@
20#include <mach/bridge-regs.h> 20#include <mach/bridge-regs.h>
21#include "common.h" 21#include "common.h"
22 22
23static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
24{
25 int irqoff;
26 BUG_ON(irq < IRQ_DOVE_GPIO_0_7 || irq > IRQ_DOVE_HIGH_GPIO);
27
28 irqoff = irq <= IRQ_DOVE_GPIO_16_23 ? irq - IRQ_DOVE_GPIO_0_7 :
29 3 + irq - IRQ_DOVE_GPIO_24_31;
30
31 orion_gpio_irq_handler(irqoff << 3);
32 if (irq == IRQ_DOVE_HIGH_GPIO) {
33 orion_gpio_irq_handler(40);
34 orion_gpio_irq_handler(48);
35 orion_gpio_irq_handler(56);
36 }
37}
38
39static void pmu_irq_mask(struct irq_data *d) 23static void pmu_irq_mask(struct irq_data *d)
40{ 24{
41 int pin = irq_to_pmu(d->irq); 25 int pin = irq_to_pmu(d->irq);
@@ -90,6 +74,27 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
90 } 74 }
91} 75}
92 76
77static int __initdata gpio0_irqs[4] = {
78 IRQ_DOVE_GPIO_0_7,
79 IRQ_DOVE_GPIO_8_15,
80 IRQ_DOVE_GPIO_16_23,
81 IRQ_DOVE_GPIO_24_31,
82};
83
84static int __initdata gpio1_irqs[4] = {
85 IRQ_DOVE_HIGH_GPIO,
86 0,
87 0,
88 0,
89};
90
91static int __initdata gpio2_irqs[4] = {
92 0,
93 0,
94 0,
95 0,
96};
97
93void __init dove_init_irq(void) 98void __init dove_init_irq(void)
94{ 99{
95 int i; 100 int i;
@@ -100,19 +105,14 @@ void __init dove_init_irq(void)
100 /* 105 /*
101 * Initialize gpiolib for GPIOs 0-71. 106 * Initialize gpiolib for GPIOs 0-71.
102 */ 107 */
103 orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0, 108 orion_gpio_init(NULL, 0, 32, (void __iomem *)DOVE_GPIO_LO_VIRT_BASE, 0,
104 IRQ_DOVE_GPIO_START); 109 IRQ_DOVE_GPIO_START, gpio0_irqs);
105 irq_set_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); 110
106 irq_set_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); 111 orion_gpio_init(NULL, 32, 32, (void __iomem *)DOVE_GPIO_HI_VIRT_BASE, 0,
107 irq_set_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); 112 IRQ_DOVE_GPIO_START + 32, gpio1_irqs);
108 irq_set_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); 113
109 114 orion_gpio_init(NULL, 64, 8, (void __iomem *)DOVE_GPIO2_VIRT_BASE, 0,
110 orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0, 115 IRQ_DOVE_GPIO_START + 64, gpio2_irqs);
111 IRQ_DOVE_GPIO_START + 32);
112 irq_set_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
113
114 orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
115 IRQ_DOVE_GPIO_START + 64);
116 116
117 /* 117 /*
118 * Mask and clear PMU interrupts 118 * Mask and clear PMU interrupts