diff options
Diffstat (limited to 'arch/arm/mach-dove/irq.c')
-rw-r--r-- | arch/arm/mach-dove/irq.c | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index 9317f0558b57..101707fa2e2c 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c | |||
@@ -99,11 +99,21 @@ void __init dove_init_irq(void) | |||
99 | orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); | 99 | orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); |
100 | 100 | ||
101 | /* | 101 | /* |
102 | * Mask and clear GPIO IRQ interrupts. | 102 | * Initialize gpiolib for GPIOs 0-71. |
103 | */ | 103 | */ |
104 | writel(0, GPIO_LEVEL_MASK(0)); | 104 | orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0, |
105 | writel(0, GPIO_EDGE_MASK(0)); | 105 | IRQ_DOVE_GPIO_START); |
106 | writel(0, GPIO_EDGE_CAUSE(0)); | 106 | set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); |
107 | set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); | ||
108 | set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); | ||
109 | set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); | ||
110 | |||
111 | orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0, | ||
112 | IRQ_DOVE_GPIO_START + 32); | ||
113 | set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler); | ||
114 | |||
115 | orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0, | ||
116 | IRQ_DOVE_GPIO_START + 64); | ||
107 | 117 | ||
108 | /* | 118 | /* |
109 | * Mask and clear PMU interrupts | 119 | * Mask and clear PMU interrupts |
@@ -111,18 +121,6 @@ void __init dove_init_irq(void) | |||
111 | writel(0, PMU_INTERRUPT_MASK); | 121 | writel(0, PMU_INTERRUPT_MASK); |
112 | writel(0, PMU_INTERRUPT_CAUSE); | 122 | writel(0, PMU_INTERRUPT_CAUSE); |
113 | 123 | ||
114 | for (i = IRQ_DOVE_GPIO_START; i < IRQ_DOVE_PMU_START; i++) { | ||
115 | set_irq_chip(i, &orion_gpio_irq_chip); | ||
116 | set_irq_handler(i, handle_level_irq); | ||
117 | irq_desc[i].status |= IRQ_LEVEL; | ||
118 | set_irq_flags(i, IRQF_VALID); | ||
119 | } | ||
120 | set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); | ||
121 | set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); | ||
122 | set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); | ||
123 | set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); | ||
124 | set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler); | ||
125 | |||
126 | for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { | 124 | for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { |
127 | set_irq_chip(i, &pmu_irq_chip); | 125 | set_irq_chip(i, &pmu_irq_chip); |
128 | set_irq_handler(i, handle_level_irq); | 126 | set_irq_handler(i, handle_level_irq); |