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-rw-r--r--arch/arm/mach-dove/board-dt.c50
1 files changed, 1 insertions, 49 deletions
diff --git a/arch/arm/mach-dove/board-dt.c b/arch/arm/mach-dove/board-dt.c
index 49f72a848423..49fa9abd09da 100644
--- a/arch/arm/mach-dove/board-dt.c
+++ b/arch/arm/mach-dove/board-dt.c
@@ -10,54 +10,15 @@
10 10
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/clk-provider.h> 12#include <linux/clk-provider.h>
13#include <linux/clocksource.h>
14#include <linux/irqchip.h>
15#include <linux/of.h> 13#include <linux/of.h>
16#include <linux/of_platform.h> 14#include <linux/of_platform.h>
17#include <linux/platform_data/usb-ehci-orion.h>
18#include <asm/hardware/cache-tauros2.h> 15#include <asm/hardware/cache-tauros2.h>
19#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
20#include <mach/dove.h> 17#include <mach/dove.h>
21#include <mach/pm.h> 18#include <mach/pm.h>
22#include <plat/common.h> 19#include <plat/common.h>
23#include <plat/irq.h>
24#include "common.h" 20#include "common.h"
25 21
26/*
27 * There are still devices that doesn't even know about DT,
28 * get clock gates here and add a clock lookup.
29 */
30static void __init dove_legacy_clk_init(void)
31{
32 struct device_node *np = of_find_compatible_node(NULL, NULL,
33 "marvell,dove-gating-clock");
34 struct of_phandle_args clkspec;
35
36 clkspec.np = np;
37 clkspec.args_count = 1;
38
39 clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
40 orion_clkdev_add("0", "pcie",
41 of_clk_get_from_provider(&clkspec));
42
43 clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
44 orion_clkdev_add("1", "pcie",
45 of_clk_get_from_provider(&clkspec));
46}
47
48static void __init dove_dt_time_init(void)
49{
50 of_clk_init(NULL);
51 clocksource_of_init();
52}
53
54static void __init dove_dt_init_early(void)
55{
56 mvebu_mbus_init("marvell,dove-mbus",
57 BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
58 DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ);
59}
60
61static void __init dove_dt_init(void) 22static void __init dove_dt_init(void)
62{ 23{
63 pr_info("Dove 88AP510 SoC\n"); 24 pr_info("Dove 88AP510 SoC\n");
@@ -65,14 +26,7 @@ static void __init dove_dt_init(void)
65#ifdef CONFIG_CACHE_TAUROS2 26#ifdef CONFIG_CACHE_TAUROS2
66 tauros2_init(0); 27 tauros2_init(0);
67#endif 28#endif
68 dove_setup_cpu_wins(); 29 BUG_ON(mvebu_mbus_dt_init());
69
70 /* Setup clocks for legacy devices */
71 dove_legacy_clk_init();
72
73 /* Internal devices not ported to DT yet */
74 dove_pcie_init(1, 1);
75
76 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 30 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
77} 31}
78 32
@@ -83,8 +37,6 @@ static const char * const dove_dt_board_compat[] = {
83 37
84DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)") 38DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
85 .map_io = dove_map_io, 39 .map_io = dove_map_io,
86 .init_early = dove_dt_init_early,
87 .init_time = dove_dt_time_init,
88 .init_machine = dove_dt_init, 40 .init_machine = dove_dt_init,
89 .restart = dove_restart, 41 .restart = dove_restart,
90 .dt_compat = dove_dt_board_compat, 42 .dt_compat = dove_dt_board_compat,