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-rw-r--r--arch/arm/mach-davinci/Makefile1
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c72
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c167
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c9
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c1
-rw-r--r--arch/arm/mach-davinci/board-omapl138-hawk.c1
-rw-r--r--arch/arm/mach-davinci/board-tnetv107x-evm.c1
-rw-r--r--arch/arm/mach-davinci/clock.c21
-rw-r--r--arch/arm/mach-davinci/clock.h2
-rw-r--r--arch/arm/mach-davinci/cpufreq.c248
-rw-r--r--arch/arm/mach-davinci/cpuidle.c29
-rw-r--r--arch/arm/mach-davinci/da830.c2
-rw-r--r--arch/arm/mach-davinci/da850.c50
-rw-r--r--arch/arm/mach-davinci/da8xx-dt.c5
-rw-r--r--arch/arm/mach-davinci/davinci.h11
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c92
-rw-r--r--arch/arm/mach-davinci/devices-tnetv107x.c4
-rw-r--r--arch/arm/mach-davinci/devices.c6
-rw-r--r--arch/arm/mach-davinci/dm355.c178
-rw-r--r--arch/arm/mach-davinci/dm365.c199
-rw-r--r--arch/arm/mach-davinci/dm644x.c13
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h5
-rw-r--r--arch/arm/mach-davinci/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-davinci/pm.c1
-rw-r--r--arch/arm/mach-davinci/pm_domain.c2
-rw-r--r--arch/arm/mach-davinci/sram.c4
-rw-r--r--arch/arm/mach-davinci/tnetv107x.c4
-rw-r--r--arch/arm/mach-davinci/usb.c1
31 files changed, 775 insertions, 361 deletions
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index fb5c1aa98a63..dd1ffccc75e9 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -37,7 +37,6 @@ obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o
37obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o 37obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
38 38
39# Power Management 39# Power Management
40obj-$(CONFIG_CPU_FREQ) += cpufreq.o
41obj-$(CONFIG_CPU_IDLE) += cpuidle.o 40obj-$(CONFIG_CPU_IDLE) += cpuidle.o
42obj-$(CONFIG_SUSPEND) += pm.o sleep.o 41obj-$(CONFIG_SUSPEND) += pm.o sleep.o
43obj-$(CONFIG_HAVE_CLK) += pm_domain.o 42obj-$(CONFIG_HAVE_CLK) += pm_domain.o
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 6da25eebf911..12e6f756361d 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -246,7 +246,6 @@ static struct davinci_mmc_config da830_evm_mmc_config = {
246 .wires = 8, 246 .wires = 8,
247 .max_freq = 50000000, 247 .max_freq = 50000000,
248 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 248 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
249 .version = MMC_CTLR_VERSION_2,
250}; 249};
251 250
252static inline void da830_evm_init_mmc(void) 251static inline void da830_evm_init_mmc(void)
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index c2dfe06563df..dcc8710936a5 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -802,7 +802,6 @@ static struct davinci_mmc_config da850_mmc_config = {
802 .wires = 4, 802 .wires = 4,
803 .max_freq = 50000000, 803 .max_freq = 50000000,
804 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 804 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
805 .version = MMC_CTLR_VERSION_2,
806}; 805};
807 806
808static const short da850_evm_mmcsd0_pins[] __initconst = { 807static const short da850_evm_mmcsd0_pins[] __initconst = {
@@ -1372,7 +1371,6 @@ static struct davinci_mmc_config da850_wl12xx_mmc_config = {
1372 .max_freq = 25000000, 1371 .max_freq = 25000000,
1373 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE | 1372 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
1374 MMC_CAP_POWER_OFF_CARD, 1373 MMC_CAP_POWER_OFF_CARD,
1375 .version = MMC_CTLR_VERSION_2,
1376}; 1374};
1377 1375
1378static const short da850_wl12xx_pins[] __initconst = { 1376static const short da850_wl12xx_pins[] __initconst = {
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 147b8e1a4407..c2a0a67d09e0 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -242,6 +242,73 @@ static struct vpfe_config vpfe_cfg = {
242 .ccdc = "DM355 CCDC", 242 .ccdc = "DM355 CCDC",
243}; 243};
244 244
245/* venc standards timings */
246static struct vpbe_enc_mode_info dm355evm_enc_preset_timing[] = {
247 {
248 .name = "ntsc",
249 .timings_type = VPBE_ENC_STD,
250 .std_id = V4L2_STD_NTSC,
251 .interlaced = 1,
252 .xres = 720,
253 .yres = 480,
254 .aspect = {11, 10},
255 .fps = {30000, 1001},
256 .left_margin = 0x79,
257 .upper_margin = 0x10,
258 },
259 {
260 .name = "pal",
261 .timings_type = VPBE_ENC_STD,
262 .std_id = V4L2_STD_PAL,
263 .interlaced = 1,
264 .xres = 720,
265 .yres = 576,
266 .aspect = {54, 59},
267 .fps = {25, 1},
268 .left_margin = 0x7E,
269 .upper_margin = 0x16
270 },
271};
272
273#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
274
275/*
276 * The outputs available from VPBE + ecnoders. Keep the
277 * the order same as that of encoders. First those from venc followed by that
278 * from encoders. Index in the output refers to index on a particular encoder.
279 * Driver uses this index to pass it to encoder when it supports more than
280 * one output. Application uses index of the array to set an output.
281 */
282static struct vpbe_output dm355evm_vpbe_outputs[] = {
283 {
284 .output = {
285 .index = 0,
286 .name = "Composite",
287 .type = V4L2_OUTPUT_TYPE_ANALOG,
288 .std = VENC_STD_ALL,
289 .capabilities = V4L2_OUT_CAP_STD,
290 },
291 .subdev_name = DM355_VPBE_VENC_SUBDEV_NAME,
292 .default_mode = "ntsc",
293 .num_modes = ARRAY_SIZE(dm355evm_enc_preset_timing),
294 .modes = dm355evm_enc_preset_timing,
295 .if_params = V4L2_MBUS_FMT_FIXED,
296 },
297};
298
299static struct vpbe_config dm355evm_display_cfg = {
300 .module_name = "dm355-vpbe-display",
301 .i2c_adapter_id = 1,
302 .osd = {
303 .module_name = DM355_VPBE_OSD_SUBDEV_NAME,
304 },
305 .venc = {
306 .module_name = DM355_VPBE_VENC_SUBDEV_NAME,
307 },
308 .num_outputs = ARRAY_SIZE(dm355evm_vpbe_outputs),
309 .outputs = dm355evm_vpbe_outputs,
310};
311
245static struct platform_device *davinci_evm_devices[] __initdata = { 312static struct platform_device *davinci_evm_devices[] __initdata = {
246 &dm355evm_dm9000, 313 &dm355evm_dm9000,
247 &davinci_nand_device, 314 &davinci_nand_device,
@@ -253,8 +320,6 @@ static struct davinci_uart_config uart_config __initdata = {
253 320
254static void __init dm355_evm_map_io(void) 321static void __init dm355_evm_map_io(void)
255{ 322{
256 /* setup input configuration for VPFE input devices */
257 dm355_set_vpfe_config(&vpfe_cfg);
258 dm355_init(); 323 dm355_init();
259} 324}
260 325
@@ -280,7 +345,6 @@ static struct davinci_mmc_config dm355evm_mmc_config = {
280 .wires = 4, 345 .wires = 4,
281 .max_freq = 50000000, 346 .max_freq = 50000000,
282 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 347 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
283 .version = MMC_CTLR_VERSION_1,
284}; 348};
285 349
286/* Don't connect anything to J10 unless you're only using USB host 350/* Don't connect anything to J10 unless you're only using USB host
@@ -344,6 +408,8 @@ static __init void dm355_evm_init(void)
344 davinci_setup_mmc(0, &dm355evm_mmc_config); 408 davinci_setup_mmc(0, &dm355evm_mmc_config);
345 davinci_setup_mmc(1, &dm355evm_mmc_config); 409 davinci_setup_mmc(1, &dm355evm_mmc_config);
346 410
411 dm355_init_video(&vpfe_cfg, &dm355evm_display_cfg);
412
347 dm355_init_spi0(BIT(0), dm355_evm_spi_info, 413 dm355_init_spi0(BIT(0), dm355_evm_spi_info,
348 ARRAY_SIZE(dm355_evm_spi_info)); 414 ARRAY_SIZE(dm355_evm_spi_info));
349 415
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index c2d4958a0cb6..fd38c8d22e3c 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -27,6 +27,7 @@
27#include <linux/input.h> 27#include <linux/input.h>
28#include <linux/spi/spi.h> 28#include <linux/spi/spi.h>
29#include <linux/spi/eeprom.h> 29#include <linux/spi/eeprom.h>
30#include <linux/v4l2-dv-timings.h>
30 31
31#include <asm/mach-types.h> 32#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -39,6 +40,7 @@
39#include <linux/platform_data/mtd-davinci.h> 40#include <linux/platform_data/mtd-davinci.h>
40#include <linux/platform_data/keyscan-davinci.h> 41#include <linux/platform_data/keyscan-davinci.h>
41 42
43#include <media/ths7303.h>
42#include <media/tvp514x.h> 44#include <media/tvp514x.h>
43 45
44#include "davinci.h" 46#include "davinci.h"
@@ -253,7 +255,6 @@ static struct davinci_mmc_config dm365evm_mmc_config = {
253 .wires = 4, 255 .wires = 4,
254 .max_freq = 50000000, 256 .max_freq = 50000000,
255 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 257 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
256 .version = MMC_CTLR_VERSION_2,
257}; 258};
258 259
259static void dm365evm_emac_configure(void) 260static void dm365evm_emac_configure(void)
@@ -374,6 +375,166 @@ static struct vpfe_config vpfe_cfg = {
374 .ccdc = "ISIF", 375 .ccdc = "ISIF",
375}; 376};
376 377
378/* venc standards timings */
379static struct vpbe_enc_mode_info dm365evm_enc_std_timing[] = {
380 {
381 .name = "ntsc",
382 .timings_type = VPBE_ENC_STD,
383 .std_id = V4L2_STD_NTSC,
384 .interlaced = 1,
385 .xres = 720,
386 .yres = 480,
387 .aspect = {11, 10},
388 .fps = {30000, 1001},
389 .left_margin = 0x79,
390 .upper_margin = 0x10,
391 },
392 {
393 .name = "pal",
394 .timings_type = VPBE_ENC_STD,
395 .std_id = V4L2_STD_PAL,
396 .interlaced = 1,
397 .xres = 720,
398 .yres = 576,
399 .aspect = {54, 59},
400 .fps = {25, 1},
401 .left_margin = 0x7E,
402 .upper_margin = 0x16,
403 },
404};
405
406/* venc dv timings */
407static struct vpbe_enc_mode_info dm365evm_enc_preset_timing[] = {
408 {
409 .name = "480p59_94",
410 .timings_type = VPBE_ENC_DV_TIMINGS,
411 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
412 .interlaced = 0,
413 .xres = 720,
414 .yres = 480,
415 .aspect = {1, 1},
416 .fps = {5994, 100},
417 .left_margin = 0x8F,
418 .upper_margin = 0x2D,
419 },
420 {
421 .name = "576p50",
422 .timings_type = VPBE_ENC_DV_TIMINGS,
423 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
424 .interlaced = 0,
425 .xres = 720,
426 .yres = 576,
427 .aspect = {1, 1},
428 .fps = {50, 1},
429 .left_margin = 0x8C,
430 .upper_margin = 0x36,
431 },
432 {
433 .name = "720p60",
434 .timings_type = VPBE_ENC_DV_TIMINGS,
435 .dv_timings = V4L2_DV_BT_CEA_1280X720P60,
436 .interlaced = 0,
437 .xres = 1280,
438 .yres = 720,
439 .aspect = {1, 1},
440 .fps = {60, 1},
441 .left_margin = 0x117,
442 .right_margin = 70,
443 .upper_margin = 38,
444 .lower_margin = 3,
445 .hsync_len = 80,
446 .vsync_len = 5,
447 },
448 {
449 .name = "1080i60",
450 .timings_type = VPBE_ENC_DV_TIMINGS,
451 .dv_timings = V4L2_DV_BT_CEA_1920X1080I60,
452 .interlaced = 1,
453 .xres = 1920,
454 .yres = 1080,
455 .aspect = {1, 1},
456 .fps = {30, 1},
457 .left_margin = 0xc9,
458 .right_margin = 80,
459 .upper_margin = 30,
460 .lower_margin = 3,
461 .hsync_len = 88,
462 .vsync_len = 5,
463 },
464};
465
466#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
467
468/*
469 * The outputs available from VPBE + ecnoders. Keep the
470 * the order same as that of encoders. First those from venc followed by that
471 * from encoders. Index in the output refers to index on a particular
472 * encoder.Driver uses this index to pass it to encoder when it supports more
473 * than one output. Application uses index of the array to set an output.
474 */
475static struct vpbe_output dm365evm_vpbe_outputs[] = {
476 {
477 .output = {
478 .index = 0,
479 .name = "Composite",
480 .type = V4L2_OUTPUT_TYPE_ANALOG,
481 .std = VENC_STD_ALL,
482 .capabilities = V4L2_OUT_CAP_STD,
483 },
484 .subdev_name = DM365_VPBE_VENC_SUBDEV_NAME,
485 .default_mode = "ntsc",
486 .num_modes = ARRAY_SIZE(dm365evm_enc_std_timing),
487 .modes = dm365evm_enc_std_timing,
488 .if_params = V4L2_MBUS_FMT_FIXED,
489 },
490 {
491 .output = {
492 .index = 1,
493 .name = "Component",
494 .type = V4L2_OUTPUT_TYPE_ANALOG,
495 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
496 },
497 .subdev_name = DM365_VPBE_VENC_SUBDEV_NAME,
498 .default_mode = "480p59_94",
499 .num_modes = ARRAY_SIZE(dm365evm_enc_preset_timing),
500 .modes = dm365evm_enc_preset_timing,
501 .if_params = V4L2_MBUS_FMT_FIXED,
502 },
503};
504
505/*
506 * Amplifiers on the board
507 */
508struct ths7303_platform_data ths7303_pdata = {
509 .ch_1 = 3,
510 .ch_2 = 3,
511 .ch_3 = 3,
512 .init_enable = 1,
513};
514
515static struct amp_config_info vpbe_amp = {
516 .module_name = "ths7303",
517 .is_i2c = 1,
518 .board_info = {
519 I2C_BOARD_INFO("ths7303", 0x2c),
520 .platform_data = &ths7303_pdata,
521 }
522};
523
524static struct vpbe_config dm365evm_display_cfg = {
525 .module_name = "dm365-vpbe-display",
526 .i2c_adapter_id = 1,
527 .amp = &vpbe_amp,
528 .osd = {
529 .module_name = DM365_VPBE_OSD_SUBDEV_NAME,
530 },
531 .venc = {
532 .module_name = DM365_VPBE_VENC_SUBDEV_NAME,
533 },
534 .num_outputs = ARRAY_SIZE(dm365evm_vpbe_outputs),
535 .outputs = dm365evm_vpbe_outputs,
536};
537
377static void __init evm_init_i2c(void) 538static void __init evm_init_i2c(void)
378{ 539{
379 davinci_init_i2c(&i2c_pdata); 540 davinci_init_i2c(&i2c_pdata);
@@ -564,8 +725,6 @@ static struct davinci_uart_config uart_config __initdata = {
564 725
565static void __init dm365_evm_map_io(void) 726static void __init dm365_evm_map_io(void)
566{ 727{
567 /* setup input configuration for VPFE input devices */
568 dm365_set_vpfe_config(&vpfe_cfg);
569 dm365_init(); 728 dm365_init();
570} 729}
571 730
@@ -597,6 +756,8 @@ static __init void dm365_evm_init(void)
597 756
598 davinci_setup_mmc(0, &dm365evm_mmc_config); 757 davinci_setup_mmc(0, &dm365evm_mmc_config);
599 758
759 dm365_init_video(&vpfe_cfg, &dm365evm_display_cfg);
760
600 /* maybe setup mmc1/etc ... _after_ mmc0 */ 761 /* maybe setup mmc1/etc ... _after_ mmc0 */
601 evm_init_cpld(); 762 evm_init_cpld();
602 763
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 71735e7797cc..e62108fd7926 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -570,7 +570,6 @@ static struct davinci_mmc_config dm6446evm_mmc_config = {
570 .get_cd = dm6444evm_mmc_get_cd, 570 .get_cd = dm6444evm_mmc_get_cd,
571 .get_ro = dm6444evm_mmc_get_ro, 571 .get_ro = dm6444evm_mmc_get_ro,
572 .wires = 4, 572 .wires = 4,
573 .version = MMC_CTLR_VERSION_1
574}; 573};
575 574
576static struct i2c_board_info __initdata i2c_info[] = { 575static struct i2c_board_info __initdata i2c_info[] = {
@@ -622,7 +621,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
622 { 621 {
623 .name = "ntsc", 622 .name = "ntsc",
624 .timings_type = VPBE_ENC_STD, 623 .timings_type = VPBE_ENC_STD,
625 .std_id = V4L2_STD_525_60, 624 .std_id = V4L2_STD_NTSC,
626 .interlaced = 1, 625 .interlaced = 1,
627 .xres = 720, 626 .xres = 720,
628 .yres = 480, 627 .yres = 480,
@@ -634,7 +633,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
634 { 633 {
635 .name = "pal", 634 .name = "pal",
636 .timings_type = VPBE_ENC_STD, 635 .timings_type = VPBE_ENC_STD,
637 .std_id = V4L2_STD_625_50, 636 .std_id = V4L2_STD_PAL,
638 .interlaced = 1, 637 .interlaced = 1,
639 .xres = 720, 638 .xres = 720,
640 .yres = 576, 639 .yres = 576,
@@ -649,7 +648,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
649static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = { 648static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
650 { 649 {
651 .name = "480p59_94", 650 .name = "480p59_94",
652 .timings_type = VPBE_ENC_CUSTOM_TIMINGS, 651 .timings_type = VPBE_ENC_DV_TIMINGS,
653 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94, 652 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
654 .interlaced = 0, 653 .interlaced = 0,
655 .xres = 720, 654 .xres = 720,
@@ -661,7 +660,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
661 }, 660 },
662 { 661 {
663 .name = "576p50", 662 .name = "576p50",
664 .timings_type = VPBE_ENC_CUSTOM_TIMINGS, 663 .timings_type = VPBE_ENC_DV_TIMINGS,
665 .dv_timings = V4L2_DV_BT_CEA_720X576P50, 664 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
666 .interlaced = 0, 665 .interlaced = 0,
667 .xres = 720, 666 .xres = 720,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index de7adff324dc..fc4871ac1c2c 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -514,7 +514,7 @@ static const struct vpif_output dm6467_ch0_outputs[] = {
514 .index = 1, 514 .index = 1,
515 .name = "Component", 515 .name = "Component",
516 .type = V4L2_OUTPUT_TYPE_ANALOG, 516 .type = V4L2_OUTPUT_TYPE_ANALOG,
517 .capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS, 517 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
518 }, 518 },
519 .subdev_name = "adv7343", 519 .subdev_name = "adv7343",
520 .output_route = ADV7343_COMPONENT_ID, 520 .output_route = ADV7343_COMPONENT_ID,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 1c98107527fa..b70e83c03bed 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -164,7 +164,6 @@ static void __init davinci_ntosd2_map_io(void)
164 164
165static struct davinci_mmc_config davinci_ntosd2_mmc_config = { 165static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
166 .wires = 4, 166 .wires = 4,
167 .version = MMC_CTLR_VERSION_1
168}; 167};
169 168
170 169
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 5a2bd44da54d..328dbd8a37f5 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -136,7 +136,6 @@ static struct davinci_mmc_config da850_mmc_config = {
136 .wires = 4, 136 .wires = 4,
137 .max_freq = 50000000, 137 .max_freq = 50000000,
138 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 138 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
139 .version = MMC_CTLR_VERSION_2,
140}; 139};
141 140
142static __init void omapl138_hawk_mmc_init(void) 141static __init void omapl138_hawk_mmc_init(void)
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index 4f416023d4e2..ba798370fc96 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -85,7 +85,6 @@ static struct davinci_mmc_config mmc_config = {
85 .wires = 4, 85 .wires = 4,
86 .max_freq = 50000000, 86 .max_freq = 50000000,
87 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, 87 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
88 .version = MMC_CTLR_VERSION_1,
89}; 88};
90 89
91static const short sdio1_pins[] __initconst = { 90static const short sdio1_pins[] __initconst = {
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index d458558ee84a..dc9a470ff9c5 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -35,19 +35,26 @@ static void __clk_enable(struct clk *clk)
35{ 35{
36 if (clk->parent) 36 if (clk->parent)
37 __clk_enable(clk->parent); 37 __clk_enable(clk->parent);
38 if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) 38 if (clk->usecount++ == 0) {
39 davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc, 39 if (clk->flags & CLK_PSC)
40 true, clk->flags); 40 davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
41 true, clk->flags);
42 else if (clk->clk_enable)
43 clk->clk_enable(clk);
44 }
41} 45}
42 46
43static void __clk_disable(struct clk *clk) 47static void __clk_disable(struct clk *clk)
44{ 48{
45 if (WARN_ON(clk->usecount == 0)) 49 if (WARN_ON(clk->usecount == 0))
46 return; 50 return;
47 if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && 51 if (--clk->usecount == 0) {
48 (clk->flags & CLK_PSC)) 52 if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC))
49 davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc, 53 davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
50 false, clk->flags); 54 false, clk->flags);
55 else if (clk->clk_disable)
56 clk->clk_disable(clk);
57 }
51 if (clk->parent) 58 if (clk->parent)
52 __clk_disable(clk->parent); 59 __clk_disable(clk->parent);
53} 60}
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 8694b395fc92..1e4e836173a1 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -104,6 +104,8 @@ struct clk {
104 int (*set_rate) (struct clk *clk, unsigned long rate); 104 int (*set_rate) (struct clk *clk, unsigned long rate);
105 int (*round_rate) (struct clk *clk, unsigned long rate); 105 int (*round_rate) (struct clk *clk, unsigned long rate);
106 int (*reset) (struct clk *clk, bool reset); 106 int (*reset) (struct clk *clk, bool reset);
107 void (*clk_enable) (struct clk *clk);
108 void (*clk_disable) (struct clk *clk);
107}; 109};
108 110
109/* Clock flags: SoC-specific flags start at BIT(16) */ 111/* Clock flags: SoC-specific flags start at BIT(16) */
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
deleted file mode 100644
index 4729eaab0f40..000000000000
--- a/arch/arm/mach-davinci/cpufreq.c
+++ /dev/null
@@ -1,248 +0,0 @@
1/*
2 * CPU frequency scaling for DaVinci
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Based on linux/arch/arm/plat-omap/cpu-omap.c. Original Copyright follows:
7 *
8 * Copyright (C) 2005 Nokia Corporation
9 * Written by Tony Lindgren <tony@atomide.com>
10 *
11 * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
12 *
13 * Copyright (C) 2007-2008 Texas Instruments, Inc.
14 * Updated to support OMAP3
15 * Rajendra Nayak <rnayak@ti.com>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21#include <linux/types.h>
22#include <linux/cpufreq.h>
23#include <linux/init.h>
24#include <linux/err.h>
25#include <linux/clk.h>
26#include <linux/platform_device.h>
27#include <linux/export.h>
28
29#include <mach/hardware.h>
30#include <mach/cpufreq.h>
31#include <mach/common.h>
32
33#include "clock.h"
34
35struct davinci_cpufreq {
36 struct device *dev;
37 struct clk *armclk;
38 struct clk *asyncclk;
39 unsigned long asyncrate;
40};
41static struct davinci_cpufreq cpufreq;
42
43static int davinci_verify_speed(struct cpufreq_policy *policy)
44{
45 struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
46 struct cpufreq_frequency_table *freq_table = pdata->freq_table;
47 struct clk *armclk = cpufreq.armclk;
48
49 if (freq_table)
50 return cpufreq_frequency_table_verify(policy, freq_table);
51
52 if (policy->cpu)
53 return -EINVAL;
54
55 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
56 policy->cpuinfo.max_freq);
57
58 policy->min = clk_round_rate(armclk, policy->min * 1000) / 1000;
59 policy->max = clk_round_rate(armclk, policy->max * 1000) / 1000;
60 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
61 policy->cpuinfo.max_freq);
62 return 0;
63}
64
65static unsigned int davinci_getspeed(unsigned int cpu)
66{
67 if (cpu)
68 return 0;
69
70 return clk_get_rate(cpufreq.armclk) / 1000;
71}
72
73static int davinci_target(struct cpufreq_policy *policy,
74 unsigned int target_freq, unsigned int relation)
75{
76 int ret = 0;
77 unsigned int idx;
78 struct cpufreq_freqs freqs;
79 struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
80 struct clk *armclk = cpufreq.armclk;
81
82 /*
83 * Ensure desired rate is within allowed range. Some govenors
84 * (ondemand) will just pass target_freq=0 to get the minimum.
85 */
86 if (target_freq < policy->cpuinfo.min_freq)
87 target_freq = policy->cpuinfo.min_freq;
88 if (target_freq > policy->cpuinfo.max_freq)
89 target_freq = policy->cpuinfo.max_freq;
90
91 freqs.old = davinci_getspeed(0);
92 freqs.new = clk_round_rate(armclk, target_freq * 1000) / 1000;
93 freqs.cpu = 0;
94
95 if (freqs.old == freqs.new)
96 return ret;
97
98 dev_dbg(cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
99
100 ret = cpufreq_frequency_table_target(policy, pdata->freq_table,
101 freqs.new, relation, &idx);
102 if (ret)
103 return -EINVAL;
104
105 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
106
107 /* if moving to higher frequency, up the voltage beforehand */
108 if (pdata->set_voltage && freqs.new > freqs.old) {
109 ret = pdata->set_voltage(idx);
110 if (ret)
111 goto out;
112 }
113
114 ret = clk_set_rate(armclk, idx);
115 if (ret)
116 goto out;
117
118 if (cpufreq.asyncclk) {
119 ret = clk_set_rate(cpufreq.asyncclk, cpufreq.asyncrate);
120 if (ret)
121 goto out;
122 }
123
124 /* if moving to lower freq, lower the voltage after lowering freq */
125 if (pdata->set_voltage && freqs.new < freqs.old)
126 pdata->set_voltage(idx);
127
128out:
129 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
130
131 return ret;
132}
133
134static int davinci_cpu_init(struct cpufreq_policy *policy)
135{
136 int result = 0;
137 struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
138 struct cpufreq_frequency_table *freq_table = pdata->freq_table;
139
140 if (policy->cpu != 0)
141 return -EINVAL;
142
143 /* Finish platform specific initialization */
144 if (pdata->init) {
145 result = pdata->init();
146 if (result)
147 return result;
148 }
149
150 policy->cur = policy->min = policy->max = davinci_getspeed(0);
151
152 if (freq_table) {
153 result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
154 if (!result)
155 cpufreq_frequency_table_get_attr(freq_table,
156 policy->cpu);
157 } else {
158 policy->cpuinfo.min_freq = policy->min;
159 policy->cpuinfo.max_freq = policy->max;
160 }
161
162 policy->min = policy->cpuinfo.min_freq;
163 policy->max = policy->cpuinfo.max_freq;
164 policy->cur = davinci_getspeed(0);
165
166 /*
167 * Time measurement across the target() function yields ~1500-1800us
168 * time taken with no drivers on notification list.
169 * Setting the latency to 2000 us to accommodate addition of drivers
170 * to pre/post change notification list.
171 */
172 policy->cpuinfo.transition_latency = 2000 * 1000;
173 return 0;
174}
175
176static int davinci_cpu_exit(struct cpufreq_policy *policy)
177{
178 cpufreq_frequency_table_put_attr(policy->cpu);
179 return 0;
180}
181
182static struct freq_attr *davinci_cpufreq_attr[] = {
183 &cpufreq_freq_attr_scaling_available_freqs,
184 NULL,
185};
186
187static struct cpufreq_driver davinci_driver = {
188 .flags = CPUFREQ_STICKY,
189 .verify = davinci_verify_speed,
190 .target = davinci_target,
191 .get = davinci_getspeed,
192 .init = davinci_cpu_init,
193 .exit = davinci_cpu_exit,
194 .name = "davinci",
195 .attr = davinci_cpufreq_attr,
196};
197
198static int __init davinci_cpufreq_probe(struct platform_device *pdev)
199{
200 struct davinci_cpufreq_config *pdata = pdev->dev.platform_data;
201 struct clk *asyncclk;
202
203 if (!pdata)
204 return -EINVAL;
205 if (!pdata->freq_table)
206 return -EINVAL;
207
208 cpufreq.dev = &pdev->dev;
209
210 cpufreq.armclk = clk_get(NULL, "arm");
211 if (IS_ERR(cpufreq.armclk)) {
212 dev_err(cpufreq.dev, "Unable to get ARM clock\n");
213 return PTR_ERR(cpufreq.armclk);
214 }
215
216 asyncclk = clk_get(cpufreq.dev, "async");
217 if (!IS_ERR(asyncclk)) {
218 cpufreq.asyncclk = asyncclk;
219 cpufreq.asyncrate = clk_get_rate(asyncclk);
220 }
221
222 return cpufreq_register_driver(&davinci_driver);
223}
224
225static int __exit davinci_cpufreq_remove(struct platform_device *pdev)
226{
227 clk_put(cpufreq.armclk);
228
229 if (cpufreq.asyncclk)
230 clk_put(cpufreq.asyncclk);
231
232 return cpufreq_unregister_driver(&davinci_driver);
233}
234
235static struct platform_driver davinci_cpufreq_driver = {
236 .driver = {
237 .name = "cpufreq-davinci",
238 .owner = THIS_MODULE,
239 },
240 .remove = __exit_p(davinci_cpufreq_remove),
241};
242
243int __init davinci_cpufreq_init(void)
244{
245 return platform_driver_probe(&davinci_cpufreq_driver,
246 davinci_cpufreq_probe);
247}
248
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index 5ac9e9384b15..36aef3a7dedb 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -25,7 +25,6 @@
25 25
26#define DAVINCI_CPUIDLE_MAX_STATES 2 26#define DAVINCI_CPUIDLE_MAX_STATES 2
27 27
28static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
29static void __iomem *ddr2_reg_base; 28static void __iomem *ddr2_reg_base;
30static bool ddr2_pdown; 29static bool ddr2_pdown;
31 30
@@ -50,14 +49,10 @@ static void davinci_save_ddr_power(int enter, bool pdown)
50 49
51/* Actual code that puts the SoC in different idle states */ 50/* Actual code that puts the SoC in different idle states */
52static int davinci_enter_idle(struct cpuidle_device *dev, 51static int davinci_enter_idle(struct cpuidle_device *dev,
53 struct cpuidle_driver *drv, 52 struct cpuidle_driver *drv, int index)
54 int index)
55{ 53{
56 davinci_save_ddr_power(1, ddr2_pdown); 54 davinci_save_ddr_power(1, ddr2_pdown);
57 55 cpu_do_idle();
58 index = cpuidle_wrap_enter(dev, drv, index,
59 arm_cpuidle_simple_enter);
60
61 davinci_save_ddr_power(0, ddr2_pdown); 56 davinci_save_ddr_power(0, ddr2_pdown);
62 57
63 return index; 58 return index;
@@ -66,7 +61,6 @@ static int davinci_enter_idle(struct cpuidle_device *dev,
66static struct cpuidle_driver davinci_idle_driver = { 61static struct cpuidle_driver davinci_idle_driver = {
67 .name = "cpuidle-davinci", 62 .name = "cpuidle-davinci",
68 .owner = THIS_MODULE, 63 .owner = THIS_MODULE,
69 .en_core_tk_irqen = 1,
70 .states[0] = ARM_CPUIDLE_WFI_STATE, 64 .states[0] = ARM_CPUIDLE_WFI_STATE,
71 .states[1] = { 65 .states[1] = {
72 .enter = davinci_enter_idle, 66 .enter = davinci_enter_idle,
@@ -81,12 +75,8 @@ static struct cpuidle_driver davinci_idle_driver = {
81 75
82static int __init davinci_cpuidle_probe(struct platform_device *pdev) 76static int __init davinci_cpuidle_probe(struct platform_device *pdev)
83{ 77{
84 int ret;
85 struct cpuidle_device *device;
86 struct davinci_cpuidle_config *pdata = pdev->dev.platform_data; 78 struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
87 79
88 device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
89
90 if (!pdata) { 80 if (!pdata) {
91 dev_err(&pdev->dev, "cannot get platform data\n"); 81 dev_err(&pdev->dev, "cannot get platform data\n");
92 return -ENOENT; 82 return -ENOENT;
@@ -96,20 +86,7 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
96 86
97 ddr2_pdown = pdata->ddr2_pdown; 87 ddr2_pdown = pdata->ddr2_pdown;
98 88
99 ret = cpuidle_register_driver(&davinci_idle_driver); 89 return cpuidle_register(&davinci_idle_driver, NULL);
100 if (ret) {
101 dev_err(&pdev->dev, "failed to register driver\n");
102 return ret;
103 }
104
105 ret = cpuidle_register_device(device);
106 if (ret) {
107 dev_err(&pdev->dev, "failed to register device\n");
108 cpuidle_unregister_driver(&davinci_idle_driver);
109 return ret;
110 }
111
112 return 0;
113} 90}
114 91
115static struct platform_driver davinci_cpuidle_driver = { 92static struct platform_driver davinci_cpuidle_driver = {
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 678a54a64dae..abbaf0270be6 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -394,7 +394,7 @@ static struct clk_lookup da830_clks[] = {
394 CLK(NULL, "tpcc", &tpcc_clk), 394 CLK(NULL, "tpcc", &tpcc_clk),
395 CLK(NULL, "tptc0", &tptc0_clk), 395 CLK(NULL, "tptc0", &tptc0_clk),
396 CLK(NULL, "tptc1", &tptc1_clk), 396 CLK(NULL, "tptc1", &tptc1_clk),
397 CLK("davinci_mmc.0", NULL, &mmcsd_clk), 397 CLK("da830-mmc.0", NULL, &mmcsd_clk),
398 CLK(NULL, "uart0", &uart0_clk), 398 CLK(NULL, "uart0", &uart0_clk),
399 CLK(NULL, "uart1", &uart1_clk), 399 CLK(NULL, "uart1", &uart1_clk),
400 CLK(NULL, "uart2", &uart2_clk), 400 CLK(NULL, "uart2", &uart2_clk),
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 0c4a26ddebba..4d6933848abf 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -383,6 +383,49 @@ static struct clk dsp_clk = {
383 .flags = PSC_LRST | PSC_FORCE, 383 .flags = PSC_LRST | PSC_FORCE,
384}; 384};
385 385
386static struct clk ehrpwm_clk = {
387 .name = "ehrpwm",
388 .parent = &pll0_sysclk2,
389 .lpsc = DA8XX_LPSC1_PWM,
390 .gpsc = 1,
391 .flags = DA850_CLK_ASYNC3,
392};
393
394#define DA8XX_EHRPWM_TBCLKSYNC BIT(12)
395
396static void ehrpwm_tblck_enable(struct clk *clk)
397{
398 u32 val;
399
400 val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
401 val |= DA8XX_EHRPWM_TBCLKSYNC;
402 writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
403}
404
405static void ehrpwm_tblck_disable(struct clk *clk)
406{
407 u32 val;
408
409 val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
410 val &= ~DA8XX_EHRPWM_TBCLKSYNC;
411 writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
412}
413
414static struct clk ehrpwm_tbclk = {
415 .name = "ehrpwm_tbclk",
416 .parent = &ehrpwm_clk,
417 .clk_enable = ehrpwm_tblck_enable,
418 .clk_disable = ehrpwm_tblck_disable,
419};
420
421static struct clk ecap_clk = {
422 .name = "ecap",
423 .parent = &pll0_sysclk2,
424 .lpsc = DA8XX_LPSC1_ECAP,
425 .gpsc = 1,
426 .flags = DA850_CLK_ASYNC3,
427};
428
386static struct clk_lookup da850_clks[] = { 429static struct clk_lookup da850_clks[] = {
387 CLK(NULL, "ref", &ref_clk), 430 CLK(NULL, "ref", &ref_clk),
388 CLK(NULL, "pll0", &pll0_clk), 431 CLK(NULL, "pll0", &pll0_clk),
@@ -420,8 +463,8 @@ static struct clk_lookup da850_clks[] = {
420 CLK("davinci_emac.1", NULL, &emac_clk), 463 CLK("davinci_emac.1", NULL, &emac_clk),
421 CLK("davinci-mcasp.0", NULL, &mcasp_clk), 464 CLK("davinci-mcasp.0", NULL, &mcasp_clk),
422 CLK("da8xx_lcdc.0", "fck", &lcdc_clk), 465 CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
423 CLK("davinci_mmc.0", NULL, &mmcsd0_clk), 466 CLK("da830-mmc.0", NULL, &mmcsd0_clk),
424 CLK("davinci_mmc.1", NULL, &mmcsd1_clk), 467 CLK("da830-mmc.1", NULL, &mmcsd1_clk),
425 CLK(NULL, "aemif", &aemif_clk), 468 CLK(NULL, "aemif", &aemif_clk),
426 CLK(NULL, "usb11", &usb11_clk), 469 CLK(NULL, "usb11", &usb11_clk),
427 CLK(NULL, "usb20", &usb20_clk), 470 CLK(NULL, "usb20", &usb20_clk),
@@ -430,6 +473,9 @@ static struct clk_lookup da850_clks[] = {
430 CLK("vpif", NULL, &vpif_clk), 473 CLK("vpif", NULL, &vpif_clk),
431 CLK("ahci", NULL, &sata_clk), 474 CLK("ahci", NULL, &sata_clk),
432 CLK("davinci-rproc.0", NULL, &dsp_clk), 475 CLK("davinci-rproc.0", NULL, &dsp_clk),
476 CLK("ehrpwm", "fck", &ehrpwm_clk),
477 CLK("ehrpwm", "tbclk", &ehrpwm_tbclk),
478 CLK("ecap", "fck", &ecap_clk),
433 CLK(NULL, NULL, NULL), 479 CLK(NULL, NULL, NULL),
434}; 480};
435 481
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 6b7a0a27fbd1..b1c0a5958275 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -20,7 +20,7 @@
20 20
21#define DA8XX_NUM_UARTS 3 21#define DA8XX_NUM_UARTS 3
22 22
23void __init da8xx_uart_clk_enable(void) 23static void __init da8xx_uart_clk_enable(void)
24{ 24{
25 int i; 25 int i;
26 for (i = 0; i < DA8XX_NUM_UARTS; i++) 26 for (i = 0; i < DA8XX_NUM_UARTS; i++)
@@ -37,9 +37,10 @@ static void __init da8xx_init_irq(void)
37 of_irq_init(da8xx_irq_match); 37 of_irq_init(da8xx_irq_match);
38} 38}
39 39
40struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { 40static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
41 OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL), 41 OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
42 OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "watchdog", NULL), 42 OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "watchdog", NULL),
43 OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL),
43 {} 44 {}
44}; 45};
45 46
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 12d544befcfa..1ab3df423dac 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -36,12 +36,19 @@
36#include <media/davinci/vpbe_osd.h> 36#include <media/davinci/vpbe_osd.h>
37 37
38#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000 38#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
39#define SYSMOD_VDAC_CONFIG 0x2c
39#define SYSMOD_VIDCLKCTL 0x38 40#define SYSMOD_VIDCLKCTL 0x38
40#define SYSMOD_VPSS_CLKCTL 0x44 41#define SYSMOD_VPSS_CLKCTL 0x44
41#define SYSMOD_VDD3P3VPWDN 0x48 42#define SYSMOD_VDD3P3VPWDN 0x48
42#define SYSMOD_VSCLKDIS 0x6c 43#define SYSMOD_VSCLKDIS 0x6c
43#define SYSMOD_PUPDCTL1 0x7c 44#define SYSMOD_PUPDCTL1 0x7c
44 45
46/* VPSS CLKCTL bit definitions */
47#define VPSS_MUXSEL_EXTCLK_ENABLE BIT(1)
48#define VPSS_VENCCLKEN_ENABLE BIT(3)
49#define VPSS_DACCLKEN_ENABLE BIT(4)
50#define VPSS_PLLC2SYSCLK5_ENABLE BIT(5)
51
45extern void __iomem *davinci_sysmod_base; 52extern void __iomem *davinci_sysmod_base;
46#define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x)) 53#define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x))
47void davinci_map_sysmod(void); 54void davinci_map_sysmod(void);
@@ -74,7 +81,7 @@ void __init dm355_init(void);
74void dm355_init_spi0(unsigned chipselect_mask, 81void dm355_init_spi0(unsigned chipselect_mask,
75 const struct spi_board_info *info, unsigned len); 82 const struct spi_board_info *info, unsigned len);
76void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata); 83void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
77void dm355_set_vpfe_config(struct vpfe_config *cfg); 84int dm355_init_video(struct vpfe_config *, struct vpbe_config *);
78 85
79/* DM365 function declarations */ 86/* DM365 function declarations */
80void __init dm365_init(void); 87void __init dm365_init(void);
@@ -84,7 +91,7 @@ void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
84void __init dm365_init_rtc(void); 91void __init dm365_init_rtc(void);
85void dm365_init_spi0(unsigned chipselect_mask, 92void dm365_init_spi0(unsigned chipselect_mask,
86 const struct spi_board_info *info, unsigned len); 93 const struct spi_board_info *info, unsigned len);
87void dm365_set_vpfe_config(struct vpfe_config *cfg); 94int dm365_init_video(struct vpfe_config *, struct vpbe_config *);
88 95
89/* DM644x function declarations */ 96/* DM644x function declarations */
90void __init dm644x_init(void); 97void __init dm644x_init(void);
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index fc50243b1481..bf572525175d 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -12,7 +12,7 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h> 15#include <linux/dma-contiguous.h>
16#include <linux/serial_8250.h> 16#include <linux/serial_8250.h>
17#include <linux/ahci_platform.h> 17#include <linux/ahci_platform.h>
18#include <linux/clk.h> 18#include <linux/clk.h>
@@ -664,7 +664,7 @@ static struct resource da8xx_mmcsd0_resources[] = {
664}; 664};
665 665
666static struct platform_device da8xx_mmcsd0_device = { 666static struct platform_device da8xx_mmcsd0_device = {
667 .name = "davinci_mmc", 667 .name = "da830-mmc",
668 .id = 0, 668 .id = 0,
669 .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources), 669 .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources),
670 .resource = da8xx_mmcsd0_resources, 670 .resource = da8xx_mmcsd0_resources,
@@ -701,7 +701,7 @@ static struct resource da850_mmcsd1_resources[] = {
701}; 701};
702 702
703static struct platform_device da850_mmcsd1_device = { 703static struct platform_device da850_mmcsd1_device = {
704 .name = "davinci_mmc", 704 .name = "da830-mmc",
705 .id = 1, 705 .id = 1,
706 .num_resources = ARRAY_SIZE(da850_mmcsd1_resources), 706 .num_resources = ARRAY_SIZE(da850_mmcsd1_resources),
707 .resource = da850_mmcsd1_resources, 707 .resource = da850_mmcsd1_resources,
@@ -714,6 +714,92 @@ int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
714} 714}
715#endif 715#endif
716 716
717static struct resource da8xx_rproc_resources[] = {
718 { /* DSP boot address */
719 .start = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG,
720 .end = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG + 3,
721 .flags = IORESOURCE_MEM,
722 },
723 { /* DSP interrupt registers */
724 .start = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG,
725 .end = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG + 7,
726 .flags = IORESOURCE_MEM,
727 },
728 { /* dsp irq */
729 .start = IRQ_DA8XX_CHIPINT0,
730 .end = IRQ_DA8XX_CHIPINT0,
731 .flags = IORESOURCE_IRQ,
732 },
733};
734
735static struct platform_device da8xx_dsp = {
736 .name = "davinci-rproc",
737 .dev = {
738 .coherent_dma_mask = DMA_BIT_MASK(32),
739 },
740 .num_resources = ARRAY_SIZE(da8xx_rproc_resources),
741 .resource = da8xx_rproc_resources,
742};
743
744#if IS_ENABLED(CONFIG_DA8XX_REMOTEPROC)
745
746static phys_addr_t rproc_base __initdata;
747static unsigned long rproc_size __initdata;
748
749static int __init early_rproc_mem(char *p)
750{
751 char *endp;
752
753 if (p == NULL)
754 return 0;
755
756 rproc_size = memparse(p, &endp);
757 if (*endp == '@')
758 rproc_base = memparse(endp + 1, NULL);
759
760 return 0;
761}
762early_param("rproc_mem", early_rproc_mem);
763
764void __init da8xx_rproc_reserve_cma(void)
765{
766 int ret;
767
768 if (!rproc_base || !rproc_size) {
769 pr_err("%s: 'rproc_mem=nn@address' badly specified\n"
770 " 'nn' and 'address' must both be non-zero\n",
771 __func__);
772
773 return;
774 }
775
776 pr_info("%s: reserving 0x%lx @ 0x%lx...\n",
777 __func__, rproc_size, (unsigned long)rproc_base);
778
779 ret = dma_declare_contiguous(&da8xx_dsp.dev, rproc_size, rproc_base, 0);
780 if (ret)
781 pr_err("%s: dma_declare_contiguous failed %d\n", __func__, ret);
782}
783
784#else
785
786void __init da8xx_rproc_reserve_cma(void)
787{
788}
789
790#endif
791
792int __init da8xx_register_rproc(void)
793{
794 int ret;
795
796 ret = platform_device_register(&da8xx_dsp);
797 if (ret)
798 pr_err("%s: can't register DSP device: %d\n", __func__, ret);
799
800 return ret;
801};
802
717static struct resource da8xx_rtc_resources[] = { 803static struct resource da8xx_rtc_resources[] = {
718 { 804 {
719 .start = DA8XX_RTC_BASE, 805 .start = DA8XX_RTC_BASE,
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index 773ab07a71a0..cfb194df18ed 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -218,7 +218,7 @@ static u64 mmc1_dma_mask = DMA_BIT_MASK(32);
218 218
219static struct platform_device mmc_devices[2] = { 219static struct platform_device mmc_devices[2] = {
220 { 220 {
221 .name = "davinci_mmc", 221 .name = "dm6441-mmc",
222 .id = 0, 222 .id = 0,
223 .dev = { 223 .dev = {
224 .dma_mask = &mmc0_dma_mask, 224 .dma_mask = &mmc0_dma_mask,
@@ -228,7 +228,7 @@ static struct platform_device mmc_devices[2] = {
228 .resource = mmc0_resources 228 .resource = mmc0_resources
229 }, 229 },
230 { 230 {
231 .name = "davinci_mmc", 231 .name = "dm6441-mmc",
232 .id = 1, 232 .id = 1,
233 .dev = { 233 .dev = {
234 .dma_mask = &mmc1_dma_mask, 234 .dma_mask = &mmc1_dma_mask,
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 4c48a36ee567..f6927df2dda8 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -150,7 +150,7 @@ static struct resource mmcsd0_resources[] = {
150}; 150};
151 151
152static struct platform_device davinci_mmcsd0_device = { 152static struct platform_device davinci_mmcsd0_device = {
153 .name = "davinci_mmc", 153 .name = "dm6441-mmc",
154 .id = 0, 154 .id = 0,
155 .dev = { 155 .dev = {
156 .dma_mask = &mmcsd0_dma_mask, 156 .dma_mask = &mmcsd0_dma_mask,
@@ -187,7 +187,7 @@ static struct resource mmcsd1_resources[] = {
187}; 187};
188 188
189static struct platform_device davinci_mmcsd1_device = { 189static struct platform_device davinci_mmcsd1_device = {
190 .name = "davinci_mmc", 190 .name = "dm6441-mmc",
191 .id = 1, 191 .id = 1,
192 .dev = { 192 .dev = {
193 .dma_mask = &mmcsd1_dma_mask, 193 .dma_mask = &mmcsd1_dma_mask,
@@ -235,6 +235,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
235 mmcsd1_resources[0].end = DM365_MMCSD1_BASE + 235 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
236 SZ_4K - 1; 236 SZ_4K - 1;
237 mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1; 237 mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
238 davinci_mmcsd1_device.name = "da830-mmc";
238 } else 239 } else
239 break; 240 break;
240 241
@@ -256,6 +257,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
256 mmcsd0_resources[0].end = DM365_MMCSD0_BASE + 257 mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
257 SZ_4K - 1; 258 SZ_4K - 1;
258 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0; 259 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
260 davinci_mmcsd0_device.name = "da830-mmc";
259 } else if (cpu_is_davinci_dm644x()) { 261 } else if (cpu_is_davinci_dm644x()) {
260 /* REVISIT: should this be in board-init code? */ 262 /* REVISIT: should this be in board-init code? */
261 /* Power-on 3.3V IO cells */ 263 /* Power-on 3.3V IO cells */
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index b49c3b77d55e..a11034a358f1 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -35,6 +35,8 @@
35#include "asp.h" 35#include "asp.h"
36 36
37#define DM355_UART2_BASE (IO_PHYS + 0x206000) 37#define DM355_UART2_BASE (IO_PHYS + 0x206000)
38#define DM355_OSD_BASE (IO_PHYS + 0x70200)
39#define DM355_VENC_BASE (IO_PHYS + 0x70400)
38 40
39/* 41/*
40 * Device specific clocks 42 * Device specific clocks
@@ -345,8 +347,8 @@ static struct clk_lookup dm355_clks[] = {
345 CLK(NULL, "pll1_aux", &pll1_aux_clk), 347 CLK(NULL, "pll1_aux", &pll1_aux_clk),
346 CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp), 348 CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
347 CLK(NULL, "vpss_dac", &vpss_dac_clk), 349 CLK(NULL, "vpss_dac", &vpss_dac_clk),
348 CLK(NULL, "vpss_master", &vpss_master_clk), 350 CLK("vpss", "master", &vpss_master_clk),
349 CLK(NULL, "vpss_slave", &vpss_slave_clk), 351 CLK("vpss", "slave", &vpss_slave_clk),
350 CLK(NULL, "clkout1", &clkout1_clk), 352 CLK(NULL, "clkout1", &clkout1_clk),
351 CLK(NULL, "clkout2", &clkout2_clk), 353 CLK(NULL, "clkout2", &clkout2_clk),
352 CLK(NULL, "pll2", &pll2_clk), 354 CLK(NULL, "pll2", &pll2_clk),
@@ -361,8 +363,8 @@ static struct clk_lookup dm355_clks[] = {
361 CLK("i2c_davinci.1", NULL, &i2c_clk), 363 CLK("i2c_davinci.1", NULL, &i2c_clk),
362 CLK("davinci-mcbsp.0", NULL, &asp0_clk), 364 CLK("davinci-mcbsp.0", NULL, &asp0_clk),
363 CLK("davinci-mcbsp.1", NULL, &asp1_clk), 365 CLK("davinci-mcbsp.1", NULL, &asp1_clk),
364 CLK("davinci_mmc.0", NULL, &mmcsd0_clk), 366 CLK("dm6441-mmc.0", NULL, &mmcsd0_clk),
365 CLK("davinci_mmc.1", NULL, &mmcsd1_clk), 367 CLK("dm6441-mmc.1", NULL, &mmcsd1_clk),
366 CLK("spi_davinci.0", NULL, &spi0_clk), 368 CLK("spi_davinci.0", NULL, &spi0_clk),
367 CLK("spi_davinci.1", NULL, &spi1_clk), 369 CLK("spi_davinci.1", NULL, &spi1_clk),
368 CLK("spi_davinci.2", NULL, &spi2_clk), 370 CLK("spi_davinci.2", NULL, &spi2_clk),
@@ -744,11 +746,146 @@ static struct platform_device vpfe_capture_dev = {
744 }, 746 },
745}; 747};
746 748
747void dm355_set_vpfe_config(struct vpfe_config *cfg) 749static struct resource dm355_osd_resources[] = {
750 {
751 .start = DM355_OSD_BASE,
752 .end = DM355_OSD_BASE + 0x17f,
753 .flags = IORESOURCE_MEM,
754 },
755};
756
757static struct platform_device dm355_osd_dev = {
758 .name = DM355_VPBE_OSD_SUBDEV_NAME,
759 .id = -1,
760 .num_resources = ARRAY_SIZE(dm355_osd_resources),
761 .resource = dm355_osd_resources,
762 .dev = {
763 .dma_mask = &vpfe_capture_dma_mask,
764 .coherent_dma_mask = DMA_BIT_MASK(32),
765 },
766};
767
768static struct resource dm355_venc_resources[] = {
769 {
770 .start = IRQ_VENCINT,
771 .end = IRQ_VENCINT,
772 .flags = IORESOURCE_IRQ,
773 },
774 /* venc registers io space */
775 {
776 .start = DM355_VENC_BASE,
777 .end = DM355_VENC_BASE + 0x17f,
778 .flags = IORESOURCE_MEM,
779 },
780 /* VDAC config register io space */
781 {
782 .start = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG,
783 .end = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG + 3,
784 .flags = IORESOURCE_MEM,
785 },
786};
787
788static struct resource dm355_v4l2_disp_resources[] = {
789 {
790 .start = IRQ_VENCINT,
791 .end = IRQ_VENCINT,
792 .flags = IORESOURCE_IRQ,
793 },
794 /* venc registers io space */
795 {
796 .start = DM355_VENC_BASE,
797 .end = DM355_VENC_BASE + 0x17f,
798 .flags = IORESOURCE_MEM,
799 },
800};
801
802static int dm355_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type,
803 int field)
804{
805 switch (if_type) {
806 case V4L2_MBUS_FMT_SGRBG8_1X8:
807 davinci_cfg_reg(DM355_VOUT_FIELD_G70);
808 break;
809 case V4L2_MBUS_FMT_YUYV10_1X20:
810 if (field)
811 davinci_cfg_reg(DM355_VOUT_FIELD);
812 else
813 davinci_cfg_reg(DM355_VOUT_FIELD_G70);
814 break;
815 default:
816 return -EINVAL;
817 }
818
819 davinci_cfg_reg(DM355_VOUT_COUTL_EN);
820 davinci_cfg_reg(DM355_VOUT_COUTH_EN);
821
822 return 0;
823}
824
825static int dm355_venc_setup_clock(enum vpbe_enc_timings_type type,
826 unsigned int pclock)
748{ 827{
749 vpfe_capture_dev.dev.platform_data = cfg; 828 void __iomem *vpss_clk_ctrl_reg;
829
830 vpss_clk_ctrl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL);
831
832 switch (type) {
833 case VPBE_ENC_STD:
834 writel(VPSS_DACCLKEN_ENABLE | VPSS_VENCCLKEN_ENABLE,
835 vpss_clk_ctrl_reg);
836 break;
837 case VPBE_ENC_DV_TIMINGS:
838 if (pclock > 27000000)
839 /*
840 * For HD, use external clock source since we cannot
841 * support HD mode with internal clocks.
842 */
843 writel(VPSS_MUXSEL_EXTCLK_ENABLE, vpss_clk_ctrl_reg);
844 break;
845 default:
846 return -EINVAL;
847 }
848
849 return 0;
750} 850}
751 851
852static struct platform_device dm355_vpbe_display = {
853 .name = "vpbe-v4l2",
854 .id = -1,
855 .num_resources = ARRAY_SIZE(dm355_v4l2_disp_resources),
856 .resource = dm355_v4l2_disp_resources,
857 .dev = {
858 .dma_mask = &vpfe_capture_dma_mask,
859 .coherent_dma_mask = DMA_BIT_MASK(32),
860 },
861};
862
863struct venc_platform_data dm355_venc_pdata = {
864 .setup_pinmux = dm355_vpbe_setup_pinmux,
865 .setup_clock = dm355_venc_setup_clock,
866};
867
868static struct platform_device dm355_venc_dev = {
869 .name = DM355_VPBE_VENC_SUBDEV_NAME,
870 .id = -1,
871 .num_resources = ARRAY_SIZE(dm355_venc_resources),
872 .resource = dm355_venc_resources,
873 .dev = {
874 .dma_mask = &vpfe_capture_dma_mask,
875 .coherent_dma_mask = DMA_BIT_MASK(32),
876 .platform_data = (void *)&dm355_venc_pdata,
877 },
878};
879
880static struct platform_device dm355_vpbe_dev = {
881 .name = "vpbe_controller",
882 .id = -1,
883 .dev = {
884 .dma_mask = &vpfe_capture_dma_mask,
885 .coherent_dma_mask = DMA_BIT_MASK(32),
886 },
887};
888
752/*----------------------------------------------------------------------*/ 889/*----------------------------------------------------------------------*/
753 890
754static struct map_desc dm355_io_desc[] = { 891static struct map_desc dm355_io_desc[] = {
@@ -868,19 +1005,36 @@ void __init dm355_init(void)
868 davinci_map_sysmod(); 1005 davinci_map_sysmod();
869} 1006}
870 1007
1008int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
1009 struct vpbe_config *vpbe_cfg)
1010{
1011 if (vpfe_cfg || vpbe_cfg)
1012 platform_device_register(&dm355_vpss_device);
1013
1014 if (vpfe_cfg) {
1015 vpfe_capture_dev.dev.platform_data = vpfe_cfg;
1016 platform_device_register(&dm355_ccdc_dev);
1017 platform_device_register(&vpfe_capture_dev);
1018 }
1019
1020 if (vpbe_cfg) {
1021 dm355_vpbe_dev.dev.platform_data = vpbe_cfg;
1022 platform_device_register(&dm355_osd_dev);
1023 platform_device_register(&dm355_venc_dev);
1024 platform_device_register(&dm355_vpbe_dev);
1025 platform_device_register(&dm355_vpbe_display);
1026 }
1027
1028 return 0;
1029}
1030
871static int __init dm355_init_devices(void) 1031static int __init dm355_init_devices(void)
872{ 1032{
873 if (!cpu_is_davinci_dm355()) 1033 if (!cpu_is_davinci_dm355())
874 return 0; 1034 return 0;
875 1035
876 /* Add ccdc clock aliases */
877 clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL);
878 clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL);
879 davinci_cfg_reg(DM355_INT_EDMA_CC); 1036 davinci_cfg_reg(DM355_INT_EDMA_CC);
880 platform_device_register(&dm355_edma_device); 1037 platform_device_register(&dm355_edma_device);
881 platform_device_register(&dm355_vpss_device);
882 platform_device_register(&dm355_ccdc_dev);
883 platform_device_register(&vpfe_capture_dev);
884 1038
885 return 0; 1039 return 0;
886} 1040}
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6c3980540be0..40fa4fee9331 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -39,16 +39,13 @@
39#include "asp.h" 39#include "asp.h"
40 40
41#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ 41#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */
42
43/* Base of key scan register bank */
44#define DM365_KEYSCAN_BASE 0x01c69400
45
46#define DM365_RTC_BASE 0x01c69000 42#define DM365_RTC_BASE 0x01c69000
47 43#define DM365_KEYSCAN_BASE 0x01c69400
44#define DM365_OSD_BASE 0x01c71c00
45#define DM365_VENC_BASE 0x01c71e00
48#define DAVINCI_DM365_VC_BASE 0x01d0c000 46#define DAVINCI_DM365_VC_BASE 0x01d0c000
49#define DAVINCI_DMA_VC_TX 2 47#define DAVINCI_DMA_VC_TX 2
50#define DAVINCI_DMA_VC_RX 3 48#define DAVINCI_DMA_VC_RX 3
51
52#define DM365_EMAC_BASE 0x01d07000 49#define DM365_EMAC_BASE 0x01d07000
53#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) 50#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000)
54#define DM365_EMAC_CNTRL_OFFSET 0x0000 51#define DM365_EMAC_CNTRL_OFFSET 0x0000
@@ -257,6 +254,12 @@ static struct clk vpss_master_clk = {
257 .flags = CLK_PSC, 254 .flags = CLK_PSC,
258}; 255};
259 256
257static struct clk vpss_slave_clk = {
258 .name = "vpss_slave",
259 .parent = &pll1_sysclk5,
260 .lpsc = DAVINCI_LPSC_VPSSSLV,
261};
262
260static struct clk arm_clk = { 263static struct clk arm_clk = {
261 .name = "arm_clk", 264 .name = "arm_clk",
262 .parent = &pll2_sysclk2, 265 .parent = &pll2_sysclk2,
@@ -449,13 +452,14 @@ static struct clk_lookup dm365_clks[] = {
449 CLK(NULL, "pll2_sysclk8", &pll2_sysclk8), 452 CLK(NULL, "pll2_sysclk8", &pll2_sysclk8),
450 CLK(NULL, "pll2_sysclk9", &pll2_sysclk9), 453 CLK(NULL, "pll2_sysclk9", &pll2_sysclk9),
451 CLK(NULL, "vpss_dac", &vpss_dac_clk), 454 CLK(NULL, "vpss_dac", &vpss_dac_clk),
452 CLK(NULL, "vpss_master", &vpss_master_clk), 455 CLK("vpss", "master", &vpss_master_clk),
456 CLK("vpss", "slave", &vpss_slave_clk),
453 CLK(NULL, "arm", &arm_clk), 457 CLK(NULL, "arm", &arm_clk),
454 CLK(NULL, "uart0", &uart0_clk), 458 CLK(NULL, "uart0", &uart0_clk),
455 CLK(NULL, "uart1", &uart1_clk), 459 CLK(NULL, "uart1", &uart1_clk),
456 CLK("i2c_davinci.1", NULL, &i2c_clk), 460 CLK("i2c_davinci.1", NULL, &i2c_clk),
457 CLK("davinci_mmc.0", NULL, &mmcsd0_clk), 461 CLK("da830-mmc.0", NULL, &mmcsd0_clk),
458 CLK("davinci_mmc.1", NULL, &mmcsd1_clk), 462 CLK("da830-mmc.1", NULL, &mmcsd1_clk),
459 CLK("spi_davinci.0", NULL, &spi0_clk), 463 CLK("spi_davinci.0", NULL, &spi0_clk),
460 CLK("spi_davinci.1", NULL, &spi1_clk), 464 CLK("spi_davinci.1", NULL, &spi1_clk),
461 CLK("spi_davinci.2", NULL, &spi2_clk), 465 CLK("spi_davinci.2", NULL, &spi2_clk),
@@ -1226,6 +1230,173 @@ static struct platform_device dm365_isif_dev = {
1226 }, 1230 },
1227}; 1231};
1228 1232
1233static struct resource dm365_osd_resources[] = {
1234 {
1235 .start = DM365_OSD_BASE,
1236 .end = DM365_OSD_BASE + 0xff,
1237 .flags = IORESOURCE_MEM,
1238 },
1239};
1240
1241static u64 dm365_video_dma_mask = DMA_BIT_MASK(32);
1242
1243static struct platform_device dm365_osd_dev = {
1244 .name = DM365_VPBE_OSD_SUBDEV_NAME,
1245 .id = -1,
1246 .num_resources = ARRAY_SIZE(dm365_osd_resources),
1247 .resource = dm365_osd_resources,
1248 .dev = {
1249 .dma_mask = &dm365_video_dma_mask,
1250 .coherent_dma_mask = DMA_BIT_MASK(32),
1251 },
1252};
1253
1254static struct resource dm365_venc_resources[] = {
1255 {
1256 .start = IRQ_VENCINT,
1257 .end = IRQ_VENCINT,
1258 .flags = IORESOURCE_IRQ,
1259 },
1260 /* venc registers io space */
1261 {
1262 .start = DM365_VENC_BASE,
1263 .end = DM365_VENC_BASE + 0x177,
1264 .flags = IORESOURCE_MEM,
1265 },
1266 /* vdaccfg registers io space */
1267 {
1268 .start = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG,
1269 .end = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG + 3,
1270 .flags = IORESOURCE_MEM,
1271 },
1272};
1273
1274static struct resource dm365_v4l2_disp_resources[] = {
1275 {
1276 .start = IRQ_VENCINT,
1277 .end = IRQ_VENCINT,
1278 .flags = IORESOURCE_IRQ,
1279 },
1280 /* venc registers io space */
1281 {
1282 .start = DM365_VENC_BASE,
1283 .end = DM365_VENC_BASE + 0x177,
1284 .flags = IORESOURCE_MEM,
1285 },
1286};
1287
1288static int dm365_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type,
1289 int field)
1290{
1291 switch (if_type) {
1292 case V4L2_MBUS_FMT_SGRBG8_1X8:
1293 davinci_cfg_reg(DM365_VOUT_FIELD_G81);
1294 davinci_cfg_reg(DM365_VOUT_COUTL_EN);
1295 davinci_cfg_reg(DM365_VOUT_COUTH_EN);
1296 break;
1297 case V4L2_MBUS_FMT_YUYV10_1X20:
1298 if (field)
1299 davinci_cfg_reg(DM365_VOUT_FIELD);
1300 else
1301 davinci_cfg_reg(DM365_VOUT_FIELD_G81);
1302 davinci_cfg_reg(DM365_VOUT_COUTL_EN);
1303 davinci_cfg_reg(DM365_VOUT_COUTH_EN);
1304 break;
1305 default:
1306 return -EINVAL;
1307 }
1308
1309 return 0;
1310}
1311
1312static int dm365_venc_setup_clock(enum vpbe_enc_timings_type type,
1313 unsigned int pclock)
1314{
1315 void __iomem *vpss_clkctl_reg;
1316 u32 val;
1317
1318 vpss_clkctl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL);
1319
1320 switch (type) {
1321 case VPBE_ENC_STD:
1322 val = VPSS_VENCCLKEN_ENABLE | VPSS_DACCLKEN_ENABLE;
1323 break;
1324 case VPBE_ENC_DV_TIMINGS:
1325 if (pclock <= 27000000) {
1326 val = VPSS_VENCCLKEN_ENABLE | VPSS_DACCLKEN_ENABLE;
1327 } else {
1328 /* set sysclk4 to output 74.25 MHz from pll1 */
1329 val = VPSS_PLLC2SYSCLK5_ENABLE | VPSS_DACCLKEN_ENABLE |
1330 VPSS_VENCCLKEN_ENABLE;
1331 }
1332 break;
1333 default:
1334 return -EINVAL;
1335 }
1336 writel(val, vpss_clkctl_reg);
1337
1338 return 0;
1339}
1340
1341static struct platform_device dm365_vpbe_display = {
1342 .name = "vpbe-v4l2",
1343 .id = -1,
1344 .num_resources = ARRAY_SIZE(dm365_v4l2_disp_resources),
1345 .resource = dm365_v4l2_disp_resources,
1346 .dev = {
1347 .dma_mask = &dm365_video_dma_mask,
1348 .coherent_dma_mask = DMA_BIT_MASK(32),
1349 },
1350};
1351
1352struct venc_platform_data dm365_venc_pdata = {
1353 .setup_pinmux = dm365_vpbe_setup_pinmux,
1354 .setup_clock = dm365_venc_setup_clock,
1355};
1356
1357static struct platform_device dm365_venc_dev = {
1358 .name = DM365_VPBE_VENC_SUBDEV_NAME,
1359 .id = -1,
1360 .num_resources = ARRAY_SIZE(dm365_venc_resources),
1361 .resource = dm365_venc_resources,
1362 .dev = {
1363 .dma_mask = &dm365_video_dma_mask,
1364 .coherent_dma_mask = DMA_BIT_MASK(32),
1365 .platform_data = (void *)&dm365_venc_pdata,
1366 },
1367};
1368
1369static struct platform_device dm365_vpbe_dev = {
1370 .name = "vpbe_controller",
1371 .id = -1,
1372 .dev = {
1373 .dma_mask = &dm365_video_dma_mask,
1374 .coherent_dma_mask = DMA_BIT_MASK(32),
1375 },
1376};
1377
1378int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
1379 struct vpbe_config *vpbe_cfg)
1380{
1381 if (vpfe_cfg || vpbe_cfg)
1382 platform_device_register(&dm365_vpss_device);
1383
1384 if (vpfe_cfg) {
1385 vpfe_capture_dev.dev.platform_data = vpfe_cfg;
1386 platform_device_register(&dm365_isif_dev);
1387 platform_device_register(&vpfe_capture_dev);
1388 }
1389 if (vpbe_cfg) {
1390 dm365_vpbe_dev.dev.platform_data = vpbe_cfg;
1391 platform_device_register(&dm365_osd_dev);
1392 platform_device_register(&dm365_venc_dev);
1393 platform_device_register(&dm365_vpbe_dev);
1394 platform_device_register(&dm365_vpbe_display);
1395 }
1396
1397 return 0;
1398}
1399
1229static int __init dm365_init_devices(void) 1400static int __init dm365_init_devices(void)
1230{ 1401{
1231 if (!cpu_is_davinci_dm365()) 1402 if (!cpu_is_davinci_dm365())
@@ -1239,16 +1410,6 @@ static int __init dm365_init_devices(void)
1239 clk_add_alias(NULL, dev_name(&dm365_mdio_device.dev), 1410 clk_add_alias(NULL, dev_name(&dm365_mdio_device.dev),
1240 NULL, &dm365_emac_device.dev); 1411 NULL, &dm365_emac_device.dev);
1241 1412
1242 /* Add isif clock alias */
1243 clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL);
1244 platform_device_register(&dm365_vpss_device);
1245 platform_device_register(&dm365_isif_dev);
1246 platform_device_register(&vpfe_capture_dev);
1247 return 0; 1413 return 0;
1248} 1414}
1249postcore_initcall(dm365_init_devices); 1415postcore_initcall(dm365_init_devices);
1250
1251void dm365_set_vpfe_config(struct vpfe_config *cfg)
1252{
1253 vpfe_capture_dev.dev.platform_data = cfg;
1254}
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index db1dd92e00af..4d37d3e2a193 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -300,8 +300,8 @@ static struct clk_lookup dm644x_clks[] = {
300 CLK(NULL, "dsp", &dsp_clk), 300 CLK(NULL, "dsp", &dsp_clk),
301 CLK(NULL, "arm", &arm_clk), 301 CLK(NULL, "arm", &arm_clk),
302 CLK(NULL, "vicp", &vicp_clk), 302 CLK(NULL, "vicp", &vicp_clk),
303 CLK(NULL, "vpss_master", &vpss_master_clk), 303 CLK("vpss", "master", &vpss_master_clk),
304 CLK(NULL, "vpss_slave", &vpss_slave_clk), 304 CLK("vpss", "slave", &vpss_slave_clk),
305 CLK(NULL, "arm", &arm_clk), 305 CLK(NULL, "arm", &arm_clk),
306 CLK(NULL, "uart0", &uart0_clk), 306 CLK(NULL, "uart0", &uart0_clk),
307 CLK(NULL, "uart1", &uart1_clk), 307 CLK(NULL, "uart1", &uart1_clk),
@@ -310,7 +310,7 @@ static struct clk_lookup dm644x_clks[] = {
310 CLK("i2c_davinci.1", NULL, &i2c_clk), 310 CLK("i2c_davinci.1", NULL, &i2c_clk),
311 CLK("palm_bk3710", NULL, &ide_clk), 311 CLK("palm_bk3710", NULL, &ide_clk),
312 CLK("davinci-mcbsp", NULL, &asp_clk), 312 CLK("davinci-mcbsp", NULL, &asp_clk),
313 CLK("davinci_mmc.0", NULL, &mmcsd_clk), 313 CLK("dm6441-mmc.0", NULL, &mmcsd_clk),
314 CLK(NULL, "spi", &spi_clk), 314 CLK(NULL, "spi", &spi_clk),
315 CLK(NULL, "gpio", &gpio_clk), 315 CLK(NULL, "gpio", &gpio_clk),
316 CLK(NULL, "usb", &usb_clk), 316 CLK(NULL, "usb", &usb_clk),
@@ -706,7 +706,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
706 v |= DM644X_VPSS_DACCLKEN; 706 v |= DM644X_VPSS_DACCLKEN;
707 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 707 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
708 break; 708 break;
709 case VPBE_ENC_CUSTOM_TIMINGS: 709 case VPBE_ENC_DV_TIMINGS:
710 if (pclock <= 27000000) { 710 if (pclock <= 27000000) {
711 v |= DM644X_VPSS_DACCLKEN; 711 v |= DM644X_VPSS_DACCLKEN;
712 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 712 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
@@ -901,11 +901,6 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
901 dm644x_vpfe_dev.dev.platform_data = vpfe_cfg; 901 dm644x_vpfe_dev.dev.platform_data = vpfe_cfg;
902 platform_device_register(&dm644x_ccdc_dev); 902 platform_device_register(&dm644x_ccdc_dev);
903 platform_device_register(&dm644x_vpfe_dev); 903 platform_device_register(&dm644x_vpfe_dev);
904 /* Add ccdc clock aliases */
905 clk_add_alias("master", dm644x_ccdc_dev.name,
906 "vpss_master", NULL);
907 clk_add_alias("slave", dm644x_ccdc_dev.name,
908 "vpss_slave", NULL);
909 } 904 }
910 905
911 if (vpbe_cfg) { 906 if (vpbe_cfg) {
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index de439b7b9af1..2e1c9eae0a58 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -54,7 +54,10 @@ extern unsigned int da850_max_speed;
54#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000) 54#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
55#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) 55#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
56#define DA8XX_JTAG_ID_REG 0x18 56#define DA8XX_JTAG_ID_REG 0x18
57#define DA8XX_HOST1CFG_REG 0x44
58#define DA8XX_CHIPSIG_REG 0x174
57#define DA8XX_CFGCHIP0_REG 0x17c 59#define DA8XX_CFGCHIP0_REG 0x17c
60#define DA8XX_CFGCHIP1_REG 0x180
58#define DA8XX_CFGCHIP2_REG 0x184 61#define DA8XX_CFGCHIP2_REG 0x184
59#define DA8XX_CFGCHIP3_REG 0x188 62#define DA8XX_CFGCHIP3_REG 0x188
60 63
@@ -104,6 +107,8 @@ int __init da850_register_vpif_display
104int __init da850_register_vpif_capture 107int __init da850_register_vpif_capture
105 (struct vpif_capture_config *capture_config); 108 (struct vpif_capture_config *capture_config);
106void da8xx_restart(char mode, const char *cmd); 109void da8xx_restart(char mode, const char *cmd);
110void da8xx_rproc_reserve_cma(void);
111int da8xx_register_rproc(void);
107 112
108extern struct platform_device da8xx_serial_device; 113extern struct platform_device da8xx_serial_device;
109extern struct emac_platform_data da8xx_emac_pdata; 114extern struct emac_platform_data da8xx_emac_pdata;
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S
index 34290d14754b..b18b8ebc6508 100644
--- a/arch/arm/mach-davinci/include/mach/debug-macro.S
+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S
@@ -24,8 +24,6 @@
24 24
25#if defined(CONFIG_DEBUG_DAVINCI_DMx_UART0) 25#if defined(CONFIG_DEBUG_DAVINCI_DMx_UART0)
26#define UART_BASE DAVINCI_UART0_BASE 26#define UART_BASE DAVINCI_UART0_BASE
27#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART0)
28#define UART_BASE DA8XX_UART0_BASE
29#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART1) 27#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART1)
30#define UART_BASE DA8XX_UART1_BASE 28#define UART_BASE DA8XX_UART1_BASE
31#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART2) 29#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART2)
diff --git a/arch/arm/mach-davinci/pm.c b/arch/arm/mach-davinci/pm.c
index eb8360b33aa9..a508fe587af7 100644
--- a/arch/arm/mach-davinci/pm.c
+++ b/arch/arm/mach-davinci/pm.c
@@ -19,6 +19,7 @@
19#include <asm/delay.h> 19#include <asm/delay.h>
20#include <asm/io.h> 20#include <asm/io.h>
21 21
22#include <mach/common.h>
22#include <mach/da8xx.h> 23#include <mach/da8xx.h>
23#include <mach/sram.h> 24#include <mach/sram.h>
24#include <mach/pm.h> 25#include <mach/pm.h>
diff --git a/arch/arm/mach-davinci/pm_domain.c b/arch/arm/mach-davinci/pm_domain.c
index c90250e3bef8..6b98413cebd6 100644
--- a/arch/arm/mach-davinci/pm_domain.c
+++ b/arch/arm/mach-davinci/pm_domain.c
@@ -53,7 +53,7 @@ static struct dev_pm_domain davinci_pm_domain = {
53 53
54static struct pm_clk_notifier_block platform_bus_notifier = { 54static struct pm_clk_notifier_block platform_bus_notifier = {
55 .pm_domain = &davinci_pm_domain, 55 .pm_domain = &davinci_pm_domain,
56 .con_ids = { "fck", NULL, }, 56 .con_ids = { "fck", "master", "slave", NULL },
57}; 57};
58 58
59static int __init davinci_pm_runtime_init(void) 59static int __init davinci_pm_runtime_init(void)
diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c
index c5f7ee5cc80a..f18928b073f5 100644
--- a/arch/arm/mach-davinci/sram.c
+++ b/arch/arm/mach-davinci/sram.c
@@ -62,7 +62,7 @@ static int __init sram_init(void)
62 phys_addr_t phys = davinci_soc_info.sram_dma; 62 phys_addr_t phys = davinci_soc_info.sram_dma;
63 unsigned len = davinci_soc_info.sram_len; 63 unsigned len = davinci_soc_info.sram_len;
64 int status = 0; 64 int status = 0;
65 void *addr; 65 void __iomem *addr;
66 66
67 if (len) { 67 if (len) {
68 len = min_t(unsigned, len, SRAM_SIZE); 68 len = min_t(unsigned, len, SRAM_SIZE);
@@ -75,7 +75,7 @@ static int __init sram_init(void)
75 addr = ioremap(phys, len); 75 addr = ioremap(phys, len);
76 if (!addr) 76 if (!addr)
77 return -ENOMEM; 77 return -ENOMEM;
78 status = gen_pool_add_virt(sram_pool, (unsigned)addr, 78 status = gen_pool_add_virt(sram_pool, (unsigned long) addr,
79 phys, len, -1); 79 phys, len, -1);
80 if (status < 0) 80 if (status < 0)
81 iounmap(addr); 81 iounmap(addr);
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index dc1a209b9b66..3b2a70d43efa 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -272,7 +272,7 @@ static struct clk_lookup clks[] = {
272 CLK("tnetv107x-keypad.0", NULL, &clk_keypad), 272 CLK("tnetv107x-keypad.0", NULL, &clk_keypad),
273 CLK(NULL, "clk_gpio", &clk_gpio), 273 CLK(NULL, "clk_gpio", &clk_gpio),
274 CLK(NULL, "clk_mdio", &clk_mdio), 274 CLK(NULL, "clk_mdio", &clk_mdio),
275 CLK("davinci_mmc.0", NULL, &clk_sdio0), 275 CLK("dm6441-mmc.0", NULL, &clk_sdio0),
276 CLK(NULL, "uart0", &clk_uart0), 276 CLK(NULL, "uart0", &clk_uart0),
277 CLK(NULL, "uart1", &clk_uart1), 277 CLK(NULL, "uart1", &clk_uart1),
278 CLK(NULL, "timer0", &clk_timer0), 278 CLK(NULL, "timer0", &clk_timer0),
@@ -292,7 +292,7 @@ static struct clk_lookup clks[] = {
292 CLK(NULL, "clk_system", &clk_system), 292 CLK(NULL, "clk_system", &clk_system),
293 CLK(NULL, "clk_imcop", &clk_imcop), 293 CLK(NULL, "clk_imcop", &clk_imcop),
294 CLK(NULL, "clk_spare", &clk_spare), 294 CLK(NULL, "clk_spare", &clk_spare),
295 CLK("davinci_mmc.1", NULL, &clk_sdio1), 295 CLK("dm6441-mmc.1", NULL, &clk_sdio1),
296 CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst), 296 CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst),
297 CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst), 297 CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst),
298 CLK(NULL, NULL, NULL), 298 CLK(NULL, NULL, NULL),
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index 34509ffba221..2b4c648f99b6 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -10,6 +10,7 @@
10#include <mach/common.h> 10#include <mach/common.h>
11#include <mach/irqs.h> 11#include <mach/irqs.h>
12#include <mach/cputype.h> 12#include <mach/cputype.h>
13#include <mach/da8xx.h>
13#include <linux/platform_data/usb-davinci.h> 14#include <linux/platform_data/usb-davinci.h>
14 15
15#define DAVINCI_USB_OTG_BASE 0x01c64000 16#define DAVINCI_USB_OTG_BASE 0x01c64000
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 20:38:38 -0500