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-rw-r--r--arch/arm/mach-davinci/Makefile2
-rw-r--r--arch/arm/mach-davinci/board-evm.c339
-rw-r--r--arch/arm/mach-davinci/devices.c48
-rw-r--r--arch/arm/mach-davinci/gpio.c133
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/gpio.h73
-rw-r--r--arch/arm/mach-davinci/include/mach/i2c.h7
-rw-r--r--arch/arm/mach-davinci/include/mach/io.h43
-rw-r--r--arch/arm/mach-davinci/usb.c116
9 files changed, 614 insertions, 150 deletions
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 99ac2e55774d..4dc458597f40 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
5 5
6# Common objects 6# Common objects
7obj-y := time.o irq.o clock.o serial.o io.o id.o psc.o \ 7obj-y := time.o irq.o clock.o serial.o io.o id.o psc.o \
8 gpio.o mux.o 8 gpio.o mux.o devices.o usb.o
9 9
10# Board specific 10# Board specific
11obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o 11obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o
diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-evm.c
index 41f3cc4ac4af..a957d239a683 100644
--- a/arch/arm/mach-davinci/board-evm.c
+++ b/arch/arm/mach-davinci/board-evm.c
@@ -13,6 +13,13 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/gpio.h>
17#include <linux/leds.h>
18
19#include <linux/i2c.h>
20#include <linux/i2c/pcf857x.h>
21#include <linux/i2c/at24.h>
22
16#include <linux/mtd/mtd.h> 23#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
18#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
@@ -20,13 +27,14 @@
20 27
21#include <asm/setup.h> 28#include <asm/setup.h>
22#include <asm/mach-types.h> 29#include <asm/mach-types.h>
23#include <mach/hardware.h>
24 30
25#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 32#include <asm/mach/map.h>
27#include <asm/mach/flash.h> 33#include <asm/mach/flash.h>
28 34
35#include <mach/hardware.h>
29#include <mach/common.h> 36#include <mach/common.h>
37#include <mach/i2c.h>
30 38
31/* other misc. init functions */ 39/* other misc. init functions */
32void __init davinci_psc_init(void); 40void __init davinci_psc_init(void);
@@ -34,10 +42,10 @@ void __init davinci_irq_init(void);
34void __init davinci_map_common_io(void); 42void __init davinci_map_common_io(void);
35void __init davinci_init_common_hw(void); 43void __init davinci_init_common_hw(void);
36 44
37/* NOR Flash base address set to CS0 by default */ 45#if defined(CONFIG_MTD_PHYSMAP) || \
38#define NOR_FLASH_PHYS 0x02000000 46 defined(CONFIG_MTD_PHYSMAP_MODULE)
39 47
40static struct mtd_partition davinci_evm_partitions[] = { 48static struct mtd_partition davinci_evm_norflash_partitions[] = {
41 /* bootloader (U-Boot, etc) in first 4 sectors */ 49 /* bootloader (U-Boot, etc) in first 4 sectors */
42 { 50 {
43 .name = "bootloader", 51 .name = "bootloader",
@@ -68,32 +76,323 @@ static struct mtd_partition davinci_evm_partitions[] = {
68 } 76 }
69}; 77};
70 78
71static struct physmap_flash_data davinci_evm_flash_data = { 79static struct physmap_flash_data davinci_evm_norflash_data = {
72 .width = 2, 80 .width = 2,
73 .parts = davinci_evm_partitions, 81 .parts = davinci_evm_norflash_partitions,
74 .nr_parts = ARRAY_SIZE(davinci_evm_partitions), 82 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
75}; 83};
76 84
77/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF 85/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
78 * limits addresses to 16M, so using addresses past 16M will wrap */ 86 * limits addresses to 16M, so using addresses past 16M will wrap */
79static struct resource davinci_evm_flash_resource = { 87static struct resource davinci_evm_norflash_resource = {
80 .start = NOR_FLASH_PHYS, 88 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
81 .end = NOR_FLASH_PHYS + SZ_16M - 1, 89 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
82 .flags = IORESOURCE_MEM, 90 .flags = IORESOURCE_MEM,
83}; 91};
84 92
85static struct platform_device davinci_evm_flash_device = { 93static struct platform_device davinci_evm_norflash_device = {
86 .name = "physmap-flash", 94 .name = "physmap-flash",
87 .id = 0, 95 .id = 0,
88 .dev = { 96 .dev = {
89 .platform_data = &davinci_evm_flash_data, 97 .platform_data = &davinci_evm_norflash_data,
90 }, 98 },
91 .num_resources = 1, 99 .num_resources = 1,
92 .resource = &davinci_evm_flash_resource, 100 .resource = &davinci_evm_norflash_resource,
101};
102
103#endif
104
105#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
106 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
107
108static struct resource ide_resources[] = {
109 {
110 .start = DAVINCI_CFC_ATA_BASE,
111 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
112 .flags = IORESOURCE_MEM,
113 },
114 {
115 .start = IRQ_IDE,
116 .end = IRQ_IDE,
117 .flags = IORESOURCE_IRQ,
118 },
119};
120
121static u64 ide_dma_mask = DMA_32BIT_MASK;
122
123static struct platform_device ide_dev = {
124 .name = "palm_bk3710",
125 .id = -1,
126 .resource = ide_resources,
127 .num_resources = ARRAY_SIZE(ide_resources),
128 .dev = {
129 .dma_mask = &ide_dma_mask,
130 .coherent_dma_mask = DMA_32BIT_MASK,
131 },
132};
133
134#endif
135
136/*----------------------------------------------------------------------*/
137
138/*
139 * I2C GPIO expanders
140 */
141
142#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
143
144
145/* U2 -- LEDs */
146
147static struct gpio_led evm_leds[] = {
148 { .name = "DS8", .active_low = 1,
149 .default_trigger = "heartbeat", },
150 { .name = "DS7", .active_low = 1, },
151 { .name = "DS6", .active_low = 1, },
152 { .name = "DS5", .active_low = 1, },
153 { .name = "DS4", .active_low = 1, },
154 { .name = "DS3", .active_low = 1, },
155 { .name = "DS2", .active_low = 1,
156 .default_trigger = "mmc0", },
157 { .name = "DS1", .active_low = 1,
158 .default_trigger = "ide-disk", },
159};
160
161static const struct gpio_led_platform_data evm_led_data = {
162 .num_leds = ARRAY_SIZE(evm_leds),
163 .leds = evm_leds,
164};
165
166static struct platform_device *evm_led_dev;
167
168static int
169evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
170{
171 struct gpio_led *leds = evm_leds;
172 int status;
173
174 while (ngpio--) {
175 leds->gpio = gpio++;
176 leds++;
177 }
178
179 /* what an extremely annoying way to be forced to handle
180 * device unregistration ...
181 */
182 evm_led_dev = platform_device_alloc("leds-gpio", 0);
183 platform_device_add_data(evm_led_dev,
184 &evm_led_data, sizeof evm_led_data);
185
186 evm_led_dev->dev.parent = &client->dev;
187 status = platform_device_add(evm_led_dev);
188 if (status < 0) {
189 platform_device_put(evm_led_dev);
190 evm_led_dev = NULL;
191 }
192 return status;
193}
194
195static int
196evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
197{
198 if (evm_led_dev) {
199 platform_device_unregister(evm_led_dev);
200 evm_led_dev = NULL;
201 }
202 return 0;
203}
204
205static struct pcf857x_platform_data pcf_data_u2 = {
206 .gpio_base = PCF_Uxx_BASE(0),
207 .setup = evm_led_setup,
208 .teardown = evm_led_teardown,
209};
210
211
212/* U18 - A/V clock generator and user switch */
213
214static int sw_gpio;
215
216static ssize_t
217sw_show(struct device *d, struct device_attribute *a, char *buf)
218{
219 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
220
221 strcpy(buf, s);
222 return strlen(s);
223}
224
225static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
226
227static int
228evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
229{
230 int status;
231
232 /* export dip switch option */
233 sw_gpio = gpio + 7;
234 status = gpio_request(sw_gpio, "user_sw");
235 if (status == 0)
236 status = gpio_direction_input(sw_gpio);
237 if (status == 0)
238 status = device_create_file(&client->dev, &dev_attr_user_sw);
239 else
240 gpio_free(sw_gpio);
241 if (status != 0)
242 sw_gpio = -EINVAL;
243
244 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
245 gpio_request(gpio + 3, "pll_fs2");
246 gpio_direction_output(gpio + 3, 0);
247
248 gpio_request(gpio + 2, "pll_fs1");
249 gpio_direction_output(gpio + 2, 0);
250
251 gpio_request(gpio + 1, "pll_sr");
252 gpio_direction_output(gpio + 1, 0);
253
254 return 0;
255}
256
257static int
258evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
259{
260 gpio_free(gpio + 1);
261 gpio_free(gpio + 2);
262 gpio_free(gpio + 3);
263
264 if (sw_gpio > 0) {
265 device_remove_file(&client->dev, &dev_attr_user_sw);
266 gpio_free(sw_gpio);
267 }
268 return 0;
269}
270
271static struct pcf857x_platform_data pcf_data_u18 = {
272 .gpio_base = PCF_Uxx_BASE(1),
273 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
274 .setup = evm_u18_setup,
275 .teardown = evm_u18_teardown,
93}; 276};
94 277
278
279/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
280
281static int
282evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
283{
284 /* p0 = nDRV_VBUS (initial: don't supply it) */
285 gpio_request(gpio + 0, "nDRV_VBUS");
286 gpio_direction_output(gpio + 0, 1);
287
288 /* p1 = VDDIMX_EN */
289 gpio_request(gpio + 1, "VDDIMX_EN");
290 gpio_direction_output(gpio + 1, 1);
291
292 /* p2 = VLYNQ_EN */
293 gpio_request(gpio + 2, "VLYNQ_EN");
294 gpio_direction_output(gpio + 2, 1);
295
296 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
297 gpio_request(gpio + 3, "nCF_RESET");
298 gpio_direction_output(gpio + 3, 0);
299
300 /* (p4 unused) */
301
302 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
303 gpio_request(gpio + 5, "WLAN_RESET");
304 gpio_direction_output(gpio + 5, 1);
305
306 /* p6 = nATA_SEL (initial: select) */
307 gpio_request(gpio + 6, "nATA_SEL");
308 gpio_direction_output(gpio + 6, 0);
309
310 /* p7 = nCF_SEL (initial: deselect) */
311 gpio_request(gpio + 7, "nCF_SEL");
312 gpio_direction_output(gpio + 7, 1);
313
314 return 0;
315}
316
317static int
318evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
319{
320 gpio_free(gpio + 7);
321 gpio_free(gpio + 6);
322 gpio_free(gpio + 5);
323 gpio_free(gpio + 3);
324 gpio_free(gpio + 2);
325 gpio_free(gpio + 1);
326 gpio_free(gpio + 0);
327 return 0;
328}
329
330static struct pcf857x_platform_data pcf_data_u35 = {
331 .gpio_base = PCF_Uxx_BASE(2),
332 .setup = evm_u35_setup,
333 .teardown = evm_u35_teardown,
334};
335
336/*----------------------------------------------------------------------*/
337
338/* Most of this EEPROM is unused, but U-Boot uses some data:
339 * - 0x7f00, 6 bytes Ethernet Address
340 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
341 * - ... newer boards may have more
342 */
343static struct at24_platform_data eeprom_info = {
344 .byte_len = (256*1024) / 8,
345 .page_size = 64,
346 .flags = AT24_FLAG_ADDR16,
347};
348
349static struct i2c_board_info __initdata i2c_info[] = {
350 {
351 I2C_BOARD_INFO("pcf8574", 0x38),
352 .platform_data = &pcf_data_u2,
353 },
354 {
355 I2C_BOARD_INFO("pcf8574", 0x39),
356 .platform_data = &pcf_data_u18,
357 },
358 {
359 I2C_BOARD_INFO("pcf8574", 0x3a),
360 .platform_data = &pcf_data_u35,
361 },
362 {
363 I2C_BOARD_INFO("24c256", 0x50),
364 .platform_data = &eeprom_info,
365 },
366 /* ALSO:
367 * - tvl320aic33 audio codec (0x1b)
368 * - msp430 microcontroller (0x23)
369 * - tvp5146 video decoder (0x5d)
370 */
371};
372
373/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
374 * which requires 100 usec of idle bus after i2c writes sent to it.
375 */
376static struct davinci_i2c_platform_data i2c_pdata = {
377 .bus_freq = 20 /* kHz */,
378 .bus_delay = 100 /* usec */,
379};
380
381static void __init evm_init_i2c(void)
382{
383 davinci_init_i2c(&i2c_pdata);
384 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
385}
386
95static struct platform_device *davinci_evm_devices[] __initdata = { 387static struct platform_device *davinci_evm_devices[] __initdata = {
96 &davinci_evm_flash_device, 388#if defined(CONFIG_MTD_PHYSMAP) || \
389 defined(CONFIG_MTD_PHYSMAP_MODULE)
390 &davinci_evm_norflash_device,
391#endif
392#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
393 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
394 &ide_dev,
395#endif
97}; 396};
98 397
99static void __init 398static void __init
@@ -106,13 +405,21 @@ static __init void davinci_evm_init(void)
106{ 405{
107 davinci_psc_init(); 406 davinci_psc_init();
108 407
109#if defined(CONFIG_BLK_DEV_DAVINCI) || defined(CONFIG_BLK_DEV_DAVINCI_MODULE) 408#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
409 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
410#if defined(CONFIG_MTD_PHYSMAP) || \
411 defined(CONFIG_MTD_PHYSMAP_MODULE)
110 printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, " 412 printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, "
111 "but share pins.\n\t Disable IDE for NOR support.\n"); 413 "but share pins.\n\t Disable IDE for NOR support.\n");
112#endif 414#endif
415#endif
113 416
114 platform_add_devices(davinci_evm_devices, 417 platform_add_devices(davinci_evm_devices,
115 ARRAY_SIZE(davinci_evm_devices)); 418 ARRAY_SIZE(davinci_evm_devices));
419 evm_init_i2c();
420
421 /* irlml6401 sustains over 3A, switches 5V in under 8 msec */
422 setup_usb(500, 8);
116} 423}
117 424
118static __init void davinci_evm_irq_init(void) 425static __init void davinci_evm_irq_init(void)
@@ -124,7 +431,7 @@ static __init void davinci_evm_irq_init(void)
124MACHINE_START(DAVINCI_EVM, "DaVinci EVM") 431MACHINE_START(DAVINCI_EVM, "DaVinci EVM")
125 /* Maintainer: MontaVista Software <source@mvista.com> */ 432 /* Maintainer: MontaVista Software <source@mvista.com> */
126 .phys_io = IO_PHYS, 433 .phys_io = IO_PHYS,
127 .io_pg_offst = (io_p2v(IO_PHYS) >> 18) & 0xfffc, 434 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
128 .boot_params = (DAVINCI_DDR_BASE + 0x100), 435 .boot_params = (DAVINCI_DDR_BASE + 0x100),
129 .map_io = davinci_evm_map_io, 436 .map_io = davinci_evm_map_io,
130 .init_irq = davinci_evm_irq_init, 437 .init_irq = davinci_evm_irq_init,
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
new file mode 100644
index 000000000000..3d4b1de8f898
--- /dev/null
+++ b/arch/arm/mach-davinci/devices.c
@@ -0,0 +1,48 @@
1/*
2 * mach-davinci/devices.c
3 *
4 * DaVinci platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/dma-mapping.h>
17#include <linux/io.h>
18
19#include <asm/mach/map.h>
20
21#include <mach/hardware.h>
22#include <mach/i2c.h>
23
24static struct resource i2c_resources[] = {
25 {
26 .start = DAVINCI_I2C_BASE,
27 .end = DAVINCI_I2C_BASE + 0x40,
28 .flags = IORESOURCE_MEM,
29 },
30 {
31 .start = IRQ_I2C,
32 .flags = IORESOURCE_IRQ,
33 },
34};
35
36static struct platform_device davinci_i2c_device = {
37 .name = "i2c_davinci",
38 .id = 1,
39 .num_resources = ARRAY_SIZE(i2c_resources),
40 .resource = i2c_resources,
41};
42
43void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
44{
45 davinci_i2c_device.dev.platform_data = pdata;
46 (void) platform_device_register(&davinci_i2c_device);
47}
48
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 574cb810a500..b49e9d092aab 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * TI DaVinci GPIO Support 2 * TI DaVinci GPIO Support
3 * 3 *
4 * Copyright (c) 2006 David Brownell 4 * Copyright (c) 2006-2007 David Brownell
5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -26,47 +26,45 @@
26 26
27#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
28 28
29static DEFINE_SPINLOCK(gpio_lock);
30static DECLARE_BITMAP(gpio_in_use, DAVINCI_N_GPIO);
31 29
32int gpio_request(unsigned gpio, const char *tag) 30static DEFINE_SPINLOCK(gpio_lock);
33{
34 if (gpio >= DAVINCI_N_GPIO)
35 return -EINVAL;
36 31
37 if (test_and_set_bit(gpio, gpio_in_use)) 32struct davinci_gpio {
38 return -EBUSY; 33 struct gpio_chip chip;
34 struct gpio_controller *__iomem regs;
35};
39 36
40 return 0; 37static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
41}
42EXPORT_SYMBOL(gpio_request);
43 38
44void gpio_free(unsigned gpio)
45{
46 if (gpio >= DAVINCI_N_GPIO)
47 return;
48
49 clear_bit(gpio, gpio_in_use);
50}
51EXPORT_SYMBOL(gpio_free);
52 39
53/* create a non-inlined version */ 40/* create a non-inlined version */
54static struct gpio_controller *__iomem gpio2controller(unsigned gpio) 41static struct gpio_controller *__iomem __init gpio2controller(unsigned gpio)
55{ 42{
56 return __gpio_to_controller(gpio); 43 return __gpio_to_controller(gpio);
57} 44}
58 45
46
47/*--------------------------------------------------------------------------*/
48
59/* 49/*
60 * Assuming the pin is muxed as a gpio output, set its output value. 50 * board setup code *MUST* set PINMUX0 and PINMUX1 as
51 * needed, and enable the GPIO clock.
61 */ 52 */
62void __gpio_set(unsigned gpio, int value) 53
54static int davinci_direction_in(struct gpio_chip *chip, unsigned offset)
63{ 55{
64 struct gpio_controller *__iomem g = gpio2controller(gpio); 56 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
57 struct gpio_controller *__iomem g = d->regs;
58 u32 temp;
65 59
66 __raw_writel(__gpio_mask(gpio), value ? &g->set_data : &g->clr_data); 60 spin_lock(&gpio_lock);
67} 61 temp = __raw_readl(&g->dir);
68EXPORT_SYMBOL(__gpio_set); 62 temp |= (1 << offset);
63 __raw_writel(temp, &g->dir);
64 spin_unlock(&gpio_lock);
69 65
66 return 0;
67}
70 68
71/* 69/*
72 * Read the pin's value (works even if it's set up as output); 70 * Read the pin's value (works even if it's set up as output);
@@ -75,61 +73,72 @@ EXPORT_SYMBOL(__gpio_set);
75 * Note that changes are synched to the GPIO clock, so reading values back 73 * Note that changes are synched to the GPIO clock, so reading values back
76 * right after you've set them may give old values. 74 * right after you've set them may give old values.
77 */ 75 */
78int __gpio_get(unsigned gpio) 76static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset)
79{ 77{
80 struct gpio_controller *__iomem g = gpio2controller(gpio); 78 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
79 struct gpio_controller *__iomem g = d->regs;
81 80
82 return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); 81 return (1 << offset) & __raw_readl(&g->in_data);
83} 82}
84EXPORT_SYMBOL(__gpio_get);
85 83
86 84static int
87/*--------------------------------------------------------------------------*/ 85davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value)
88
89/*
90 * board setup code *MUST* set PINMUX0 and PINMUX1 as
91 * needed, and enable the GPIO clock.
92 */
93
94int gpio_direction_input(unsigned gpio)
95{ 86{
96 struct gpio_controller *__iomem g = gpio2controller(gpio); 87 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
88 struct gpio_controller *__iomem g = d->regs;
97 u32 temp; 89 u32 temp;
98 u32 mask; 90 u32 mask = 1 << offset;
99
100 if (!g)
101 return -EINVAL;
102 91
103 spin_lock(&gpio_lock); 92 spin_lock(&gpio_lock);
104 mask = __gpio_mask(gpio);
105 temp = __raw_readl(&g->dir); 93 temp = __raw_readl(&g->dir);
106 temp |= mask; 94 temp &= ~mask;
95 __raw_writel(mask, value ? &g->set_data : &g->clr_data);
107 __raw_writel(temp, &g->dir); 96 __raw_writel(temp, &g->dir);
108 spin_unlock(&gpio_lock); 97 spin_unlock(&gpio_lock);
109 return 0; 98 return 0;
110} 99}
111EXPORT_SYMBOL(gpio_direction_input);
112 100
113int gpio_direction_output(unsigned gpio, int value) 101/*
102 * Assuming the pin is muxed as a gpio output, set its output value.
103 */
104static void
105davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
114{ 106{
115 struct gpio_controller *__iomem g = gpio2controller(gpio); 107 struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
116 u32 temp; 108 struct gpio_controller *__iomem g = d->regs;
117 u32 mask;
118 109
119 if (!g) 110 __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data);
120 return -EINVAL; 111}
112
113static int __init davinci_gpio_setup(void)
114{
115 int i, base;
116
117 for (i = 0, base = 0;
118 i < ARRAY_SIZE(chips);
119 i++, base += 32) {
120 chips[i].chip.label = "DaVinci";
121
122 chips[i].chip.direction_input = davinci_direction_in;
123 chips[i].chip.get = davinci_gpio_get;
124 chips[i].chip.direction_output = davinci_direction_out;
125 chips[i].chip.set = davinci_gpio_set;
126
127 chips[i].chip.base = base;
128 chips[i].chip.ngpio = DAVINCI_N_GPIO - base;
129 if (chips[i].chip.ngpio > 32)
130 chips[i].chip.ngpio = 32;
131
132 chips[i].regs = gpio2controller(base);
133
134 gpiochip_add(&chips[i].chip);
135 }
121 136
122 spin_lock(&gpio_lock);
123 mask = __gpio_mask(gpio);
124 temp = __raw_readl(&g->dir);
125 temp &= ~mask;
126 __raw_writel(mask, value ? &g->set_data : &g->clr_data);
127 __raw_writel(temp, &g->dir);
128 spin_unlock(&gpio_lock);
129 return 0; 137 return 0;
130} 138}
131EXPORT_SYMBOL(gpio_direction_output); 139pure_initcall(davinci_gpio_setup);
132 140
141/*--------------------------------------------------------------------------*/
133/* 142/*
134 * We expect irqs will normally be set up as input pins, but they can also be 143 * We expect irqs will normally be set up as input pins, but they can also be
135 * used as output pins ... which is convenient for testing. 144 * used as output pins ... which is convenient for testing.
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index a97dfbb15e57..4b522e5c70ec 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -16,4 +16,7 @@ struct sys_timer;
16 16
17extern struct sys_timer davinci_timer; 17extern struct sys_timer davinci_timer;
18 18
19/* parameters describe VBUS sourcing for host mode */
20extern void setup_usb(unsigned mA, unsigned potpgt_msec);
21
19#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ 22#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index ec151ccf1e8f..b3a2961f0f46 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -14,6 +14,7 @@
14#define __DAVINCI_GPIO_H 14#define __DAVINCI_GPIO_H
15 15
16#include <linux/io.h> 16#include <linux/io.h>
17#include <asm-generic/gpio.h>
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18 19
19/* 20/*
@@ -27,13 +28,16 @@
27 * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are 28 * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are
28 * used as gpios, not with other peripherals. 29 * used as gpios, not with other peripherals.
29 * 30 *
30 * GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, and maybe 31 * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
31 * for later updates, code should write GPIO(N) or: 32 * and maybe for later updates, code should write GPIO(N) or:
32 * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53) 33 * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53)
33 * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70) 34 * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70)
34 * 35 *
35 * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc 36 * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc
36 * for now, that's != GPIO(N) 37 * for now, that's != GPIO(N)
38 *
39 * GPIOs can also be on external chips, numbered after the ones built-in
40 * to the DaVinci chip. For now, they won't be usable as IRQ sources.
37 */ 41 */
38#define GPIO(X) (X) /* 0 <= X <= 70 */ 42#define GPIO(X) (X) /* 0 <= X <= 70 */
39#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */ 43#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */
@@ -67,11 +71,11 @@ __gpio_to_controller(unsigned gpio)
67 void *__iomem ptr; 71 void *__iomem ptr;
68 72
69 if (gpio < 32) 73 if (gpio < 32)
70 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); 74 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
71 else if (gpio < 64) 75 else if (gpio < 64)
72 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); 76 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
73 else if (gpio < DAVINCI_N_GPIO) 77 else if (gpio < DAVINCI_N_GPIO)
74 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); 78 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
75 else 79 else
76 ptr = NULL; 80 ptr = NULL;
77 return ptr; 81 return ptr;
@@ -83,25 +87,17 @@ static inline u32 __gpio_mask(unsigned gpio)
83} 87}
84 88
85/* The get/set/clear functions will inline when called with constant 89/* The get/set/clear functions will inline when called with constant
86 * parameters, for low-overhead bitbanging. Illegal constant parameters 90 * parameters referencing built-in GPIOs, for low-overhead bitbanging.
87 * cause link-time errors.
88 * 91 *
89 * Otherwise, calls with variable parameters use outlined functions. 92 * Otherwise, calls with variable parameters or referencing external
93 * GPIOs (e.g. on GPIO expander chips) use outlined functions.
90 */ 94 */
91extern int __error_inval_gpio(void);
92
93extern void __gpio_set(unsigned gpio, int value);
94extern int __gpio_get(unsigned gpio);
95
96static inline void gpio_set_value(unsigned gpio, int value) 95static inline void gpio_set_value(unsigned gpio, int value)
97{ 96{
98 if (__builtin_constant_p(value)) { 97 if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) {
99 struct gpio_controller *__iomem g; 98 struct gpio_controller *__iomem g;
100 u32 mask; 99 u32 mask;
101 100
102 if (gpio >= DAVINCI_N_GPIO)
103 __error_inval_gpio();
104
105 g = __gpio_to_controller(gpio); 101 g = __gpio_to_controller(gpio);
106 mask = __gpio_mask(gpio); 102 mask = __gpio_mask(gpio);
107 if (value) 103 if (value)
@@ -111,48 +107,47 @@ static inline void gpio_set_value(unsigned gpio, int value)
111 return; 107 return;
112 } 108 }
113 109
114 __gpio_set(gpio, value); 110 __gpio_set_value(gpio, value);
115} 111}
116 112
117/* Returns zero or nonzero; works for gpios configured as inputs OR 113/* Returns zero or nonzero; works for gpios configured as inputs OR
118 * as outputs. 114 * as outputs, at least for built-in GPIOs.
119 * 115 *
120 * NOTE: changes in reported values are synchronized to the GPIO clock. 116 * NOTE: for built-in GPIOs, changes in reported values are synchronized
121 * This is most easily seen after calling gpio_set_value() and then immediatly 117 * to the GPIO clock. This is easily seen after calling gpio_set_value()
122 * gpio_get_value(), where the gpio_get_value() would return the old value 118 * and then immediately gpio_get_value(), where the gpio_get_value() will
123 * until the GPIO clock ticks and the new value gets latched. 119 * return the old value until the GPIO clock ticks and the new value gets
120 * latched.
124 */ 121 */
125
126static inline int gpio_get_value(unsigned gpio) 122static inline int gpio_get_value(unsigned gpio)
127{ 123{
128 struct gpio_controller *__iomem g; 124 struct gpio_controller *__iomem g;
129
130 if (!__builtin_constant_p(gpio))
131 return __gpio_get(gpio);
132 125
133 if (gpio >= DAVINCI_N_GPIO) 126 if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO)
134 return __error_inval_gpio(); 127 return __gpio_get_value(gpio);
135 128
136 g = __gpio_to_controller(gpio); 129 g = __gpio_to_controller(gpio);
137 return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); 130 return __gpio_mask(gpio) & __raw_readl(&g->in_data);
138} 131}
139 132
140/* powerup default direction is IN */ 133static inline int gpio_cansleep(unsigned gpio)
141extern int gpio_direction_input(unsigned gpio); 134{
142extern int gpio_direction_output(unsigned gpio, int value); 135 if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO)
143 136 return 0;
144#include <asm-generic/gpio.h> /* cansleep wrappers */ 137 else
145 138 return __gpio_cansleep(gpio);
146extern int gpio_request(unsigned gpio, const char *tag); 139}
147extern void gpio_free(unsigned gpio);
148 140
149static inline int gpio_to_irq(unsigned gpio) 141static inline int gpio_to_irq(unsigned gpio)
150{ 142{
143 if (gpio >= DAVINCI_N_GPIO)
144 return -EINVAL;
151 return DAVINCI_N_AINTC_IRQ + gpio; 145 return DAVINCI_N_AINTC_IRQ + gpio;
152} 146}
153 147
154static inline int irq_to_gpio(unsigned irq) 148static inline int irq_to_gpio(unsigned irq)
155{ 149{
150 /* caller guarantees gpio_to_irq() succeeded */
156 return irq - DAVINCI_N_AINTC_IRQ; 151 return irq - DAVINCI_N_AINTC_IRQ;
157} 152}
158 153
diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h
index e2f54168abd1..c248e9b7e825 100644
--- a/arch/arm/mach-davinci/include/mach/i2c.h
+++ b/arch/arm/mach-davinci/include/mach/i2c.h
@@ -14,8 +14,11 @@
14 14
15/* All frequencies are expressed in kHz */ 15/* All frequencies are expressed in kHz */
16struct davinci_i2c_platform_data { 16struct davinci_i2c_platform_data {
17 unsigned int bus_freq; /* standard bus frequency */ 17 unsigned int bus_freq; /* standard bus frequency (kHz) */
18 unsigned int bus_delay; /* transaction delay */ 18 unsigned int bus_delay; /* post-transaction delay (usec) */
19}; 19};
20 20
21/* for board setup code */
22void davinci_init_i2c(struct davinci_i2c_platform_data *);
23
21#endif /* __ASM_ARCH_I2C_H */ 24#endif /* __ASM_ARCH_I2C_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index e7accb910864..b78ee9140496 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -22,9 +22,8 @@
22#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ 22#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */
23#define IO_SIZE 0x00400000 23#define IO_SIZE 0x00400000
24#define IO_VIRT (IO_PHYS + IO_OFFSET) 24#define IO_VIRT (IO_PHYS + IO_OFFSET)
25#define io_p2v(pa) ((pa) + IO_OFFSET)
26#define io_v2p(va) ((va) - IO_OFFSET) 25#define io_v2p(va) ((va) - IO_OFFSET)
27#define IO_ADDRESS(x) io_p2v(x) 26#define __IO_ADDRESS(x) ((x) + IO_OFFSET)
28 27
29/* 28/*
30 * We don't actually have real ISA nor PCI buses, but there is so many 29 * We don't actually have real ISA nor PCI buses, but there is so many
@@ -35,7 +34,12 @@
35#define __mem_pci(a) (a) 34#define __mem_pci(a) (a)
36#define __mem_isa(a) (a) 35#define __mem_isa(a) (a)
37 36
38#ifndef __ASSEMBLER__ 37#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
38
39#ifdef __ASSEMBLER__
40#define IOMEM(x) x
41#else
42#define IOMEM(x) ((void __force __iomem *)(x))
39 43
40/* 44/*
41 * Functions to access the DaVinci IO region 45 * Functions to access the DaVinci IO region
@@ -46,34 +50,13 @@
46 * - DO NOT use hardcoded virtual addresses to allow changing the 50 * - DO NOT use hardcoded virtual addresses to allow changing the
47 * IO address space again if needed 51 * IO address space again if needed
48 */ 52 */
49#define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 53#define davinci_readb(a) __raw_readb(IO_ADDRESS(a))
50#define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 54#define davinci_readw(a) __raw_readw(IO_ADDRESS(a))
51#define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 55#define davinci_readl(a) __raw_readl(IO_ADDRESS(a))
52
53#define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
54#define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
55#define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
56
57/* 16 bit uses LDRH/STRH, base +/- offset_8 */
58typedef struct { volatile u16 offset[256]; } __regbase16;
59#define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \
60 ->offset[((vaddr)&0xff)>>1]
61#define __REG16(paddr) __REGV16(io_p2v(paddr))
62
63/* 8/32 bit uses LDR/STR, base +/- offset_12 */
64typedef struct { volatile u8 offset[4096]; } __regbase8;
65#define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \
66 ->offset[((vaddr)&4095)>>0]
67#define __REG8(paddr) __REGV8(io_p2v(paddr))
68
69typedef struct { volatile u32 offset[4096]; } __regbase32;
70#define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \
71 ->offset[((vaddr)&4095)>>2]
72
73#define __REG(paddr) __REGV32(io_p2v(paddr))
74#else
75 56
76#define __REG(x) (*((volatile unsigned long *)io_p2v(x))) 57#define davinci_writeb(v, a) __raw_writeb(v, IO_ADDRESS(a))
58#define davinci_writew(v, a) __raw_writew(v, IO_ADDRESS(a))
59#define davinci_writel(v, a) __raw_writel(v, IO_ADDRESS(a))
77 60
78#endif /* __ASSEMBLER__ */ 61#endif /* __ASSEMBLER__ */
79#endif /* __ASM_ARCH_IO_H */ 62#endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
new file mode 100644
index 000000000000..fe182a85159c
--- /dev/null
+++ b/arch/arm/mach-davinci/usb.c
@@ -0,0 +1,116 @@
1/*
2 * USB
3 */
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/init.h>
7#include <linux/platform_device.h>
8#include <linux/dma-mapping.h>
9
10#include <linux/usb/musb.h>
11#include <linux/usb/otg.h>
12
13#include <mach/common.h>
14#include <mach/hardware.h>
15
16#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
17static struct musb_hdrc_eps_bits musb_eps[] = {
18 { "ep1_tx", 8, },
19 { "ep1_rx", 8, },
20 { "ep2_tx", 8, },
21 { "ep2_rx", 8, },
22 { "ep3_tx", 5, },
23 { "ep3_rx", 5, },
24 { "ep4_tx", 5, },
25 { "ep4_rx", 5, },
26};
27
28static struct musb_hdrc_config musb_config = {
29 .multipoint = true,
30 .dyn_fifo = true,
31 .soft_con = true,
32 .dma = true,
33
34 .num_eps = 5,
35 .dma_channels = 8,
36 .ram_bits = 10,
37 .eps_bits = musb_eps,
38};
39
40static struct musb_hdrc_platform_data usb_data = {
41#if defined(CONFIG_USB_MUSB_OTG)
42 /* OTG requires a Mini-AB connector */
43 .mode = MUSB_OTG,
44#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
45 .mode = MUSB_PERIPHERAL,
46#elif defined(CONFIG_USB_MUSB_HOST)
47 .mode = MUSB_HOST,
48#endif
49 .config = &musb_config,
50};
51
52static struct resource usb_resources[] = {
53 {
54 /* physical address */
55 .start = DAVINCI_USB_OTG_BASE,
56 .end = DAVINCI_USB_OTG_BASE + 0x5ff,
57 .flags = IORESOURCE_MEM,
58 },
59 {
60 .start = IRQ_USBINT,
61 .flags = IORESOURCE_IRQ,
62 },
63};
64
65static u64 usb_dmamask = DMA_32BIT_MASK;
66
67static struct platform_device usb_dev = {
68 .name = "musb_hdrc",
69 .id = -1,
70 .dev = {
71 .platform_data = &usb_data,
72 .dma_mask = &usb_dmamask,
73 .coherent_dma_mask = DMA_32BIT_MASK,
74 },
75 .resource = usb_resources,
76 .num_resources = ARRAY_SIZE(usb_resources),
77};
78
79#ifdef CONFIG_USB_MUSB_OTG
80
81static struct otg_transceiver *xceiv;
82
83struct otg_transceiver *otg_get_transceiver(void)
84{
85 if (xceiv)
86 get_device(xceiv->dev);
87 return xceiv;
88}
89EXPORT_SYMBOL(otg_get_transceiver);
90
91int otg_set_transceiver(struct otg_transceiver *x)
92{
93 if (xceiv && x)
94 return -EBUSY;
95 xceiv = x;
96 return 0;
97}
98EXPORT_SYMBOL(otg_set_transceiver);
99
100#endif
101
102void __init setup_usb(unsigned mA, unsigned potpgt_msec)
103{
104 usb_data.power = mA / 2;
105 usb_data.potpgt = potpgt_msec / 2;
106 platform_device_register(&usb_dev);
107}
108
109#else
110
111void __init setup_usb(unsigned mA, unsigned potpgt_msec)
112{
113}
114
115#endif /* CONFIG_USB_MUSB_HDRC */
116
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-03 09:22:29 -0500