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-rw-r--r--arch/arm/mach-davinci/da850.c2
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c99
2 files changed, 9 insertions, 92 deletions
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 2ab00434b2eb..85399c98f84a 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -472,7 +472,7 @@ static struct clk_lookup da850_clks[] = {
472 CLK("spi_davinci.0", NULL, &spi0_clk), 472 CLK("spi_davinci.0", NULL, &spi0_clk),
473 CLK("spi_davinci.1", NULL, &spi1_clk), 473 CLK("spi_davinci.1", NULL, &spi1_clk),
474 CLK("vpif", NULL, &vpif_clk), 474 CLK("vpif", NULL, &vpif_clk),
475 CLK("ahci", NULL, &sata_clk), 475 CLK("ahci_da850", NULL, &sata_clk),
476 CLK("davinci-rproc.0", NULL, &dsp_clk), 476 CLK("davinci-rproc.0", NULL, &dsp_clk),
477 CLK("ehrpwm", "fck", &ehrpwm_clk), 477 CLK("ehrpwm", "fck", &ehrpwm_clk),
478 CLK("ehrpwm", "tbclk", &ehrpwm_tbclk), 478 CLK("ehrpwm", "tbclk", &ehrpwm_tbclk),
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 0486cdf28c8d..56ea41d5f849 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -1020,7 +1020,6 @@ int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
1020} 1020}
1021 1021
1022#ifdef CONFIG_ARCH_DAVINCI_DA850 1022#ifdef CONFIG_ARCH_DAVINCI_DA850
1023
1024static struct resource da850_sata_resources[] = { 1023static struct resource da850_sata_resources[] = {
1025 { 1024 {
1026 .start = DA850_SATA_BASE, 1025 .start = DA850_SATA_BASE,
@@ -1028,103 +1027,22 @@ static struct resource da850_sata_resources[] = {
1028 .flags = IORESOURCE_MEM, 1027 .flags = IORESOURCE_MEM,
1029 }, 1028 },
1030 { 1029 {
1030 .start = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG,
1031 .end = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG + 0x3,
1032 .flags = IORESOURCE_MEM,
1033 },
1034 {
1031 .start = IRQ_DA850_SATAINT, 1035 .start = IRQ_DA850_SATAINT,
1032 .flags = IORESOURCE_IRQ, 1036 .flags = IORESOURCE_IRQ,
1033 }, 1037 },
1034}; 1038};
1035 1039
1036/* SATA PHY Control Register offset from AHCI base */
1037#define SATA_P0PHYCR_REG 0x178
1038
1039#define SATA_PHY_MPY(x) ((x) << 0)
1040#define SATA_PHY_LOS(x) ((x) << 6)
1041#define SATA_PHY_RXCDR(x) ((x) << 10)
1042#define SATA_PHY_RXEQ(x) ((x) << 13)
1043#define SATA_PHY_TXSWING(x) ((x) << 19)
1044#define SATA_PHY_ENPLL(x) ((x) << 31)
1045
1046static struct clk *da850_sata_clk;
1047static unsigned long da850_sata_refclkpn;
1048
1049/* Supported DA850 SATA crystal frequencies */
1050#define KHZ_TO_HZ(freq) ((freq) * 1000)
1051static unsigned long da850_sata_xtal[] = {
1052 KHZ_TO_HZ(300000),
1053 KHZ_TO_HZ(250000),
1054 0, /* Reserved */
1055 KHZ_TO_HZ(187500),
1056 KHZ_TO_HZ(150000),
1057 KHZ_TO_HZ(125000),
1058 KHZ_TO_HZ(120000),
1059 KHZ_TO_HZ(100000),
1060 KHZ_TO_HZ(75000),
1061 KHZ_TO_HZ(60000),
1062};
1063
1064static int da850_sata_init(struct device *dev, void __iomem *addr)
1065{
1066 int i, ret;
1067 unsigned int val;
1068
1069 da850_sata_clk = clk_get(dev, NULL);
1070 if (IS_ERR(da850_sata_clk))
1071 return PTR_ERR(da850_sata_clk);
1072
1073 ret = clk_prepare_enable(da850_sata_clk);
1074 if (ret)
1075 goto err0;
1076
1077 /* Enable SATA clock receiver */
1078 val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
1079 val &= ~BIT(0);
1080 __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG));
1081
1082 /* Get the multiplier needed for 1.5GHz PLL output */
1083 for (i = 0; i < ARRAY_SIZE(da850_sata_xtal); i++)
1084 if (da850_sata_xtal[i] == da850_sata_refclkpn)
1085 break;
1086
1087 if (i == ARRAY_SIZE(da850_sata_xtal)) {
1088 ret = -EINVAL;
1089 goto err1;
1090 }
1091
1092 val = SATA_PHY_MPY(i + 1) |
1093 SATA_PHY_LOS(1) |
1094 SATA_PHY_RXCDR(4) |
1095 SATA_PHY_RXEQ(1) |
1096 SATA_PHY_TXSWING(3) |
1097 SATA_PHY_ENPLL(1);
1098
1099 __raw_writel(val, addr + SATA_P0PHYCR_REG);
1100
1101 return 0;
1102
1103err1:
1104 clk_disable_unprepare(da850_sata_clk);
1105err0:
1106 clk_put(da850_sata_clk);
1107 return ret;
1108}
1109
1110static void da850_sata_exit(struct device *dev)
1111{
1112 clk_disable_unprepare(da850_sata_clk);
1113 clk_put(da850_sata_clk);
1114}
1115
1116static struct ahci_platform_data da850_sata_pdata = {
1117 .init = da850_sata_init,
1118 .exit = da850_sata_exit,
1119};
1120
1121static u64 da850_sata_dmamask = DMA_BIT_MASK(32); 1040static u64 da850_sata_dmamask = DMA_BIT_MASK(32);
1122 1041
1123static struct platform_device da850_sata_device = { 1042static struct platform_device da850_sata_device = {
1124 .name = "ahci", 1043 .name = "ahci_da850",
1125 .id = -1, 1044 .id = -1,
1126 .dev = { 1045 .dev = {
1127 .platform_data = &da850_sata_pdata,
1128 .dma_mask = &da850_sata_dmamask, 1046 .dma_mask = &da850_sata_dmamask,
1129 .coherent_dma_mask = DMA_BIT_MASK(32), 1047 .coherent_dma_mask = DMA_BIT_MASK(32),
1130 }, 1048 },
@@ -1134,9 +1052,8 @@ static struct platform_device da850_sata_device = {
1134 1052
1135int __init da850_register_sata(unsigned long refclkpn) 1053int __init da850_register_sata(unsigned long refclkpn)
1136{ 1054{
1137 da850_sata_refclkpn = refclkpn; 1055 /* please see comment in drivers/ata/ahci_da850.c */
1138 if (!da850_sata_refclkpn) 1056 BUG_ON(refclkpn != 100 * 1000 * 1000);
1139 return -EINVAL;
1140 1057
1141 return platform_device_register(&da850_sata_device); 1058 return platform_device_register(&da850_sata_device);
1142} 1059}