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-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm355-leopard.c2
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-mityomapl138.c3
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c2
-rw-r--r--arch/arm/mach-davinci/board-tnetv107x-evm.c2
-rw-r--r--arch/arm/mach-davinci/cpuidle.c51
-rw-r--r--arch/arm/mach-davinci/include/mach/nand.h4
11 files changed, 42 insertions, 32 deletions
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 26d94c0b555c..11c3db985285 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -377,7 +377,7 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = {
377 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions), 377 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
378 .ecc_mode = NAND_ECC_HW, 378 .ecc_mode = NAND_ECC_HW,
379 .ecc_bits = 4, 379 .ecc_bits = 4,
380 .options = NAND_USE_FLASH_BBT, 380 .bbt_options = NAND_BBT_USE_FLASH,
381 .bbt_td = &da830_evm_nand_bbt_main_descr, 381 .bbt_td = &da830_evm_nand_bbt_main_descr,
382 .bbt_md = &da830_evm_nand_bbt_mirror_descr, 382 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
383 .timing = &da830_evm_nandflash_timing, 383 .timing = &da830_evm_nandflash_timing,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index ec21663f8ddc..1d7d24995226 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -256,7 +256,7 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = {
256 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), 256 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
257 .ecc_mode = NAND_ECC_HW, 257 .ecc_mode = NAND_ECC_HW,
258 .ecc_bits = 4, 258 .ecc_bits = 4,
259 .options = NAND_USE_FLASH_BBT, 259 .bbt_options = NAND_BBT_USE_FLASH,
260 .timing = &da850_evm_nandflash_timing, 260 .timing = &da850_evm_nandflash_timing,
261}; 261};
262 262
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 65566280b7c9..4e0e707c313d 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -77,7 +77,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
77 .parts = davinci_nand_partitions, 77 .parts = davinci_nand_partitions,
78 .nr_parts = ARRAY_SIZE(davinci_nand_partitions), 78 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
79 .ecc_mode = NAND_ECC_HW, 79 .ecc_mode = NAND_ECC_HW,
80 .options = NAND_USE_FLASH_BBT, 80 .bbt_options = NAND_BBT_USE_FLASH,
81 .ecc_bits = 4, 81 .ecc_bits = 4,
82}; 82};
83 83
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index b307470b071d..ff2d2413279a 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -74,7 +74,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
74 .parts = davinci_nand_partitions, 74 .parts = davinci_nand_partitions,
75 .nr_parts = ARRAY_SIZE(davinci_nand_partitions), 75 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
76 .ecc_mode = NAND_ECC_HW_SYNDROME, 76 .ecc_mode = NAND_ECC_HW_SYNDROME,
77 .options = NAND_USE_FLASH_BBT, 77 .bbt_options = NAND_BBT_USE_FLASH,
78}; 78};
79 79
80static struct resource davinci_nand_resources[] = { 80static struct resource davinci_nand_resources[] = {
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 04c43abcca66..1918ae711428 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -139,7 +139,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
139 .parts = davinci_nand_partitions, 139 .parts = davinci_nand_partitions,
140 .nr_parts = ARRAY_SIZE(davinci_nand_partitions), 140 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
141 .ecc_mode = NAND_ECC_HW, 141 .ecc_mode = NAND_ECC_HW,
142 .options = NAND_USE_FLASH_BBT, 142 .bbt_options = NAND_BBT_USE_FLASH,
143 .ecc_bits = 4, 143 .ecc_bits = 4,
144}; 144};
145 145
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 28fafa7819bc..0cf8abf78d33 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -151,7 +151,7 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = {
151 .parts = davinci_evm_nandflash_partition, 151 .parts = davinci_evm_nandflash_partition,
152 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition), 152 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
153 .ecc_mode = NAND_ECC_HW, 153 .ecc_mode = NAND_ECC_HW,
154 .options = NAND_USE_FLASH_BBT, 154 .bbt_options = NAND_BBT_USE_FLASH,
155 .timing = &davinci_evm_nandflash_timing, 155 .timing = &davinci_evm_nandflash_timing,
156}; 156};
157 157
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 6efc84cceca0..3cfff555e8f2 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -396,7 +396,8 @@ static struct davinci_nand_pdata mityomapl138_nandflash_data = {
396 .parts = mityomapl138_nandflash_partition, 396 .parts = mityomapl138_nandflash_partition,
397 .nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition), 397 .nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
398 .ecc_mode = NAND_ECC_HW, 398 .ecc_mode = NAND_ECC_HW,
399 .options = NAND_USE_FLASH_BBT | NAND_BUSWIDTH_16, 399 .bbt_options = NAND_BBT_USE_FLASH,
400 .options = NAND_BUSWIDTH_16,
400 .ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */ 401 .ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
401}; 402};
402 403
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 38d6f644d8b9..e5f231aefee4 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -87,7 +87,7 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
87 .parts = davinci_ntosd2_nandflash_partition, 87 .parts = davinci_ntosd2_nandflash_partition,
88 .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition), 88 .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
89 .ecc_mode = NAND_ECC_HW, 89 .ecc_mode = NAND_ECC_HW,
90 .options = NAND_USE_FLASH_BBT, 90 .bbt_options = NAND_BBT_USE_FLASH,
91}; 91};
92 92
93static struct resource davinci_ntosd2_nandflash_resource[] = { 93static struct resource davinci_ntosd2_nandflash_resource[] = {
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index 90ee7b5aabdc..f69e40a29e02 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -144,7 +144,7 @@ static struct davinci_nand_pdata nand_config = {
144 .parts = nand_partitions, 144 .parts = nand_partitions,
145 .nr_parts = ARRAY_SIZE(nand_partitions), 145 .nr_parts = ARRAY_SIZE(nand_partitions),
146 .ecc_mode = NAND_ECC_HW, 146 .ecc_mode = NAND_ECC_HW,
147 .options = NAND_USE_FLASH_BBT, 147 .bbt_options = NAND_BBT_USE_FLASH,
148 .ecc_bits = 1, 148 .ecc_bits = 1,
149}; 149};
150 150
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index 60d2f4871afa..a30c7c5a6d83 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -79,9 +79,11 @@ static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
79 79
80/* Actual code that puts the SoC in different idle states */ 80/* Actual code that puts the SoC in different idle states */
81static int davinci_enter_idle(struct cpuidle_device *dev, 81static int davinci_enter_idle(struct cpuidle_device *dev,
82 struct cpuidle_state *state) 82 struct cpuidle_driver *drv,
83 int index)
83{ 84{
84 struct davinci_ops *ops = cpuidle_get_statedata(state); 85 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
86 struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
85 struct timeval before, after; 87 struct timeval before, after;
86 int idle_time; 88 int idle_time;
87 89
@@ -99,13 +101,17 @@ static int davinci_enter_idle(struct cpuidle_device *dev,
99 local_irq_enable(); 101 local_irq_enable();
100 idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + 102 idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
101 (after.tv_usec - before.tv_usec); 103 (after.tv_usec - before.tv_usec);
102 return idle_time; 104
105 dev->last_residency = idle_time;
106
107 return index;
103} 108}
104 109
105static int __init davinci_cpuidle_probe(struct platform_device *pdev) 110static int __init davinci_cpuidle_probe(struct platform_device *pdev)
106{ 111{
107 int ret; 112 int ret;
108 struct cpuidle_device *device; 113 struct cpuidle_device *device;
114 struct cpuidle_driver *driver = &davinci_idle_driver;
109 struct davinci_cpuidle_config *pdata = pdev->dev.platform_data; 115 struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
110 116
111 device = &per_cpu(davinci_cpuidle_device, smp_processor_id()); 117 device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
@@ -117,32 +123,33 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
117 123
118 ddr2_reg_base = pdata->ddr2_ctlr_base; 124 ddr2_reg_base = pdata->ddr2_ctlr_base;
119 125
120 ret = cpuidle_register_driver(&davinci_idle_driver);
121 if (ret) {
122 dev_err(&pdev->dev, "failed to register driver\n");
123 return ret;
124 }
125
126 /* Wait for interrupt state */ 126 /* Wait for interrupt state */
127 device->states[0].enter = davinci_enter_idle; 127 driver->states[0].enter = davinci_enter_idle;
128 device->states[0].exit_latency = 1; 128 driver->states[0].exit_latency = 1;
129 device->states[0].target_residency = 10000; 129 driver->states[0].target_residency = 10000;
130 device->states[0].flags = CPUIDLE_FLAG_TIME_VALID; 130 driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
131 strcpy(device->states[0].name, "WFI"); 131 strcpy(driver->states[0].name, "WFI");
132 strcpy(device->states[0].desc, "Wait for interrupt"); 132 strcpy(driver->states[0].desc, "Wait for interrupt");
133 133
134 /* Wait for interrupt and DDR self refresh state */ 134 /* Wait for interrupt and DDR self refresh state */
135 device->states[1].enter = davinci_enter_idle; 135 driver->states[1].enter = davinci_enter_idle;
136 device->states[1].exit_latency = 10; 136 driver->states[1].exit_latency = 10;
137 device->states[1].target_residency = 10000; 137 driver->states[1].target_residency = 10000;
138 device->states[1].flags = CPUIDLE_FLAG_TIME_VALID; 138 driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
139 strcpy(device->states[1].name, "DDR SR"); 139 strcpy(driver->states[1].name, "DDR SR");
140 strcpy(device->states[1].desc, "WFI and DDR Self Refresh"); 140 strcpy(driver->states[1].desc, "WFI and DDR Self Refresh");
141 if (pdata->ddr2_pdown) 141 if (pdata->ddr2_pdown)
142 davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN; 142 davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN;
143 cpuidle_set_statedata(&device->states[1], &davinci_states[1]); 143 cpuidle_set_statedata(&device->states_usage[1], &davinci_states[1]);
144 144
145 device->state_count = DAVINCI_CPUIDLE_MAX_STATES; 145 device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
146 driver->state_count = DAVINCI_CPUIDLE_MAX_STATES;
147
148 ret = cpuidle_register_driver(&davinci_idle_driver);
149 if (ret) {
150 dev_err(&pdev->dev, "failed to register driver\n");
151 return ret;
152 }
146 153
147 ret = cpuidle_register_device(device); 154 ret = cpuidle_register_device(device);
148 if (ret) { 155 if (ret) {
diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h
index 025151049f05..1cf555aef896 100644
--- a/arch/arm/mach-davinci/include/mach/nand.h
+++ b/arch/arm/mach-davinci/include/mach/nand.h
@@ -74,8 +74,10 @@ struct davinci_nand_pdata { /* platform_data */
74 nand_ecc_modes_t ecc_mode; 74 nand_ecc_modes_t ecc_mode;
75 u8 ecc_bits; 75 u8 ecc_bits;
76 76
77 /* e.g. NAND_BUSWIDTH_16 or NAND_USE_FLASH_BBT */ 77 /* e.g. NAND_BUSWIDTH_16 */
78 unsigned options; 78 unsigned options;
79 /* e.g. NAND_BBT_USE_FLASH */
80 unsigned bbt_options;
79 81
80 /* Main and mirror bbt descriptor overrides */ 82 /* Main and mirror bbt descriptor overrides */
81 struct nand_bbt_descr *bbt_td; 83 struct nand_bbt_descr *bbt_td;