aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-davinci
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c10
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c4
-rw-r--r--arch/arm/mach-davinci/include/mach/asp.h51
-rw-r--r--arch/arm/mach-davinci/include/mach/memory.h9
5 files changed, 65 insertions, 11 deletions
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index b61e87250b3b..c3994f341e49 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -208,7 +208,7 @@ static struct snd_platform_data da830_evm_snd_data = {
208 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), 208 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
209 .tdm_slots = 2, 209 .tdm_slots = 2,
210 .serial_dir = da830_iis_serializer_direction, 210 .serial_dir = da830_iis_serializer_direction,
211 .eventq_no = EVENTQ_0, 211 .asp_chan_q = EVENTQ_0,
212 .version = MCASP_VERSION_2, 212 .version = MCASP_VERSION_2,
213 .txnumevt = 1, 213 .txnumevt = 1,
214 .rxnumevt = 1, 214 .rxnumevt = 1,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index ef7d9de4db29..fdc2cc500fc6 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -25,6 +25,7 @@
25#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26#include <linux/mtd/physmap.h> 26#include <linux/mtd/physmap.h>
27#include <linux/regulator/machine.h> 27#include <linux/regulator/machine.h>
28#include <linux/regulator/tps6507x.h>
28#include <linux/mfd/tps6507x.h> 29#include <linux/mfd/tps6507x.h>
29#include <linux/input/tps6507x-ts.h> 30#include <linux/input/tps6507x-ts.h>
30 31
@@ -342,7 +343,7 @@ static struct snd_platform_data da850_evm_snd_data = {
342 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), 343 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
343 .tdm_slots = 2, 344 .tdm_slots = 2,
344 .serial_dir = da850_iis_serializer_direction, 345 .serial_dir = da850_iis_serializer_direction,
345 .eventq_no = EVENTQ_1, 346 .asp_chan_q = EVENTQ_1,
346 .version = MCASP_VERSION_2, 347 .version = MCASP_VERSION_2,
347 .txnumevt = 1, 348 .txnumevt = 1,
348 .rxnumevt = 1, 349 .rxnumevt = 1,
@@ -469,6 +470,11 @@ struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
469 }, 470 },
470}; 471};
471 472
473/* We take advantage of the fact that both defdcdc{2,3} are tied high */
474static struct tps6507x_reg_platform_data tps6507x_platform_data = {
475 .defdcdc_default = true,
476};
477
472struct regulator_init_data tps65070_regulator_data[] = { 478struct regulator_init_data tps65070_regulator_data[] = {
473 /* dcdc1 */ 479 /* dcdc1 */
474 { 480 {
@@ -494,6 +500,7 @@ struct regulator_init_data tps65070_regulator_data[] = {
494 }, 500 },
495 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers), 501 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
496 .consumer_supplies = tps65070_dcdc2_consumers, 502 .consumer_supplies = tps65070_dcdc2_consumers,
503 .driver_data = &tps6507x_platform_data,
497 }, 504 },
498 505
499 /* dcdc3 */ 506 /* dcdc3 */
@@ -507,6 +514,7 @@ struct regulator_init_data tps65070_regulator_data[] = {
507 }, 514 },
508 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers), 515 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
509 .consumer_supplies = tps65070_dcdc3_consumers, 516 .consumer_supplies = tps65070_dcdc3_consumers,
517 .driver_data = &tps6507x_platform_data,
510 }, 518 },
511 519
512 /* ldo1 */ 520 /* ldo1 */
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index b8b1deca95e0..4502f346b2b0 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -323,7 +323,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
323 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction), 323 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
324 .tdm_slots = 2, 324 .tdm_slots = 2,
325 .serial_dir = dm646x_iis_serializer_direction, 325 .serial_dir = dm646x_iis_serializer_direction,
326 .eventq_no = EVENTQ_0, 326 .asp_chan_q = EVENTQ_0,
327 }, 327 },
328 { 328 {
329 .tx_dma_offset = 0x400, 329 .tx_dma_offset = 0x400,
@@ -332,7 +332,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
332 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction), 332 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
333 .tdm_slots = 32, 333 .tdm_slots = 32,
334 .serial_dir = dm646x_dit_serializer_direction, 334 .serial_dir = dm646x_dit_serializer_direction,
335 .eventq_no = EVENTQ_0, 335 .asp_chan_q = EVENTQ_0,
336 }, 336 },
337}; 337};
338 338
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index 834725f1e81d..9aa240909a2c 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -52,7 +52,8 @@
52struct snd_platform_data { 52struct snd_platform_data {
53 u32 tx_dma_offset; 53 u32 tx_dma_offset;
54 u32 rx_dma_offset; 54 u32 rx_dma_offset;
55 enum dma_event_q eventq_no; /* event queue number */ 55 enum dma_event_q asp_chan_q; /* event queue number for ASP channel */
56 enum dma_event_q ram_chan_q; /* event queue number for RAM channel */
56 unsigned int codec_fmt; 57 unsigned int codec_fmt;
57 /* 58 /*
58 * Allowing this is more efficient and eliminates left and right swaps 59 * Allowing this is more efficient and eliminates left and right swaps
@@ -63,6 +64,49 @@ struct snd_platform_data {
63 unsigned sram_size_playback; 64 unsigned sram_size_playback;
64 unsigned sram_size_capture; 65 unsigned sram_size_capture;
65 66
67 /*
68 * If McBSP peripheral gets the clock from an external pin,
69 * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR
70 * and MCBSP_CLKS.
71 * Depending on different hardware connections it is possible
72 * to use this setting to change the behaviour of McBSP
73 * driver. The dm365_clk_input_pin enum is available for dm365
74 */
75 int clk_input_pin;
76
77 /*
78 * This flag works when both clock and FS are outputs for the cpu
79 * and makes clock more accurate (FS is not symmetrical and the
80 * clock is very fast.
81 * The clock becoming faster is named
82 * i2s continuous serial clock (I2S_SCK) and it is an externally
83 * visible bit clock.
84 *
85 * first line : WordSelect
86 * second line : ContinuousSerialClock
87 * third line: SerialData
88 *
89 * SYMMETRICAL APPROACH:
90 * _______________________ LEFT
91 * _| RIGHT |______________________|
92 * _ _ _ _ _ _ _ _
93 * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_
94 * _ _ _ _ _ _ _ _
95 * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_
96 * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
97 *
98 * ACCURATE CLOCK APPROACH:
99 * ______________ LEFT
100 * _| RIGHT |_______________________________|
101 * _ _ _ _ _ _ _ _ _
102 * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| |
103 * _ _ _ _ dummy cycles
104 * _/ \_ ... _/ \_/ \_ ... _/ \__________________
105 * \_/ \_/ \_/ \_/
106 *
107 */
108 bool i2s_accurate_sck;
109
66 /* McASP specific fields */ 110 /* McASP specific fields */
67 int tdm_slots; 111 int tdm_slots;
68 u8 op_mode; 112 u8 op_mode;
@@ -78,6 +122,11 @@ enum {
78 MCASP_VERSION_2, /* DA8xx/OMAPL1x */ 122 MCASP_VERSION_2, /* DA8xx/OMAPL1x */
79}; 123};
80 124
125enum dm365_clk_input_pin {
126 MCBSP_CLKR = 0, /* DM365 */
127 MCBSP_CLKS,
128};
129
81#define INACTIVE_MODE 0 130#define INACTIVE_MODE 0
82#define TX_MODE 1 131#define TX_MODE 1
83#define RX_MODE 2 132#define RX_MODE 2
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index a91edfb8beea..22eb97c1c30b 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -48,19 +48,16 @@
48 * below 128M 48 * below 128M
49 */ 49 */
50static inline void 50static inline void
51__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes) 51__arch_adjust_zones(unsigned long *size, unsigned long *holes)
52{ 52{
53 unsigned int sz = (128<<20) >> PAGE_SHIFT; 53 unsigned int sz = (128<<20) >> PAGE_SHIFT;
54 54
55 if (node != 0)
56 sz = 0;
57
58 size[1] = size[0] - sz; 55 size[1] = size[0] - sz;
59 size[0] = sz; 56 size[0] = sz;
60} 57}
61 58
62#define arch_adjust_zones(node, zone_size, holes) \ 59#define arch_adjust_zones(zone_size, holes) \
63 if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes) 60 if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(zone_size, holes)
64 61
65#define ISA_DMA_THRESHOLD (PHYS_OFFSET + (128<<20) - 1) 62#define ISA_DMA_THRESHOLD (PHYS_OFFSET + (128<<20) - 1)
66#define MAX_DMA_ADDRESS (PAGE_OFFSET + (128<<20)) 63#define MAX_DMA_ADDRESS (PAGE_OFFSET + (128<<20))