5 files changed, 57 insertions, 11 deletions

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 212d97084bd7..bc384d3561da 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -208,7 +208,7 @@ static struct snd_platform_data da830_evm_snd_data = {
         .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
         .tdm_slots      = 2,
         .serial_dir     = da830_iis_serializer_direction,
-        .eventq_no      = EVENTQ_0,
+        .asp_chan_q     = EVENTQ_0,
         .version        = MCASP_VERSION_2,
         .txnumevt       = 1,
         .rxnumevt       = 1,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index b280efb1fa12..e8c819090268 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -343,7 +343,7 @@ static struct snd_platform_data da850_evm_snd_data = {
         .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
         .tdm_slots      = 2,
         .serial_dir     = da850_iis_serializer_direction,
-        .eventq_no      = EVENTQ_1,
+        .asp_chan_q     = EVENTQ_1,
         .version        = MCASP_VERSION_2,
         .txnumevt       = 1,
         .rxnumevt       = 1,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 6d8889342c9f..87521f2d69c7 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -323,7 +323,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
                 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
                 .tdm_slots      = 2,
                 .serial_dir     = dm646x_iis_serializer_direction,
-                .eventq_no      = EVENTQ_0,
+                .asp_chan_q     = EVENTQ_0,
         },
         {
                 .tx_dma_offset  = 0x400,
@@ -332,7 +332,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
                 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
                 .tdm_slots      = 32,
                 .serial_dir     = dm646x_dit_serializer_direction,
-                .eventq_no      = EVENTQ_0,
+                .asp_chan_q     = EVENTQ_0,
         },
 };
 
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index 834725f1e81d..9aa240909a2c 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -52,7 +52,8 @@
 struct snd_platform_data {
         u32 tx_dma_offset;
         u32 rx_dma_offset;
-        enum dma_event_q eventq_no;     /* event queue number */
+        enum dma_event_q asp_chan_q;    /* event queue number for ASP channel */
+        enum dma_event_q ram_chan_q;    /* event queue number for RAM channel */
         unsigned int codec_fmt;
         /*
          * Allowing this is more efficient and eliminates left and right swaps
@@ -63,6 +64,49 @@ struct snd_platform_data {
         unsigned sram_size_playback;
         unsigned sram_size_capture;
 
+        /*
+         * If McBSP peripheral gets the clock from an external pin,
+         * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR
+         * and MCBSP_CLKS.
+         * Depending on different hardware connections it is possible
+         * to use this setting to change the behaviour of McBSP
+         * driver. The dm365_clk_input_pin enum is available for dm365
+         */
+        int clk_input_pin;
+
+        /*
+         * This flag works when both clock and FS are outputs for the cpu
+         * and makes clock more accurate (FS is not symmetrical and the
+         * clock is very fast.
+         * The clock becoming faster is named
+         * i2s continuous serial clock (I2S_SCK) and it is an externally
+         * visible bit clock.
+         *
+         * first line : WordSelect
+         * second line : ContinuousSerialClock
+         * third line: SerialData
+         *
+         * SYMMETRICAL APPROACH:
+         *   _______________________          LEFT
+         * _|         RIGHT         |______________________|
+         *     _   _         _   _   _   _         _   _
+         *   _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_
+         *     _   _         _   _   _   _         _   _
+         *   _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_
+         *    \_/ \_/       \_/ \_/ \_/ \_/       \_/ \_/
+         *
+         * ACCURATE CLOCK APPROACH:
+         *   ______________          LEFT
+         * _|     RIGHT    |_______________________________|
+         *     _         _   _         _   _   _   _   _   _
+         *   _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| |
+         *     _         _   _          _      dummy cycles
+         *   _/ \_ ... _/ \_/ \_  ... _/ \__________________
+         *    \_/       \_/ \_/        \_/
+         *
+         */
+        bool i2s_accurate_sck;
+
         /* McASP specific fields */
         int tdm_slots;
         u8 op_mode;
@@ -78,6 +122,11 @@ enum {
         MCASP_VERSION_2,        /* DA8xx/OMAPL1x */
 };
 
+enum dm365_clk_input_pin {
+        MCBSP_CLKR = 0,         /* DM365 */
+        MCBSP_CLKS,
+};
+
 #define INACTIVE_MODE   0
 #define TX_MODE         1
 #define RX_MODE         2
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index a91edfb8beea..22eb97c1c30b 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -48,19 +48,16 @@
  * below 128M
  */
 static inline void
-__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
+__arch_adjust_zones(unsigned long *size, unsigned long *holes)
 {
         unsigned int sz = (128<<20) >> PAGE_SHIFT;
 
-        if (node != 0)
-                sz = 0;
-
         size[1] = size[0] - sz;
         size[0] = sz;
 }
 
-#define arch_adjust_zones(node, zone_size, holes) \
-        if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes)
+#define arch_adjust_zones(zone_size, holes) \
+        if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(zone_size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + (128<<20) - 1)
 #define MAX_DMA_ADDRESS         (PAGE_OFFSET + (128<<20))