1 files changed, 13 insertions, 1 deletions

diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index a41580400701..1fb6bdff38c1 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -25,6 +25,8 @@
 #include <mach/cputype.h>
 #include <mach/psc.h>
 
+#include "clock.h"
+
 /* Return nonzero iff the domain's clock is active */
 int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 {
@@ -48,11 +50,12 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 
 /* Enable or disable a PSC domain */
 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
-                unsigned int id, u32 next_state)
+                unsigned int id, bool enable, u32 flags)
 {
         u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
         void __iomem *psc_base;
         struct davinci_soc_info *soc_info = &davinci_soc_info;
+        u32 next_state = PSC_STATE_ENABLE;
 
         if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
                 pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
@@ -62,9 +65,18 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
 
         psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
 
+        if (!enable) {
+                if (flags & PSC_SWRSTDISABLE)
+                        next_state = PSC_STATE_SWRSTDISABLE;
+                else
+                        next_state = PSC_STATE_DISABLE;
+        }
+
         mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
         mdctl &= ~MDSTAT_STATE_MASK;
         mdctl |= next_state;
+        if (flags & PSC_FORCE)
+                mdctl |= MDCTL_FORCE;
         __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
 
         pdstat = __raw_readl(psc_base + PDSTAT);