diff options
Diffstat (limited to 'arch/arm/mach-davinci/include')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/cputype.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/da8xx.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/irqs.h | 63 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/mux.h | 28 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/psc.h | 3 |
5 files changed, 106 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h index fd41189e5c62..189b1ff13642 100644 --- a/arch/arm/mach-davinci/include/mach/cputype.h +++ b/arch/arm/mach-davinci/include/mach/cputype.h | |||
@@ -32,6 +32,7 @@ struct davinci_id { | |||
32 | #define DAVINCI_CPU_ID_DM355 0x03550000 | 32 | #define DAVINCI_CPU_ID_DM355 0x03550000 |
33 | #define DAVINCI_CPU_ID_DM365 0x03650000 | 33 | #define DAVINCI_CPU_ID_DM365 0x03650000 |
34 | #define DAVINCI_CPU_ID_DA830 0x08300000 | 34 | #define DAVINCI_CPU_ID_DA830 0x08300000 |
35 | #define DAVINCI_CPU_ID_DA850 0x08500000 | ||
35 | 36 | ||
36 | #define IS_DAVINCI_CPU(type, id) \ | 37 | #define IS_DAVINCI_CPU(type, id) \ |
37 | static inline int is_davinci_ ##type(void) \ | 38 | static inline int is_davinci_ ##type(void) \ |
@@ -44,6 +45,7 @@ IS_DAVINCI_CPU(dm646x, DAVINCI_CPU_ID_DM6467) | |||
44 | IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355) | 45 | IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355) |
45 | IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365) | 46 | IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365) |
46 | IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830) | 47 | IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830) |
48 | IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850) | ||
47 | 49 | ||
48 | #ifdef CONFIG_ARCH_DAVINCI_DM644x | 50 | #ifdef CONFIG_ARCH_DAVINCI_DM644x |
49 | #define cpu_is_davinci_dm644x() is_davinci_dm644x() | 51 | #define cpu_is_davinci_dm644x() is_davinci_dm644x() |
@@ -75,4 +77,10 @@ IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830) | |||
75 | #define cpu_is_davinci_da830() 0 | 77 | #define cpu_is_davinci_da830() 0 |
76 | #endif | 78 | #endif |
77 | 79 | ||
80 | #ifdef CONFIG_ARCH_DAVINCI_DA850 | ||
81 | #define cpu_is_davinci_da850() is_davinci_da850() | ||
82 | #else | ||
83 | #define cpu_is_davinci_da850() 0 | ||
84 | #endif | ||
85 | |||
78 | #endif | 86 | #endif |
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 8c8dc135472c..594f9882e422 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
@@ -59,6 +59,7 @@ | |||
59 | #define PINMUX19 0x4c | 59 | #define PINMUX19 0x4c |
60 | 60 | ||
61 | void __init da830_init(void); | 61 | void __init da830_init(void); |
62 | void __init da850_init(void); | ||
62 | 63 | ||
63 | int da8xx_register_edma(void); | 64 | int da8xx_register_edma(void); |
64 | int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); | 65 | int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); |
@@ -93,6 +94,12 @@ extern const short da830_ecap2_pins[]; | |||
93 | extern const short da830_eqep0_pins[]; | 94 | extern const short da830_eqep0_pins[]; |
94 | extern const short da830_eqep1_pins[]; | 95 | extern const short da830_eqep1_pins[]; |
95 | 96 | ||
97 | extern const short da850_uart0_pins[]; | ||
98 | extern const short da850_uart1_pins[]; | ||
99 | extern const short da850_uart2_pins[]; | ||
100 | extern const short da850_i2c0_pins[]; | ||
101 | extern const short da850_i2c1_pins[]; | ||
102 | |||
96 | int da8xx_pinmux_setup(const short pins[]); | 103 | int da8xx_pinmux_setup(const short pins[]); |
97 | 104 | ||
98 | #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ | 105 | #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index 735e378d27ee..6047c2d9da33 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h | |||
@@ -340,9 +340,66 @@ | |||
340 | 340 | ||
341 | #define DA830_N_CP_INTC_IRQ 96 | 341 | #define DA830_N_CP_INTC_IRQ 96 |
342 | 342 | ||
343 | /* da830 currently has the most gpio pins (128) */ | 343 | /* DA850 speicific interrupts */ |
344 | #define IRQ_DA850_MPUADDRERR0 27 | ||
345 | #define IRQ_DA850_MPUPROTERR0 27 | ||
346 | #define IRQ_DA850_IOPUADDRERR0 27 | ||
347 | #define IRQ_DA850_IOPUPROTERR0 27 | ||
348 | #define IRQ_DA850_IOPUADDRERR1 27 | ||
349 | #define IRQ_DA850_IOPUPROTERR1 27 | ||
350 | #define IRQ_DA850_IOPUADDRERR2 27 | ||
351 | #define IRQ_DA850_IOPUPROTERR2 27 | ||
352 | #define IRQ_DA850_BOOTCFG_ADDR_ERR 27 | ||
353 | #define IRQ_DA850_BOOTCFG_PROT_ERR 27 | ||
354 | #define IRQ_DA850_MPUADDRERR1 27 | ||
355 | #define IRQ_DA850_MPUPROTERR1 27 | ||
356 | #define IRQ_DA850_IOPUADDRERR3 27 | ||
357 | #define IRQ_DA850_IOPUPROTERR3 27 | ||
358 | #define IRQ_DA850_IOPUADDRERR4 27 | ||
359 | #define IRQ_DA850_IOPUPROTERR4 27 | ||
360 | #define IRQ_DA850_IOPUADDRERR5 27 | ||
361 | #define IRQ_DA850_IOPUPROTERR5 27 | ||
362 | #define IRQ_DA850_MIOPU_BOOTCFG_ERR 27 | ||
363 | #define IRQ_DA850_SATAINT 67 | ||
364 | #define IRQ_DA850_TINT12_2 68 | ||
365 | #define IRQ_DA850_TINT34_2 68 | ||
366 | #define IRQ_DA850_TINTALL_2 68 | ||
367 | #define IRQ_DA850_MMCSDINT0_1 72 | ||
368 | #define IRQ_DA850_MMCSDINT1_1 73 | ||
369 | #define IRQ_DA850_T12CMPINT0_2 74 | ||
370 | #define IRQ_DA850_T12CMPINT1_2 75 | ||
371 | #define IRQ_DA850_T12CMPINT2_2 76 | ||
372 | #define IRQ_DA850_T12CMPINT3_2 77 | ||
373 | #define IRQ_DA850_T12CMPINT4_2 78 | ||
374 | #define IRQ_DA850_T12CMPINT5_2 79 | ||
375 | #define IRQ_DA850_T12CMPINT6_2 80 | ||
376 | #define IRQ_DA850_T12CMPINT7_2 81 | ||
377 | #define IRQ_DA850_T12CMPINT0_3 82 | ||
378 | #define IRQ_DA850_T12CMPINT1_3 83 | ||
379 | #define IRQ_DA850_T12CMPINT2_3 84 | ||
380 | #define IRQ_DA850_T12CMPINT3_3 85 | ||
381 | #define IRQ_DA850_T12CMPINT4_3 86 | ||
382 | #define IRQ_DA850_T12CMPINT5_3 87 | ||
383 | #define IRQ_DA850_T12CMPINT6_3 88 | ||
384 | #define IRQ_DA850_T12CMPINT7_3 89 | ||
385 | #define IRQ_DA850_RPIINT 91 | ||
386 | #define IRQ_DA850_VPIFINT 92 | ||
387 | #define IRQ_DA850_CCINT1 93 | ||
388 | #define IRQ_DA850_CCERRINT1 94 | ||
389 | #define IRQ_DA850_TCERRINT2 95 | ||
390 | #define IRQ_DA850_TINT12_3 96 | ||
391 | #define IRQ_DA850_TINT34_3 96 | ||
392 | #define IRQ_DA850_TINTALL_3 96 | ||
393 | #define IRQ_DA850_MCBSP0RINT 97 | ||
394 | #define IRQ_DA850_MCBSP0XINT 98 | ||
395 | #define IRQ_DA850_MCBSP1RINT 99 | ||
396 | #define IRQ_DA850_MCBSP1XINT 100 | ||
397 | |||
398 | #define DA850_N_CP_INTC_IRQ 101 | ||
399 | |||
400 | /* da830/da850 currently has the most gpio pins (128) */ | ||
344 | #define DAVINCI_N_GPIO 128 | 401 | #define DAVINCI_N_GPIO 128 |
345 | /* da830 currently has the most irqs so use DA830_N_CP_INTC_IRQ */ | 402 | /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */ |
346 | #define NR_IRQS (DA830_N_CP_INTC_IRQ + DAVINCI_N_GPIO) | 403 | #define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO) |
347 | 404 | ||
348 | #endif /* __ASM_ARCH_IRQS_H */ | 405 | #endif /* __ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index cce7509ea302..3349fa5f82e1 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h | |||
@@ -704,6 +704,34 @@ enum da830_index { | |||
704 | DA830_GPIO2_10, | 704 | DA830_GPIO2_10, |
705 | }; | 705 | }; |
706 | 706 | ||
707 | enum davinci_da850_index { | ||
708 | /* UART0 function */ | ||
709 | DA850_NUART0_CTS, | ||
710 | DA850_NUART0_RTS, | ||
711 | DA850_UART0_RXD, | ||
712 | DA850_UART0_TXD, | ||
713 | |||
714 | /* UART1 function */ | ||
715 | DA850_NUART1_CTS, | ||
716 | DA850_NUART1_RTS, | ||
717 | DA850_UART1_RXD, | ||
718 | DA850_UART1_TXD, | ||
719 | |||
720 | /* UART2 function */ | ||
721 | DA850_NUART2_CTS, | ||
722 | DA850_NUART2_RTS, | ||
723 | DA850_UART2_RXD, | ||
724 | DA850_UART2_TXD, | ||
725 | |||
726 | /* I2C1 function */ | ||
727 | DA850_I2C1_SCL, | ||
728 | DA850_I2C1_SDA, | ||
729 | |||
730 | /* I2C0 function */ | ||
731 | DA850_I2C0_SDA, | ||
732 | DA850_I2C0_SCL, | ||
733 | }; | ||
734 | |||
707 | #ifdef CONFIG_DAVINCI_MUX | 735 | #ifdef CONFIG_DAVINCI_MUX |
708 | /* setup pin muxing */ | 736 | /* setup pin muxing */ |
709 | extern int davinci_cfg_reg(unsigned long reg_cfg); | 737 | extern int davinci_cfg_reg(unsigned long reg_cfg); |
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 6b9621d88284..171173c1dbad 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -155,6 +155,7 @@ | |||
155 | #define DA8XX_LPSC0_GEM 15 | 155 | #define DA8XX_LPSC0_GEM 15 |
156 | 156 | ||
157 | /* PSC1 defines */ | 157 | /* PSC1 defines */ |
158 | #define DA850_LPSC1_TPCC1 0 | ||
158 | #define DA8XX_LPSC1_USB20 1 | 159 | #define DA8XX_LPSC1_USB20 1 |
159 | #define DA8XX_LPSC1_USB11 2 | 160 | #define DA8XX_LPSC1_USB11 2 |
160 | #define DA8XX_LPSC1_GPIO 3 | 161 | #define DA8XX_LPSC1_GPIO 3 |
@@ -163,6 +164,7 @@ | |||
163 | #define DA8XX_LPSC1_EMIF3C 6 | 164 | #define DA8XX_LPSC1_EMIF3C 6 |
164 | #define DA8XX_LPSC1_McASP0 7 | 165 | #define DA8XX_LPSC1_McASP0 7 |
165 | #define DA830_LPSC1_McASP1 8 | 166 | #define DA830_LPSC1_McASP1 8 |
167 | #define DA850_LPSC1_SATA 8 | ||
166 | #define DA830_LPSC1_McASP2 9 | 168 | #define DA830_LPSC1_McASP2 9 |
167 | #define DA8XX_LPSC1_SPI1 10 | 169 | #define DA8XX_LPSC1_SPI1 10 |
168 | #define DA8XX_LPSC1_I2C 11 | 170 | #define DA8XX_LPSC1_I2C 11 |
@@ -172,6 +174,7 @@ | |||
172 | #define DA8XX_LPSC1_PWM 17 | 174 | #define DA8XX_LPSC1_PWM 17 |
173 | #define DA8XX_LPSC1_ECAP 20 | 175 | #define DA8XX_LPSC1_ECAP 20 |
174 | #define DA830_LPSC1_EQEP 21 | 176 | #define DA830_LPSC1_EQEP 21 |
177 | #define DA850_LPSC1_TPTC2 21 | ||
175 | #define DA8XX_LPSC1_SCR_P0_SS 24 | 178 | #define DA8XX_LPSC1_SCR_P0_SS 24 |
176 | #define DA8XX_LPSC1_SCR_P1_SS 25 | 179 | #define DA8XX_LPSC1_SCR_P1_SS 25 |
177 | #define DA8XX_LPSC1_CR_P3_SS 26 | 180 | #define DA8XX_LPSC1_CR_P3_SS 26 |