diff options
Diffstat (limited to 'arch/arm/mach-davinci/include')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/clkdev.h | 13 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/clock.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/psc.h | 53 |
3 files changed, 63 insertions, 4 deletions
diff --git a/arch/arm/mach-davinci/include/mach/clkdev.h b/arch/arm/mach-davinci/include/mach/clkdev.h new file mode 100644 index 000000000000..730c49d1ebd8 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/clkdev.h | |||
@@ -0,0 +1,13 @@ | |||
1 | #ifndef __MACH_CLKDEV_H | ||
2 | #define __MACH_CLKDEV_H | ||
3 | |||
4 | static inline int __clk_get(struct clk *clk) | ||
5 | { | ||
6 | return 1; | ||
7 | } | ||
8 | |||
9 | static inline void __clk_put(struct clk *clk) | ||
10 | { | ||
11 | } | ||
12 | |||
13 | #endif | ||
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h index 38bdd49bc181..a3b040219876 100644 --- a/arch/arm/mach-davinci/include/mach/clock.h +++ b/arch/arm/mach-davinci/include/mach/clock.h | |||
@@ -17,6 +17,5 @@ struct clk; | |||
17 | 17 | ||
18 | extern int clk_register(struct clk *clk); | 18 | extern int clk_register(struct clk *clk); |
19 | extern void clk_unregister(struct clk *clk); | 19 | extern void clk_unregister(struct clk *clk); |
20 | extern int davinci_clk_init(void); | ||
21 | 20 | ||
22 | #endif | 21 | #endif |
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 4977aa071e1e..55a90d419fac 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -38,8 +38,6 @@ | |||
38 | #define DAVINCI_LPSC_TPTC1 4 | 38 | #define DAVINCI_LPSC_TPTC1 4 |
39 | #define DAVINCI_LPSC_EMAC 5 | 39 | #define DAVINCI_LPSC_EMAC 5 |
40 | #define DAVINCI_LPSC_EMAC_WRAPPER 6 | 40 | #define DAVINCI_LPSC_EMAC_WRAPPER 6 |
41 | #define DAVINCI_LPSC_MDIO 7 | ||
42 | #define DAVINCI_LPSC_IEEE1394 8 | ||
43 | #define DAVINCI_LPSC_USB 9 | 41 | #define DAVINCI_LPSC_USB 9 |
44 | #define DAVINCI_LPSC_ATA 10 | 42 | #define DAVINCI_LPSC_ATA 10 |
45 | #define DAVINCI_LPSC_VLYNQ 11 | 43 | #define DAVINCI_LPSC_VLYNQ 11 |
@@ -47,7 +45,6 @@ | |||
47 | #define DAVINCI_LPSC_DDR_EMIF 13 | 45 | #define DAVINCI_LPSC_DDR_EMIF 13 |
48 | #define DAVINCI_LPSC_AEMIF 14 | 46 | #define DAVINCI_LPSC_AEMIF 14 |
49 | #define DAVINCI_LPSC_MMC_SD 15 | 47 | #define DAVINCI_LPSC_MMC_SD 15 |
50 | #define DAVINCI_LPSC_MEMSTICK 16 | ||
51 | #define DAVINCI_LPSC_McBSP 17 | 48 | #define DAVINCI_LPSC_McBSP 17 |
52 | #define DAVINCI_LPSC_I2C 18 | 49 | #define DAVINCI_LPSC_I2C 18 |
53 | #define DAVINCI_LPSC_UART0 19 | 50 | #define DAVINCI_LPSC_UART0 19 |
@@ -73,4 +70,54 @@ | |||
73 | #define DAVINCI_LPSC_GEM 39 | 70 | #define DAVINCI_LPSC_GEM 39 |
74 | #define DAVINCI_LPSC_IMCOP 40 | 71 | #define DAVINCI_LPSC_IMCOP 40 |
75 | 72 | ||
73 | #define DM355_LPSC_TIMER3 5 | ||
74 | #define DM355_LPSC_SPI1 6 | ||
75 | #define DM355_LPSC_MMC_SD1 7 | ||
76 | #define DM355_LPSC_McBSP1 8 | ||
77 | #define DM355_LPSC_PWM3 10 | ||
78 | #define DM355_LPSC_SPI2 11 | ||
79 | #define DM355_LPSC_RTO 12 | ||
80 | #define DM355_LPSC_VPSS_DAC 41 | ||
81 | |||
82 | /* | ||
83 | * LPSC Assignments | ||
84 | */ | ||
85 | #define DM646X_LPSC_ARM 0 | ||
86 | #define DM646X_LPSC_C64X_CPU 1 | ||
87 | #define DM646X_LPSC_HDVICP0 2 | ||
88 | #define DM646X_LPSC_HDVICP1 3 | ||
89 | #define DM646X_LPSC_TPCC 4 | ||
90 | #define DM646X_LPSC_TPTC0 5 | ||
91 | #define DM646X_LPSC_TPTC1 6 | ||
92 | #define DM646X_LPSC_TPTC2 7 | ||
93 | #define DM646X_LPSC_TPTC3 8 | ||
94 | #define DM646X_LPSC_PCI 13 | ||
95 | #define DM646X_LPSC_EMAC 14 | ||
96 | #define DM646X_LPSC_VDCE 15 | ||
97 | #define DM646X_LPSC_VPSSMSTR 16 | ||
98 | #define DM646X_LPSC_VPSSSLV 17 | ||
99 | #define DM646X_LPSC_TSIF0 18 | ||
100 | #define DM646X_LPSC_TSIF1 19 | ||
101 | #define DM646X_LPSC_DDR_EMIF 20 | ||
102 | #define DM646X_LPSC_AEMIF 21 | ||
103 | #define DM646X_LPSC_McASP0 22 | ||
104 | #define DM646X_LPSC_McASP1 23 | ||
105 | #define DM646X_LPSC_CRGEN0 24 | ||
106 | #define DM646X_LPSC_CRGEN1 25 | ||
107 | #define DM646X_LPSC_UART0 26 | ||
108 | #define DM646X_LPSC_UART1 27 | ||
109 | #define DM646X_LPSC_UART2 28 | ||
110 | #define DM646X_LPSC_PWM0 29 | ||
111 | #define DM646X_LPSC_PWM1 30 | ||
112 | #define DM646X_LPSC_I2C 31 | ||
113 | #define DM646X_LPSC_SPI 32 | ||
114 | #define DM646X_LPSC_GPIO 33 | ||
115 | #define DM646X_LPSC_TIMER0 34 | ||
116 | #define DM646X_LPSC_TIMER1 35 | ||
117 | #define DM646X_LPSC_ARM_INTC 45 | ||
118 | |||
119 | extern int davinci_psc_is_clk_active(unsigned int id); | ||
120 | extern void davinci_psc_config(unsigned int domain, unsigned int id, | ||
121 | char enable); | ||
122 | |||
76 | #endif /* __ASM_ARCH_PSC_H */ | 123 | #endif /* __ASM_ARCH_PSC_H */ |