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-rw-r--r--arch/arm/mach-davinci/include/mach/aemif.h36
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h7
-rw-r--r--arch/arm/mach-davinci/include/mach/dm365.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/dm644x.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/dm646x.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/nand.h6
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/tnetv107x.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/uncompress.h2
9 files changed, 51 insertions, 10 deletions
diff --git a/arch/arm/mach-davinci/include/mach/aemif.h b/arch/arm/mach-davinci/include/mach/aemif.h
new file mode 100644
index 000000000000..05b293443097
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/aemif.h
@@ -0,0 +1,36 @@
1/*
2 * TI DaVinci AEMIF support
3 *
4 * Copyright 2010 (C) Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10#ifndef _MACH_DAVINCI_AEMIF_H
11#define _MACH_DAVINCI_AEMIF_H
12
13#define NRCSR_OFFSET 0x00
14#define AWCCR_OFFSET 0x04
15#define A1CR_OFFSET 0x10
16
17#define ACR_ASIZE_MASK 0x3
18#define ACR_EW_MASK BIT(30)
19#define ACR_SS_MASK BIT(31)
20
21/* All timings in nanoseconds */
22struct davinci_aemif_timing {
23 u8 wsetup;
24 u8 wstrobe;
25 u8 whold;
26
27 u8 rsetup;
28 u8 rstrobe;
29 u8 rhold;
30
31 u8 ta;
32};
33
34int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
35 void __iomem *base, unsigned cs);
36#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 3c07059f526e..4247b3f53b33 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -76,9 +76,10 @@ int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
76int da8xx_register_emac(void); 76int da8xx_register_emac(void);
77int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); 77int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
78int da8xx_register_mmcsd0(struct davinci_mmc_config *config); 78int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
79int da850_register_mmcsd1(struct davinci_mmc_config *config);
79void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata); 80void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
80int da8xx_register_rtc(void); 81int da8xx_register_rtc(void);
81int da850_register_cpufreq(void); 82int da850_register_cpufreq(char *async_clk);
82int da8xx_register_cpuidle(void); 83int da8xx_register_cpuidle(void);
83void __iomem * __init da8xx_get_mem_ctlr(void); 84void __iomem * __init da8xx_get_mem_ctlr(void);
84int da850_register_pm(struct platform_device *pdev); 85int da850_register_pm(struct platform_device *pdev);
@@ -121,11 +122,9 @@ extern const short da850_uart2_pins[];
121extern const short da850_i2c0_pins[]; 122extern const short da850_i2c0_pins[];
122extern const short da850_i2c1_pins[]; 123extern const short da850_i2c1_pins[];
123extern const short da850_cpgmac_pins[]; 124extern const short da850_cpgmac_pins[];
124extern const short da850_rmii_pins[];
125extern const short da850_mcasp_pins[]; 125extern const short da850_mcasp_pins[];
126extern const short da850_lcdcntl_pins[]; 126extern const short da850_lcdcntl_pins[];
127extern const short da850_mmcsd0_pins[]; 127extern const short da850_mmcsd0_pins[];
128extern const short da850_nand_pins[]; 128extern const short da850_emif25_pins[];
129extern const short da850_nor_pins[];
130 129
131#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ 130#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index ea5df3b49ec4..2563bf4e93a1 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -21,10 +21,10 @@
21#include <media/davinci/vpfe_capture.h> 21#include <media/davinci/vpfe_capture.h>
22 22
23#define DM365_EMAC_BASE (0x01D07000) 23#define DM365_EMAC_BASE (0x01D07000)
24#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000)
24#define DM365_EMAC_CNTRL_OFFSET (0x0000) 25#define DM365_EMAC_CNTRL_OFFSET (0x0000)
25#define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000) 26#define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000)
26#define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000) 27#define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000)
27#define DM365_EMAC_MDIO_OFFSET (0x4000)
28#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) 28#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000)
29 29
30/* Base of key scan register bank */ 30/* Base of key scan register bank */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 6fca568a0fd2..5a1b26d4e68b 100644
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -28,10 +28,10 @@
28#include <media/davinci/vpfe_capture.h> 28#include <media/davinci/vpfe_capture.h>
29 29
30#define DM644X_EMAC_BASE (0x01C80000) 30#define DM644X_EMAC_BASE (0x01C80000)
31#define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000)
31#define DM644X_EMAC_CNTRL_OFFSET (0x0000) 32#define DM644X_EMAC_CNTRL_OFFSET (0x0000)
32#define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000) 33#define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000)
33#define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000) 34#define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000)
34#define DM644X_EMAC_MDIO_OFFSET (0x4000)
35#define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) 35#define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000)
36 36
37#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000 37#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 0a27ee9a70e1..7a27f3f13913 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -19,10 +19,10 @@
19#include <linux/davinci_emac.h> 19#include <linux/davinci_emac.h>
20 20
21#define DM646X_EMAC_BASE (0x01C80000) 21#define DM646X_EMAC_BASE (0x01C80000)
22#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
22#define DM646X_EMAC_CNTRL_OFFSET (0x0000) 23#define DM646X_EMAC_CNTRL_OFFSET (0x0000)
23#define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000) 24#define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000)
24#define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000) 25#define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000)
25#define DM646X_EMAC_MDIO_OFFSET (0x4000)
26#define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000) 26#define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000)
27 27
28#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 28#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h
index b2ad8090bd10..025151049f05 100644
--- a/arch/arm/mach-davinci/include/mach/nand.h
+++ b/arch/arm/mach-davinci/include/mach/nand.h
@@ -30,9 +30,6 @@
30 30
31#include <linux/mtd/nand.h> 31#include <linux/mtd/nand.h>
32 32
33#define NRCSR_OFFSET 0x00
34#define AWCCR_OFFSET 0x04
35#define A1CR_OFFSET 0x10
36#define NANDFCR_OFFSET 0x60 33#define NANDFCR_OFFSET 0x60
37#define NANDFSR_OFFSET 0x64 34#define NANDFSR_OFFSET 0x64
38#define NANDF1ECC_OFFSET 0x70 35#define NANDF1ECC_OFFSET 0x70
@@ -83,6 +80,9 @@ struct davinci_nand_pdata { /* platform_data */
83 /* Main and mirror bbt descriptor overrides */ 80 /* Main and mirror bbt descriptor overrides */
84 struct nand_bbt_descr *bbt_td; 81 struct nand_bbt_descr *bbt_td;
85 struct nand_bbt_descr *bbt_md; 82 struct nand_bbt_descr *bbt_md;
83
84 /* Access timings */
85 struct davinci_aemif_timing *timing;
86}; 86};
87 87
88#endif /* __ARCH_ARM_DAVINCI_NAND_H */ 88#endif /* __ARCH_ARM_DAVINCI_NAND_H */
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 983da6e4554c..62b0858f68ca 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -172,6 +172,7 @@
172#define DA8XX_LPSC1_UART2 13 172#define DA8XX_LPSC1_UART2 13
173#define DA8XX_LPSC1_LCDC 16 173#define DA8XX_LPSC1_LCDC 16
174#define DA8XX_LPSC1_PWM 17 174#define DA8XX_LPSC1_PWM 17
175#define DA850_LPSC1_MMC_SD1 18
175#define DA8XX_LPSC1_ECAP 20 176#define DA8XX_LPSC1_ECAP 20
176#define DA830_LPSC1_EQEP 21 177#define DA830_LPSC1_EQEP 21
177#define DA850_LPSC1_TPTC2 21 178#define DA850_LPSC1_TPTC2 21
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index c72064733123..5a681d880dcb 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -33,6 +33,8 @@
33#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
34 34
35#include <linux/serial_8250.h> 35#include <linux/serial_8250.h>
36#include <linux/input/matrix_keypad.h>
37
36#include <mach/mmc.h> 38#include <mach/mmc.h>
37#include <mach/nand.h> 39#include <mach/nand.h>
38#include <mach/serial.h> 40#include <mach/serial.h>
@@ -41,6 +43,7 @@ struct tnetv107x_device_info {
41 struct davinci_uart_config *serial_config; 43 struct davinci_uart_config *serial_config;
42 struct davinci_mmc_config *mmc_config[2]; /* 2 controllers */ 44 struct davinci_mmc_config *mmc_config[2]; /* 2 controllers */
43 struct davinci_nand_pdata *nand_config[4]; /* 4 chipsels */ 45 struct davinci_nand_pdata *nand_config[4]; /* 4 chipsels */
46 struct matrix_keypad_platform_data *keypad_config;
44}; 47};
45 48
46extern struct platform_device tnetv107x_wdt_device; 49extern struct platform_device tnetv107x_wdt_device;
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 15a6192ad6eb..47723e8d75a4 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -88,6 +88,8 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
88 /* DA8xx boards */ 88 /* DA8xx boards */
89 DEBUG_LL_DA8XX(davinci_da830_evm, 2); 89 DEBUG_LL_DA8XX(davinci_da830_evm, 2);
90 DEBUG_LL_DA8XX(davinci_da850_evm, 2); 90 DEBUG_LL_DA8XX(davinci_da850_evm, 2);
91 DEBUG_LL_DA8XX(mityomapl138, 1);
92 DEBUG_LL_DA8XX(omapl138_hawkboard, 2);
91 93
92 /* TNETV107x boards */ 94 /* TNETV107x boards */
93 DEBUG_LL_TNETV107X(tnetv107x, 1); 95 DEBUG_LL_TNETV107X(tnetv107x, 1);