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-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h47
1 files changed, 0 insertions, 47 deletions
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 0a22710493fd..99d47cfa301f 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -182,53 +182,6 @@
182#define DA8XX_LPSC1_CR_P3_SS 26 182#define DA8XX_LPSC1_CR_P3_SS 26
183#define DA8XX_LPSC1_L3_CBA_RAM 31 183#define DA8XX_LPSC1_L3_CBA_RAM 31
184 184
185/* TNETV107X LPSC Assignments */
186#define TNETV107X_LPSC_ARM 0
187#define TNETV107X_LPSC_GEM 1
188#define TNETV107X_LPSC_DDR2_PHY 2
189#define TNETV107X_LPSC_TPCC 3
190#define TNETV107X_LPSC_TPTC0 4
191#define TNETV107X_LPSC_TPTC1 5
192#define TNETV107X_LPSC_RAM 6
193#define TNETV107X_LPSC_MBX_LITE 7
194#define TNETV107X_LPSC_LCD 8
195#define TNETV107X_LPSC_ETHSS 9
196#define TNETV107X_LPSC_AEMIF 10
197#define TNETV107X_LPSC_CHIP_CFG 11
198#define TNETV107X_LPSC_TSC 12
199#define TNETV107X_LPSC_ROM 13
200#define TNETV107X_LPSC_UART2 14
201#define TNETV107X_LPSC_PKTSEC 15
202#define TNETV107X_LPSC_SECCTL 16
203#define TNETV107X_LPSC_KEYMGR 17
204#define TNETV107X_LPSC_KEYPAD 18
205#define TNETV107X_LPSC_GPIO 19
206#define TNETV107X_LPSC_MDIO 20
207#define TNETV107X_LPSC_SDIO0 21
208#define TNETV107X_LPSC_UART0 22
209#define TNETV107X_LPSC_UART1 23
210#define TNETV107X_LPSC_TIMER0 24
211#define TNETV107X_LPSC_TIMER1 25
212#define TNETV107X_LPSC_WDT_ARM 26
213#define TNETV107X_LPSC_WDT_DSP 27
214#define TNETV107X_LPSC_SSP 28
215#define TNETV107X_LPSC_TDM0 29
216#define TNETV107X_LPSC_VLYNQ 30
217#define TNETV107X_LPSC_MCDMA 31
218#define TNETV107X_LPSC_USB0 32
219#define TNETV107X_LPSC_TDM1 33
220#define TNETV107X_LPSC_DEBUGSS 34
221#define TNETV107X_LPSC_ETHSS_RGMII 35
222#define TNETV107X_LPSC_SYSTEM 36
223#define TNETV107X_LPSC_IMCOP 37
224#define TNETV107X_LPSC_SPARE 38
225#define TNETV107X_LPSC_SDIO1 39
226#define TNETV107X_LPSC_USB1 40
227#define TNETV107X_LPSC_USBSS 41
228#define TNETV107X_LPSC_DDR2_EMIF1_VRST 42
229#define TNETV107X_LPSC_DDR2_EMIF2_VCTL_RST 43
230#define TNETV107X_LPSC_MAX 44
231
232/* PSC register offsets */ 185/* PSC register offsets */
233#define EPCPR 0x070 186#define EPCPR 0x070
234#define PTCMD 0x120 187#define PTCMD 0x120